Sony HBD-E770W Service Manual ▷ View online
HBD-E770W
77
• IC Pin Function Description
MB-134 BOARD IC101 CXD9983GG (BD DECODER)
Pin No.
Pin Name
I/O
Description
A1
FESFDO
I
Serial data input terminal for the front-end serial fl ash
A3
VOUTD1
-
Not used
A5
VOUTD5
-
Not used
A7
VOUTD9
-
Not used
A9
VOUTD12
-
Not used
A11
VIND0
O
Serial data transfer clock signal output to the digital audio interface receiver
A13
VIND12
I
CSFLAG signal input from the digital audio interface receiver
A15
VIND16
-
Not used
A17
GPIO1
I
Busy request signal input from the system controller
A19
SPDIF
O
Digital audio data output terminal Not used
A21
SPBCK
I
Bit clock signal input from the digital audio interface receiver
A23
AVDD12_27MPLL
-
Power supply terminal (+1.2V)
A25
NS_XTALI
O
System clock signal output terminal (27 MHz)
A27
CH1_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
A29
CLK_M
O
TMDS clock signal (negative) output to the HDMI ARC OUT connector
A31
DACOUT4
O
Not used
A33
DACOUT1
O
Video signal (Pr/Cr) output terminal
A35
VCLK
O
Serial data transfer clock signal output to the system controller
A37
UARXD
-
Not used
A39
ETRXD3
I
Receive data input from the ethernet interface
A41
ETRXD0
I
Receive data input from the ethernet interface
A43
ETRXCLK
I
Receive clock signal input from the ethernet interface
B2
FESFCS
I
Chip select signal input terminal for the front-end serial fl ash
B4
VOUTD3
-
Not used
B6
VOUTD7
-
Not used
B8
VOUTD10
-
Not used
B10
VOUTD14
-
Not used
B12
VIND4
O
Reset signal output to the digital audio interface receiver
B14
VIND14
-
Not used
B16
VINHSYNC
-
Not used
B18
GPIO3
O
Power on/off control signal output terminal for the USB section
B20
SPLRCK
I
L/R sampling clock signal input from the digital audio interface receiver
B22
AOBCK
O
Bit clock signal output to the audio section
B24
AVDD12_DMPLL
-
Power supply terminal (+1.2V)
B26
CH2_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
B28
CH0_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
B30
EXT_CAP
-
Not used
B32
DACOUT3
O
Video signal (Pb/Cb) output terminal
B34
VDATA
I
Serial data input from the system controller
B36
IR
I
Error signal input from the digital audio interface receiver
B38
ETMDIO
I/O
Two-way data bus with the ethernet interface
B40
ETRXD1
I
Receive data input from the ethernet interface
B42
ETRXER
I
Receive error signal input from the ethernet interface
C1
FE_SFCLK
O
Serial data transfer clock signal output terminal for the front-end serial fl ash
C3
FESFDI
O
Serial data output terminal for the front-end serial fl ash
C5
VOUTD4
-
Not used
C7
VOUTD8
-
Not used
C9
VOUTD11
-
Not used
C11
VOUTD15
-
Not used
C13
VIND11
-
Not used
C15
VIND15
-
Not used
C17
GPIO0
O
Request signal output to the system controller
C19
GPIO2
I
Chip select signal input from the system controller
C21
SPMCLK
I
Master clock signal input from the digital audio interface receiver
C23
AOSDATA0
O
Digital audio data output to the power amp
C25
NS_XTALO
I
System clock signal input terminal (27 MHz)
HBD-E770W
78
Pin No.
Pin Name
I/O
Description
C27
CH1_P
O
TMDS data (positive) output to the HDMI ARC OUT connector
C29
CLK_P
O
TMDS clock signal (positive) output to the HDMI ARC OUT connector
C31
DACOUT5
O
Not used
C33
DACOUT2
O
Video signal (Y) output terminal
C35
MRESET_
O
Reset signal output terminal for the front-end power
C37
ETCOL
I
Collision detect signal input from the ethernet interface
C39
ETRXD2
I
Receive data input from the ethernet interface
C41
ETTXCLK
I
Transmit clock signal input from the ethernet interface
C43
ETTXD0
O
Transmit data output to the ethernet interface
D2
FE_GIO11
-
Not used
D4
FESFCK
I
Serial data transfer clock signal input terminal for the front-end serial fl ash
D6
VOUTD6
-
Not used
D8
VOUTD0
-
Not used
D10
VOUTD13
-
Not used
D12
VIND1
O
Serial data output to the digital audio interface receiver
D14
VIND13
-
Not used
D16
VINCLK
-
Not used
D18
VIND17
-
Not used
D20
AOSDATA5
O
Digital audio data output terminal Not used
D22
AOMCLK
O
Master clock signal output to the audio section
D24
AVDD12_APLL
-
Power supply terminal (+1.2V)
D26
CH2_P
O
TMDS data (positive) output to the HDMI ARC OUT connector
D28
CH0_P
O
TMDS data (positive) output to the HDMI ARC OUT connector
D30
DACOUT6
O
Video signal (CVBS) output terminal
D32
AVDD33_VDACBG
-
Power supply terminal (+3.3V)
D34
VSTB
-
Not used
D36
UATXD
-
Not used
D38
ETTXEN
O
Transmit enable signal output to the ethernet interface
D40
ETTXD1
O
Transmit data output to the ethernet interface
D42
ETTXD2
O
Transmit data output to the ethernet interface
E1
FE_SFDO
O
Serial data output terminal for the front-end serial fl ash
E3
FE_GIO2
-
Not used
E5
FE_GIO9
O
Clock signal output terminal for the SACD
E7
VOUTD2
-
Not used
E9
VOUTCLK1
-
Not used
E11
VOUTD16
-
Not used
E13
VOUTD19
-
Not used
E15
VIND2
I
Serial data input from the digital audio interface receiver
E17
VINVSYNC
-
Not used
E19
VIND19
I
Interrupt signal input from the digital audio interface receiver
E21
AOSDATA4
O
Digital audio data output to the S-AIR section
E23
AOLRCK
O
L/R sampling clock signal output to the audio section
E25
AVDD33_XTAL
-
Power supply terminal (+3.3V)
E27
TP_PLLG
-
Not used
E29
EXT_RES
-
Not used
E31
AVDD33_VDACR
-
Power supply terminal (+3.3V)
E33
DACFS
-
Not used
E35
RESET_
I
System reset signal input from the system controller
E37
ETTXER
O
Transmit error signal output to the ethernet interface
E39
ETTXD3
O
Transmit data output to the ethernet interface
E41
HDMISD
I/O
Two-way data bus with the HDMI ARC OUT connector
E43
CEC
-
Not used
F2
FE_SFDI
I
Serial data input terminal for the front-end serial fl ash
F4
FE_SFHOLD#
-
Not used
F6
NS_CKIN33
I
Clock signal input terminal for the SACD
F8
VOUTCLK2
-
Not used
F10
VOUTHSYNC
-
Not used
F12
VOUTD17
-
Not used
F14
VIND5
O
Power on/off control signal output terminal for the USB section
HBD-E770W
79
Pin No.
Pin Name
I/O
Description
F16
VIND3
O
Chip enable signal output to the digital audio interface receiver
F18
VIND7
-
Not used
F20
MCIN
I
Digital audio data input from the A/D converter
F22
AOSDATA3
O
Digital audio data output to the S-AIR section
F24
AVSS12_DMPLL
-
Ground terminal
F26
TN_PLLG
-
Not used
F28
AVSS33_HDMI
-
Ground terminal
F30
AVDD12_HDMI
-
Power supply terminal (+1.2V)
F32
AVSS33_VDACBG
-
Ground terminal
F34
OPWRSB
O
Power on/off control signal output to the system controller
F36
ETMDC
O
Serial data transfer clock signal output to the ethernet interface
F38
ETRXDV
I
Receive data valid signal input from the ethernet interface
F40
HDMISCK
I/O
Two-way clock bus with the HDMI ARC OUT connector
F42
SFDO
O
Serial data output to the serial fl ash
G1
FE_VRDC0
-
Not used
G3
FE_FG
I
Motor hole sensor signal input from the motor driver IC
G5
FE_GIO7
O
Laser diode on/off control signal output to the BD drive
G7
FE_JTCLK
-
Not used
G9
FE_GIO6
O
MODE C signal output to the BD drive
G11
VOUTVSYNC
-
Not used
G13
VOUTD18
-
Not used
G15
VIND8
O
Video format selection signal output to the video amplifi er
G17
VIND10
-
Not used
G19
VIND18
I
PCM audio data input from the digital audio interface receiver
G21
SPDATA
I
Digital audio data input from the digital audio interface receiver
G23
AOSDATA1
O
Digital audio data output to the power amp and S-AIR section
G25
AVSS33_XTAL
-
Ground terminal
G27
AVSS33_HDMI
-
Ground terminal
G29
AVDD12_HDMI
-
Power supply terminal (+1.2V)
G31
AVDD33_VDACY
-
Power supply terminal (+3.3V)
G33
LCDRD
O
Serial data output to the system controller
G35
VCC3IO_STB
-
Power supply terminal (+3.3V)
G37
DVSS
-
Ground terminal
G39
HTPLG
I
Hot plug detection signal input from the HDMI ARC OUT connector
G41
SFCK
O
Serial data transfer clock signal output to the serial fl ash
G43
NFWEN
O
Write enable signal output to the NAND fl ash
H2
FE_JTDO
-
Not used
H4
NS_RFIN
I
SACD audio data (negative) input terminal
H6
FE_JTRST#
-
Not used
H8
FE_GIO10
-
Not used
H10
VCC3IO_3
-
Power supply terminal (+3.3V)
H12
VCC3IO_3
-
Power supply terminal (+3.3V)
H14
VIND6
O
Video muting on/off control signal output to the video amplifi er
H16
DVSS
-
Ground terminal
H18
VCC3IO_3
-
Power supply terminal (+3.3V)
H20
AMUTE
O
Muting on/off control signal output terminal Not used
H22
AOSDATA2
O
Digital audio data output to the power amp
H24
AVSS12_APLL
-
Ground terminal
H26
AVDD33_HDMI
-
Power supply terminal (+3.3V)
H28
AVSS12_HDMI
-
Ground terminal
H30
AVSS33_VDACY
-
Ground terminal
H32
AVSS33_VDACR
-
Ground terminal
H34
ETCRS
I
Carrier sense signal input from the ethernet interface
H36
DVSS
-
Ground terminal
H38
AVDD10_LDO
-
Power supply terminal (+1.0V)
H40
SFDI
I
Serial data input from the serial fl ash
H42
NFD0
I/O
Two-way data bus with the NAND fl ash
J1
FE_HAVC
O
Reference voltage output to the BD drive
J3
FE_MPXOUT3
-
Not used
HBD-E770W
80
Pin No.
Pin Name
I/O
Description
J5
FE_GIO5
O
MODE B signal output to the BD drive
J7
FE_GIO4
O
MODE A signal output to the BD drive
J9
DVSS
-
Ground terminal
J11
DVSS
-
Ground terminal
J13
DVSS
-
Ground terminal
J15
VCC3IO_3
-
Power supply terminal (+3.3V)
J17
VIND9
-
Not used
J19
DVSS
-
Ground terminal
J21
VCC3IO_PWM
-
Power supply terminal (+3.3V)
J23
DVSS
-
Ground terminal
J25
AVSS12_27MPLL
-
Ground terminal
J27
AVDD33_HDMI
-
Power supply terminal (+3.3V)
J29
AVSS12_HDMI
-
Ground terminal
J33
VCC3IO_STB
-
Power supply terminal (+3.3V)
J37
AVDD33_LDO
-
Power supply terminal (+3.3V)
J39
SFCS
O
Chip select signal output to the serial fl ash
J41
NFD1
I/O
Two-way data bus with the NAND fl ash
J43
NFD2
I/O
Two-way data bus with the NAND fl ash
K2
FE_MPXOUT2
O
Digital audio data output terminal for the SACD
K4
FE_EQBIAS
-
Not used
K6
FE_SFCS#
O
Chip select signal output terminal for the front-end serial fl ash
K8
NS_RFIP
I
SACD audio data (positive) input terminal
K34
DVSS
-
Ground terminal
K36
AVSS33_LDO
-
Ground terminal
K38
NFCLE
O
Command latch enable signal output to the NAND fl ash
K40
NFD3
I/O
Two-way data bus with the NAND fl ash
K42
NFD4
I/O
Two-way data bus with the NAND fl ash
L1
FE_VWDC3O
-
Not used
L3
FE_VDAC0
O
Initialize signal output to the BD drive
L5
FE_MPXOUT1
O
Digital audio data output terminal for the SACD
L7
FE_SFWP#
-
Not used
L9
FE_GIO8
-
Not used
L35
VCC3IO_2
-
Power supply terminal (+3.3V)
L37
NFALE
O
Address latch enable signal output to the NAND fl ash
L39
NFCEN2
O
Chip enable signal output terminal Not used
L41
NFD5
I/O
Two-way data bus with the NAND fl ash
L43
NFD6
I/O
Two-way data bus with the NAND fl ash
M2
FE_VWDC2O
-
Not used
M4
FE_AUX1
I
Monitoring signal input from the BD drive
M6
FE_RSTI
I
Reset signal input terminal for the front-end power
M8
FE_MVDDO
-
Power supply terminal (+3.3V)
M10
FE_MVDDO
-
Power supply terminal (+3.3V)
M36
NFREN
O
Read enable signal output to the NAND fl ash
M38
NFCEN
O
Chip enable signal output to the NAND fl ash
M40
NFD7
I/O
Two-way data bus with the NAND fl ash
M42
B_REXTDN
-
Not used
N1
FE_INB
O
Main beam (B) input from the BD drive
N3
FE_TRINC
-
Not used
N5
FE_VFVREF
-
Not used
N7
FE_DVDD33O
-
Power supply terminal (+3.3V)
N9
FE_DVDD33O
-
Power supply terminal (+3.3V)
N11
FE_DVDD33O
-
Power supply terminal (+3.3V)
N35
VCC3IO_2
-
Power supply terminal (+3.3V)
N37
DVSS
-
Ground terminal
N39
DVSS
-
Ground terminal
N41
B_RCLK1
O
Clock signal (positive) output to the SD-RAM
N43
B_RCLK1B
O
Clock signal (negative) output to the SD-RAM
P2
FE_INA
O
Main beam (A) input from the BD drive
P4
FE_TRINA
-
Not used
Click on the first or last page to see other HBD-E770W service manuals if exist.