DOWNLOAD Sony DHC-MD313 / HCD-MD313 Service Manual ↓ Size: 1.37 MB | Pages: 64 in PDF or view online for FREE

Model
DHC-MD313 HCD-MD313
Pages
64
Size
1.37 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
dhc-md313-hcd-md313.pdf
Date

Sony DHC-MD313 / HCD-MD313 Service Manual ▷ View online

– 76 –
Pin No.
Pin Name
I/O
Function
40
DVSS
Ground terminal (digital system)
41
XOE
O
Output enable signal output to the external D-RAM (IC124)
42
XCAS
O
Column address strobe signal output to the external D-RAM (IC124)
43
A09
O
Address signal output to the external D-RAM (IC124)
44
XRAS
O
Row address strobe signal output to the external D-RAM (IC124)
45
XWE
O
Write enable signal output to the external D-RAM (IC124)
46
D1
I/O
47
D0
I/O
Two-way data bus for the external D-RAM (IC124)
48
D2
I/O
49
D3
I/O
50
MVCI
I
Digital in PLL oscillation input from the external VCO
Not used (fixed at “L”)
51
ASYO
O
Playback EFM full-swing output
52
ASYI
I (A)
Playback EFM asymmetry comparator voltage input
53
AVDD
Power supply terminal (+3.3V) (analog system)
54
BIAS
I (A)
Playback EFM asymmetry circuit constant current input
55
RFI
I (A)
Playback EFM RF signal input from the CXA2523AR (IC101)
56
AVSS
Ground terminal (analog system)
57
PDO
O (3)
Phase comparison output for clock playback analog PLL of the playback EFM
Not used (open)
58
PCO
O (3)
Phase comparison output for master clock of the recording/playback EFM master PLL
59
FILI
I (A)
Filter input for master clock of the recording/playback master PLL
60
FILO
O (A)
Filter output for master clock of the recording/playback master PLL
61
CLTV
I (A)
Internal VCO control voltage input of the recording/playback master PLL
62
PEAK
I (A)
Light amount signal (RF/ABCD) peak hold input from the CXA2523AR (IC101)
63
BOTM
I (A)
Light amount signal (RF/ABCD) bottom hold input from the CXA2523AR (IC101)
64
ABCD
I (A)
Light amount signal (ABCD) input from the CXA2523AR (IC101)
65
FE
I (A)
Focus error signal input from the CXA2523AR (IC101)
66
AUX1
I (A)
Auxiliary signal (I3 signal/temperature signal) input from the CXA2523AR (IC101)
67
VC
I (A)
Middle point voltage (+1.65V) input from the CXA2523AR (IC101)
68
ADIO
O (A)
Monitor output of the A/D converter input signal
Not used (open)
69
AVDD
Power supply terminal (+3.3V) (analog system)
70
ADRT
I (A)
A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set)
71
ADRB
I (A)
A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set)
72
AVSS
Ground terminal (analog system)
73
SE
I (A)
Sled error signal input from the CXA2523AR (IC101)
74
TE
I (A)
Tracking error signal input from the CXA2523AR (IC101)
75
AUX2
I (A)
Auxiliary signal input terminal    Not used (fixed at “H”)
76
DCHG
I (A)
Connected to the +3.3V power supply
77
APC
I (A)
Error signal input for the laser automatic power control    Not used (fixed at “L”)
78
ADFG
I
ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the CXA2523AR (IC101)
79
F0CNT
O
Filter f0 control signal output to the CXA2523AR (IC101)
80
XLRF
O
Serial latch signal output to the CXA2523AR (IC101)
81
CKRF
O
Serial clock signal output to the CXA2523AR (IC101)
82
DTRF
O
Writing data output to the CXA2523AR (IC101)
* I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.
– 77 –
Pin No.
Pin Name
I/O
Function
83
APCREF
O
Control signal output to the reference voltage generator circuit for the laser automatic power control
84
LDDR
O
PWM signal output for the laser automatic power control
Not used (open)
85
TRDR
O
Tracking servo drive PWM signal (–) output to the BH6511FS (IC152)
86
TFDR
O
Tracking servo drive PWM signal (+) output to the BH6511FS (IC152)
87
DVDD
Power supply terminal (+3.3V) (digital system)
88
FFDR
O
Focus servo drive PWM signal (+) output to the BH6511FS (IC152)
89
FRDR
O
Focus servo drive PWM signal (–) output to the BH6511FS (IC152)
90
FS4
O
Clock signal (176.4 kHz) output terminal (X’tal system)
Not used (open)
91
SRDR
O
Sled servo drive PWM signal (–) output to the BH6511FS (IC152)
92
SFDR
O
Sled servo drive PWM signal (+) output to the BH6511FS (IC152)
93
SPRD
O
Spindle servo drive PWM signal (–) output to the BH6511FS (IC152)
94
SPFD
O
Spindle servo drive PWM signal (+) output to the BH6511FS (IC152)
95
FGIN
I
96
TEST1
I
Input terminal for the test (fixed at “L”)
97
TEST2
I
98
TEST3
I
99
DVSS
Ground terminal (digital system)
100
EFMO
O
EFM signal output terminal when recording mode
– 78 –
 BD (MD)  BOARD  IC316
M30610MC-109FP (MD  SYSTEM  CONTROL)
Pin No.
Pin Name
I/O
Function
1,2
(JOG0, JOG1)
I
Encoder switch signal input terminal
Not used (fixed at “H”)
3,4
DAOUT1, DAOUT2
O
Not used (fixed at “L”)
5
SQSY
I
Subcode Q sync (SCOR) input from the CXD2652AR (IC121)
6
REMCON
I
Remote control signal input
7
EMP
O
De-emphasis control signal output to the AK4520 (IC201)
8
BYTE
I
External data bus line byte select signal input terminal
“L”:16bit “H”: 8bit (fixed at “L”)
9
CNVSS
I
Processor mode select signal input terminal (fixed at “L”)
10
XIN-T
I
Sub system clock input tarminal
Not used (fixed at “L”)
11
(XOUT-T)
O
Sub sytem clock output tarminal
Not used (fixed at “L”)
12
SYSTEM-RST
I
MD reset signal input from the M62016 (IC603)
13
XOUT
O
Main system clock signal output terminal
14
GND
Ground terminal
15
XIN
I
Main sytem clock signal input terminal
16
+3V
Power supply terminal (+3.3V)
17
NMI
Connecting to power supply
18
AMUTE
Not used (fixed at "L")
19
PWR-DWN
O
Power down detect signal output to the LA5620 (IC570)
20
DQSY
I
Digital in U-bit CD format subcode Q sync (SCOR) input from theCXD2652SAR (IC121)
21
STB
I
Stand-by signal input terminal
Not used (fixed at “L”)
22
DA-RST
I
D/A converter reset signal input terminal
Not used (fixed at “L”)
23
XINT
I
Interrupt status input from the CXD2652AR (IC121)
24
DA-EN
O
D/A converter enable signal output to the AK4520 (IC201)
25
AD-EN
O
A/D converter enable signal output to the AK4520 (IC201)
26
MEC-BUSY
O
Mecha-busy signal output to the master control (IC601)
27
FLCS
O
Display clear signal output terminal
Not used (fixed at “L”)
28
FLCLK
O
Display data clock signal output terminal
Not used (fixed at “L”)
29
Not used (fixed at “L”)
30
FLDATA
O
Display data signal output terminal
Not used (fixed at “L”)
31
TXD
O
MD control data signal output to the master control (IC601)
32
RXD
I
MD control data signal input to the master control (IC601)
33
CLK
I
MD control data clock signal input to the master control (IC601)
34
MAS-BUSY
I
Master-busy signal input from the master control (IC601)
35
SWDT
O
Writing data signal output to the CXD2652AR (IC121)
36
SRDT
I
Reading data signal input from the CXD2652AR (IC121)
37
SCLK
O
Serial clock signal output to the CXD2652AR (IC121)
38
XLAT
O
Serial latch signal output to the CXD2652AR (IC121)
39
O
Clock signal output terminal
Not used (fixed at “L”)
40
DIG-RST
I
Reset signal output enable signal output to the CXD2652AR (IC121)
41
SENS
I
Status (SENSE) input from the CXD2652AR (IC121)
42
SCTX
O
Recording data output enable signal output to the CXD2652AR (IC121)
43
XINT
O
Not used (fixed at “L”)
44
WRPWR
O
Laser power selection signal output to the CXD2652AR (IC121)
45
MNT3
I
Monitor 3 signal input from the CXD2652AR (IC121)
46
MNT2
I
Monitor 2 signal input from the CXD2652AR (IC121)
47
MNT1
I
Track jump detection signal input from the CXD2652AR (IC121)
48
MNTO
I
Focus OK signal input from the CXD2652AR (IC121)
49
LDON
O
Laser diode ON signal output terminal
– 79 –
Pin No.
Pin Name
I/O
Function
50
MOD
O
HF module ON signal output terminal
51
LDIN
O
MD loading-in signal output to LB1830M (IC153)
52
LDOUT
O
MD loading-out signal output to LAB1830M (IC153)
53
LD-LOW
O
Loading motor voltage control signal output to the loading motor driver
54
PROTECT
I
MD PROTECT switch (S683) detect signal input terminal
55
REFLECT
I
MD REFLECT switch (S682) detect signal input terminal
56
PACK-IN
I
Not used
57
PACK-OUT
I
MD PACK OUT switch (S686) detect signal input terminal
58
CHUCK-IN
I
MD CHUCKING IN switch (S685) detect signal input terminal
59
LIMIT-IN
I
MD LIMIT IN switch (S681) detect signal input terminal
60
REC. P
I
MD REC POSITION switch (S688) detect signal input terminal
61
PB. P
I
MD PB POSITION switch (S687) detect signal input terminal
62
+5V
Power supply (+5V)
63
Not used (fixed at “L”)
64
GND
Ground terminal
65 to 72
Connect terminal 65 to 72
Not used (fixed at “L”)
73 to 78
Not used (fixed at “L”)
79
SDA
I/O
Tow-way data bus for the EEPROM (IC171)
80
SCL
O
Clock signal output to the EEPROM (IC171)
81, 82
Not used (fixed at “L”)
83
POWER
Conenct terminal 83 to 85
Not used (fixed at “L”)
84, 85
86, 87
Not used (fixed at “L”)
88 to 90
Connect terminal 88 to 90
Not used (fixed at “L”)
91 to 93 KEY0, KEY1, KEY2
Connect terminal 91 to 93
Not used (fixed at “H”)
94
Not used (fixed at “L”)
95
SOURCE
Not used (fixed at “L”)
96
AVSS
Ground terminal
97
Not used (fixed at “L”)
98
VREF5V
Power supply (+5V)
99
3.3V
Power supply (+3.3V)
100
Not used (fixed at “L”)
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