Sony DHC-AZ3DM / DHC-AZ7DM / HCD-AZ3DM / HCD-AZ7DM Service Manual ▷ View online
33
HCD-AZ3DM/AZ7DM
Pin No.
Pin Name
I/O
Description
91
TAPE B HALF/REC
I
Deck-B cassette detection signal input from the tape mechanism deck block
“L”: cassette inRecording-proof (forward and reverse direction) detection signal
input from the tape mechanism deck block “L”: recording possible
92
SPEC-IN
I
Destination setting input terminal (A/D input)
93
MODEL-IN
I
Model setting input terminal (A/D input)
94, 95
KEY_2, KEY_1
I
Key input terminal (A/D input)
96
AVSS
-
Ground terminal (analog system)
97
TCC RESET
O
Reset signal output to the USB memory controller and flash memory “L”: reset
98
VREF
I
Reference voltage (+3.3V) input terminal (analog system)
99
AVCC
-
Power supply terminal (+3.3V) (analog system)
100
STANDBY LED
O
LED drive signal output of the standby indicator “H”: LED on
34
HCD-AZ3DM/AZ7DM
USB-A BOARD IC801 TCC7202C00-TAR2-AG (USB MEMORY CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
VSSIO
-
Ground terminal (digital system) (for I/O)
2 to 6
XD4 to XD8
I/O
Two-way data bus with the SD-RAM and flash memory
7
VDDI
-
Power supply terminal (+1.8V) (digital system) (for internal)
8
VSSI
-
Ground terminal (digital system) (for internal)
9 to 15
XD9 to XD15
I/O
Two-way data bus with the SD-RAM and flash memory
16
VDDIO
-
Power supply terminal (+3.3V) (digital system) (for I/O)
17 to 23
XA0 to XA6
O
Address signal output to the SD-RAM and flash memory
24
VDDI
-
Power supply terminal (+1.8V) (digital system) (for internal)
25
VSSI
-
Ground terminal (digital system) (for internal)
26 to 29
XA7 to XA10
O
Address signal output to the SD-RAM and flash memory
30, 31
XA11, XA12
O
Address signal output to the flash memory
32
VSSIO
-
Ground terminal (digital system) (for I/O)
33
VDDIO
-
Power supply terminal (+3.3V) (digital system) (for I/O)
34
XA13
O
Bank address signal output to the SD-RAM and address signal output to the flash
memory
35
XA14
O
Address signal output to the flash memory
36
XA15
O
Column address signal output to the SD-RAM and address signal output to the flash
37
XA16
O
Row address signal output to the SD-RAM and address signal output to the flash
memory
38, 39
XA17, XA18
O
Address signal output to the flash memory
40
XA19
O
Address signal output terminal Not used
41
VDDI
-
Power supply terminal (+1.8V) (digital system) (for internal)
42
XA20
O
Mask signal output to the SD-RAM (upper byte)
43
XA21
O
Mask signal output to the SD-RAM (lower byte)
44
SD_CLK
O
Clock signal output to the SD-RAM
45
VSSIO
-
Ground terminal (digital system) (for I/O)
46
SD_#CS
O
Chip select signal output to the SD-RAM
47 to 49
#CS0/#OE0 to
O
Chip select signal or output enable signal output terminal Not used
#CS20/#OE2
50
#CS3/#OE3
O
Chip enable signal output to the flash memory
51
USB_DP
I
USB data (+) input terminal Not used
52
USB_DN
I
USB data (-) input terminal Not used
53
USBH_DP
I
USB data (+) input terminal
54
USBH_DN
I
USB data (-) input terminal
55
VSSI
-
Ground terminal (digital system) (for internal)
56
SD_CKE
O
Clock enable signal output to the SD-RAM
57
ND_#WE
O
Write enable signal output terminal Not used
58
#WE
O
Write enable signal output to the SD-RAM and flash memory
59
#OE
O
Output enable signal output to the flash memory
60
UT_TX
O
Transmit data output to the system controller
61
UT_RX
I
Receive data input from the system controller
62
BCLK
O
Bit clock signal output to the D/A converter
63
LRCK
O
L/R sampling clock signal output to the D/A converter
64
VDD_USB
-
Power supply terminal (+3.3V) (for USB I/O)
65
VSSIO
-
Ground terminal (digital system) (for I/O)
66
MCLK
O
System clock signal output to the D/A converter
67
DAO
O
Digital audio data output to the D/A converter
68
DAI
I
Digital audio data input terminal Not used
69
XTIN
I
Sub system clock signal input terminal Not used
35
HCD-AZ3DM/AZ7DM
Pin No.
Pin Name
I/O
Description
70
XTOUT
O
Sub system clock signal output terminal Not used
71
VDDI
-
Power supply terminal (+1.8V) (digital system) (for internal)
72
#RESET
I
Reset signal input from the system controller “L”: reset
73
READY
I
Ready signal input terminal Not used
74
XIN
I
Main system clock signal input terminal (12 MHz)
75
XOUT
O
Main system clock signal output terminal (12 MHz)
76
VDDIO
-
Power supply terminal (+3.3V) (digital system) (for I/O)
77
VDDA_PLL
O
Power supply terminal (+2.5V) (analog and digital system) (for PLL)
78
XFILT
O
PLL filter output terminal
79
VSSA_PLL
-
Ground terminal (analog and digital system) (for PLL)
80
VSSA
-
Ground terminal (analog system)
81
VDDA_ADC
-
Power supply terminal (+3.3V) (analog system) (for A/D converter)
82 to 84
ADC0,ADC2, ADC4
I
Analog data input terminal Not used
85, 86
VSSA
-
Ground terminal (analog system)
87
VDDI_AIP
-
Power supply terminal (+2.5V) (digital system) (for A/D converter and CODEC)
88
VSSI_AIP
-
Ground terminal (digital system) (for A/D converter and CODEC)
89
VDDA_CDC
-
Power supply terminal (+3.3V) (analog system) (for CODEC)
90
LCH_OUT
O
Audio signal (L-ch) output terminal Not used
91
RCH_OUT
O
Audio signal (R-ch) output terminal Not used
92
RCH_IN
I
Audio signal (R-ch) input terminal Not used
93
MIC-IN
I
Mic signal input terminal Not used
94
LCH_IN
I
Audio signal (L-ch) input terminal Not used
95
VREF
O
Reference voltage output terminal Not used
96
VSSA_CDC
-
Ground terminal (analog system) (for CODEC)
97
VSSIO
-
Ground terminal (digital system) (for I/O)
98
MODE1
I
Mode setting terminal
99
TDI
I
Serial data input terminal (for JTAG) Not used
100
TMS
I
Test mode selection signal input terminal (for JTAG) Not used
101
TCK
I
Test clock signal input terminal (for JTAG) Not used
102
TDO
O
Serial data output terminal (for JTAG) Not used
103
#TRST
I
Reset signal input terminal (for JTAG) Not used
104
SDO0
O
Serial data output terminal Not used
105
SCK0
O
Serial data transfer clock signal output terminal Not used
106
USBA_PWE
O
Power on/off control signal output to the USB power control “L”: power on
107
MUTING
O
Muting on/off control signal output terminal “L”: muting on
108
SDO1
O
Serial data output terminal Not used
109
VDDI
-
Power supply terminal (+1.8V) (digital system) (for internal)
110
VSSI
-
Ground terminal (digital system) (for internal)
111
SCK1
O
Serial data transfer clock signal output terminal Not used
112
VDDIO
-
Power supply terminal (+3.3V) (digital system) (for I/O)
113
SFRM1
O
Serial data output to the system controller
114
SDI1
I
Serial data input terminal Not used
115
SDO2
O
Serial data output to the D/A converter
116
SCK2
O
Serial data transfer clock signal output to the D/A converter
117
SFRM2
O
Serial data latch pulse signal output to the D/A converter
118
SDI1
I
Serial data input terminal Not used
119
VDDI
-
Power supply terminal (+1.8V) (digital system) (for internal)
120
VSSI
-
Ground terminal (digital system) (for internal)
121
EXINT0
I
Serial data input from the system controller
122
EXINT1
I
Over current detection signal input from the USB power control
36
HCD-AZ3DM/AZ7DM
Pin No.
Pin Name
I/O
Description
123
EXINT2
I
Wake up signal input terminal Not used
124
EXINT3
I
External interrupt request signal input terminal Not used
125 to 128
XD0 to XD3
I/O
Two-way data bus with the SD-RAM and flash memory
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