DOWNLOAD Sony DHC-AZ3DM / DHC-AZ7DM / HCD-AZ3DM / HCD-AZ7DM Service Manual ↓ Size: 12.85 MB | Pages: 117 in PDF or view online for FREE

Model
DHC-AZ3DM DHC-AZ7DM HCD-AZ3DM HCD-AZ7DM
Pages
117
Size
12.85 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
dhc-az3dm-dhc-az7dm-hcd-az3dm-hcd-az7dm.pdf
Date

Sony DHC-AZ3DM / DHC-AZ7DM / HCD-AZ3DM / HCD-AZ7DM Service Manual ▷ View online

25
HCD-AZ3DM/AZ7DM
RF LEVEL CHECK
Procedure :
1. Connect the oscilloscope to CN105 pin 6  (RFMON) and
CN105 pin 3 (GND) on the DMB10 board or DMB11 board.
2. Press the  
`/1
  button to turn the power on.
3. Insert the test disc and touch the
 Y
  sensor to playback.
4. Confirm that oscilloscope waveform is as shown in the
figure below. (eye pattern)
A good eye pattern means that the diamond shape (
) in the
center of the waveform can be clearly distinguished.
DVD  SECTION
set
test tape
P-4-A063
(6.3 kHz, –10 dB)
oscilloscope
V
H
waveform of oscilloscope
in phase 45
°
90
°
135
°
180
°
good
wrong
MAIN board
VIDEO/SAT OUT
 jack (J101)
+
DMB10 board or DMB11 board
CN105 pin 
6
 (RFMON)
CN105 pin 
3
 (GND)
oscilloscope
(DC range)
VOLT/DIV: 200 mV
TIME/DIV: 500 ns
level:
0.8 
±
 0.2 Vp-p (DVD)
0.8 
±
 0.2 Vp-p (CD)
IC102
– DMB10/DMB11 BOARD (Side A) –
IC201
CN105
1
6
3. Mode:  Playback
4. After the adjustments, apply suitable locking compound to
the pats adjusted.
Adjustment Location: Record/Playback/Erase Head
reverse
forward
Checking Location:
Ver. 1.1
TEST DISC LIST
Use the following test disc on electrical adjustments.
YEDS-18 (CD)
: PART No. 3-702-101-01
PATD-012 (CD)
: PART No. 4-225-203-01
HLX-503 (DVD-SL) (NTSC) : PART No. J-6090-069-A
HLX-504 (DVD-SL) (NTSC) : PART No. J-6090-088-A
HLX-506 (DVD-SL) (PAL)
: PART No. J-6090-077-A
HLX-501 (DVD-DL) (NTSC) : PART No. J-6090-071-A
HLX-505 (DVD-DL) (NTSC) : PART No. J-6090-089-A
HLX-507 (DVD-DL) (PAL)
: PART No. J-6090-078-A
Note:
Do not use existing test disc for DVD.
ADJUSTMENT AFTER OPTICAL PICK-UP
BLOCK REPLACED
After optical pick-up block is replaced, adjustment is necessary. In
this case, perform “MIRROR TIME ADJUSTMENT” (Refer to page
22 in TEST MODE), and perform “EXECUTING IOP
MEASUREMENT” (Refer to page 23 in TEST MODE) next.
26
HCD-AZ3DM/AZ7DM
IC Pin Function Description
SECTION  7
DIAGRAMS
DMB10 BOARD  IC102  CXD9804R (RF AMP, SERVO DSP, MPEG DECODER)
DMB11 BOARD  IC102  CXD9849R (RF AMP, SERVO DSP, MPEG DECODER)
Pin No.
Pin Name
I/O
Description
1
AGND
-
Ground terminal
2
DVDA
I
AC coupled input path A
3
DVDB
I
AC coupled input path B
4
DVDC
I
AC coupled input path C
5
DVDD
I
AC coupled input path D
6
DVDRFIP
I
AC coupled DVD RF signal input from the optical pick-up block
7
DVDRFIN
I
AC coupled DVD RF signal input terminal    Not used
8
MA
I
DC coupled main-beam RF signal input A
9
MB
I
DC coupled main-beam RF signal input B
10
MC
I
DC coupled main-beam RF signal input C
11
MD
I
DC coupled main-beam RF signal input D
12
SA
I
DC coupled sub-beam RF signal input A    Not used
13
SB
I
DC coupled sub-beam RF signal input B    Not used
14
SC
I
DC coupled sub-beam RF signal input C    Not used
15
SD
I
DC coupled sub-beam RF signal input D    Not used
16
CDFON
I
CD focusing error negative input terminal    Not used
17
CDFOP
I
CD focusing error positive input terminal    Not used
18
TNI
I
3 beam satellite PD signal negative input from the optical pick-up block
19
TPI
I
3 beam satellite PD signal positive input from the optical pick-up block
20, 21
MDI1, MDI2
I
Laser power monitor input from the optical pick-up block
22
LDO2
O
Laser diode drive signal output to the optical pick-up block (for DVD)
23
LDO1
O
Laser diode drive signal output to the optical pick-up block (for CD)
24
SVDD3
-
Power supply terminal (+3.3V)
SCO
O
Central servo signal output terminal    Not used (for CXD9804R)
CSD
O
Not used (for CXD9849R)
26
RFLVL
O
RFRP low pass output terminal    Not used
27
SGND
-
Ground terminal
28
V2REFO
O
Reference voltage (+2.8V) output terminal    Not used
29
V2O
O
Reference voltage (+2V) output to the optical pick-up block
30
VREFO
O
Reference voltage (+1.4V) output terminal
31
FEO
O
Focus error monitor output terminal    Not used
32
TEO
O
Tracking error monitor output terminal    Not used
33
TEZISLV
O
Slice level of tracking error signal output terminal    Not used
34
OPOUT
O
Output from the internal operational amplifier    Not used
35, 36
OPIN
I
Input to the internal operational amplifier    Not used
37
DMO
O
Spindle motor control signal output to the motor driver
38
FMO
O
Sled motor control signal output to the motor driver
39
TROPENPWM
O
Loading motor control signal output to the motor driver
40
IOPMON
I
Power monitor terminal
41
TRO
O
Tracking coil control signal output to the coil driver
42
FOO
O
Focus coil control signal output to the coil driver
USBVSS
-
Ground terminal (for CXD9804R)
DVSS
-
Ground terminal (for CXD9849R)
USBP
I/O
USB communication data input/output terminal    Not used (for CXD9804R)
NC
-
Not used (for CXD9849R)
25
43
44
Ver. 1.1
27
HCD-AZ3DM/AZ7DM
Pin No.
Pin Name
I/O
Description
USBM
I/O
USB communication data input/output terminal    Not used (for CXD9804R)
NC
-
Not used (for CXD9849R)
USBVDD3
-
Power supply terminal (+3.3V) (for CXD9804R)
DVDD3
-
Power supply terminal (+3.3V) (for CXD9849R)
47
SPFG
I
Spindle motor hall sensor input from the motor driver
AN0
I/O
Not used (for CXD9804R)
DSEL
O
Interlace/progressive selection signal output to the video amplifier (for CXD9849R)
AN1
I/O
Not used (for CXD9804R)
WIDE
O
Wide control signal output to the video amplifier (for CXD9849R)
AN2
I/O
Not used (for CXD9804R)
MSW
O
DVD/CD selection signal output terminal (for CXD9849R)
51
NAMUTE
-
Muting control signal output terminal    Not used
52
DVDD18
-
Power supply terminal (+1.8V)
53 to 61
IOA2 to IOA8,
IOA18, IOA19
O
Address signal output to the flash ROM
62
DVSS
-
Ground terminal
63
APLLCAP
-
Connection terminal for an external capacitor
64
APLLVSS
-
Ground terminal
65
VDD3
-
Power supply terminal (+3.3V)
66
IOWR
O
Write enable signal output to the flash ROM
67 to 72
IOA16 to IOA11
O
Address signal output to the flash ROM
73
DVDD3
-
Power supply terminal (+3.3V)
74 to 76
IOA10, IOA9,
IOA20
O
Address signal output to the flash ROM
77
IOCS
O
Chip select signal output to the flash ROM
78
IOA1
O
Address signal output to the flash ROM
79
IOOE
O
Output enable signal output to the flash ROM
80
DVDD3
-
Power supply terminal (+3.3V)
81 to 84
AD0 to AD3
I/O
Data/address signal input/output terminal with the flash ROM
85
DVSS
-
Ground terminal
86 to 88
AD4 to AD6
I/O
Data/address signal input/output terminal with the flash ROM
89
IOA21
O
Address signal output to the flash ROM
90
ALE
O
Address latch enable signal output terminal    Not used
91
AD7
I/O
Data/address signal input/output terminal with the flash ROM
92, 93
IOA17, IOA0
O
Address signal output to the flash ROM
94
DVSS
-
Ground terminal
95
UWR
O
Write enable signal output terminal    Not used
96
URD
O
Data read enable signal output terminal    Not used
97
DVDD18
-
Power supply terminal (+1.8V)
98
IFSDO
O
Serial data output to the system controller
99
IFCK
I
Serial data transfer clock signal input from the system controller
100
XIFCS
I
Chip select signal input from the system controller
101
IFSDI
I
Serial data input from the system controller
102
SCL
O
Serial data transfer clock signal output to the EEPROM and D/A converter
103
SDA
I/O
Two-way data bus with the EEPROM and D/A converter
104
TRG-SW
I
Trigger detection switch input terminal
105
IFBSY
I
Busy signal input from the system controller
106
RXD
I
Receive data input terminal for UART communication when data writing to flash memory
107
TXD
O
Transmit data output terminal for UART communication when data writing to flash memory
108
DVDD3
-
Power supply terminal (+3.3V)
109
ICE
I
ICE mode enable signal input terminal    Not used
48
49
50
46
45
Ver. 1.1
28
HCD-AZ3DM/AZ7DM
Pin No.
Pin Name
I/O
Description
110
PRST
I
Reset signal input from the system controller    "L": reset
111
IR
I
IR control signal input terminal    Not used
112
INT0
O
Interrupt request signal output terminal    Not used
113
DQM0
O
Data mask signal output to the SD-RAM
114
MREQ
O
Muting request signal output to the system controller
115
RD7
I/O
Two-way data bus with the SD-RAM
116
DVSS
-
Ground terminal
117, 118
RD6, RD5
I/O
Two-way data bus with the SD-RAM
119
DVSS
-
Ground terminal
120, 121
RD4, RD3
I/O
Two-way data bus with the SD-RAM
122
DVDD18
-
Power supply terminal (+1.8V)
123 to 125
RD2 to RD0
I/O
Two-way data bus with the SD-RAM
126
RD15
I/O
Two-way data bus with the SD-RAM
127
DVDD3
-
Power supply terminal (+3.3V)
128 to 133
RD14 to RD9
I/O
Two-way data bus with the SD-RAM
134
DVSS
-
Ground terminal
135
RD8
I/O
Two-way data bus with the SD-RAM
136
GPIO
-
Not used
137
DQM1
O
Data mask signal output to the SD-RAM
138
RWE
O
Write enable signal output to the SD-RAM
139
CAS
O
Column address strobe signal output to the SD-RAM
140
RAS
O
Row address strobe signal output to the SD-RAM
141
DVDD3
-
Power supply terminal (+3.3V)
142
RCS
O
Chip select signal output to the SD-RAM
143
BA0
O
Bank address signal output to the SD-RAM
144
DVSS
-
Ground terminal
145
BA1
O
Bank address signal output to the SD-RAM
146, 147
RA10, RA0
O
Address signal output to the SD-RAM
148
DVSS
-
Ground terminal
149 to 151
RA1 to RA3
O
Address signal output to the SD-RAM
152
DVDD18
-
Power supply terminal (+1.8V)
RVREF
-
Not used (for CXD9804R)
NC
-
Not used (for CXD9849R)
RCLKB
-
Not used (for CXD9804R)
NC
-
Not used (for CXD9849R)
155
DVDD3
-
Power supply terminal (+3.3V)
156
RCLK
O
Serial data transfer clock signal output to the SD-RAM
157
CKE
O
Clock enable signal output to the SD-RAM
158 to 160
RA11, RA9, RA8
O
Address signal output to the SD-RAM
161
DVSS
-
Ground terminal
162
RA7
O
Address signal output to the SD-RAM
163
DVSS
-
Ground terminal
164 to 166
RA6 to RA4
O
Address signal output to the SD-RAM
167
DVDD3
-
Power supply terminal (+3.3V)
168
DISC/X
-
Not used
169
RGB
-
Not used
XSMRST
-
Not used (for CXD9804R)
TSDM
O
Thermal shut down signal output to the motor/coil driver (for CXD9849R)
WIDE
O
Wide control signal output to the video amplifier (for CXD9804R)
NC
-
Not used (for CXD9849R)
154
170
171
153
Ver. 1.1
Page of 117
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