DOWNLOAD Sony DAV-X1G / HCD-X1G Service Manual ↓ Size: 8.76 MB | Pages: 95 in PDF or view online for FREE

Model
DAV-X1G HCD-X1G
Pages
95
Size
8.76 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
dav-x1g-hcd-x1g.pdf
Date

Sony DAV-X1G / HCD-X1G Service Manual ▷ View online

65
HCD-X1G
Pin No.
Pin Name
I/O
Description
119
DVSS
-
Ground terminal
120, 121
RD4, RD3
I/O
Two-way data bus with the SD-RAM
122
DVDD18
-
Power supply terminal (+1.8V)
123 to 125
RD2 to RD0
I/O
Two-way data bus with the SD-RAM
126
RD15
I/O
Two-way data bus with the SD-RAM
127
DVDD3
-
Power supply terminal (+3.3V)
128 to 133
RD14 to RD9
I/O
Two-way data bus with the SD-RAM
134
DVSS
-
Ground terminal
135
RD8
I/O
Two-way data bus with the SD-RAM
136
GPIO
-
Not used
137
DQM1
O
Data mask signal output to the SD-RAM
138
RWE
O
Write enable signal output to the SD-RAM
139
CAS
O
Column address strobe signal output to the SD-RAM
140
RAS
O
Row address strobe signal output to the SD-RAM
141
DVDD3
-
Power supply terminal (+3.3V)
142
RCS
O
Chip select signal output to the SD-RAM
143
BA0
O
Bank address signal output to the SD-RAM
144
DVSS
-
Ground terminal
145
BA1
O
Bank address signal output to the SD-RAM
146, 147
RA10, RA0
O
Address signal output to the SD-RAM
148
DVSS
-
Ground terminal
149 to 151
RA1 to RA3
O
Address signal output to the SD-RAM
152
DVDD18
-
Power supply terminal (+1.8V)
153
RVREF
-
Not used
154
RCLKB
-
Not used
155
DVDD3
-
Power supply terminal (+3.3V)
156
RCLK
O
Serial data transfer clock signal output to the SD-RAM
157
CKE
O
Clock enable signal output to the SD-RAM
158 to 160
RA11, RA9, RA8
O
Address signal output to the SD-RAM
161
DVSS
-
Ground terminal
162
RA7
O
Address signal output to the SD-RAM
163
DVSS
-
Ground terminal
164 to 166
RA6 to RA4
O
Address signal output to the SD-RAM
167
DVDD3
-
Power supply terminal (+3.3V)
168
DISC/X
-
Not used
169
RGB
O
Video output (RGB) selection signal output terminal
170
XSMRST
O
System reset signal output terminal    Not used
171
WIDE
O
Wide control signal output terminal
172
NT
-
Not used
173
DVDD18
-
Power supply terminal (+1.8V)
174
EUR
-
Not used
175
DVSS
-
Ground terminal
176
LIMSW
I
Limit detection switch input terminal
177
OCKSW
I
Disc slot in/out detection switch input terminal
178
VCLK
O
System clock (27 MHz) output terminal    Not used
179
CKSW
I
Chucking detection switch input terminal
180
IO3
-
Not used
66
HCD-X1G
Pin No.
Pin Name
I/O
Description
181
TSDM
O
Thermal shut down signal output to the motor/coil driver
182
DVDD3
-
Power supply terminal (+3.3V)
183
MUTE
O
Muting signal output to the motor/coil driver
184
MUTE123
O
Muting signal output to the motor/coil driver
185
REV
O
Loading motor drive signal output to the motor driver (reverse direction)
186
FWD
O
Loading motor drive signal output to the motor driver (forward direction)
187
MSW
O
DVD/CD selection signal output terminal
188
DSEL
O
Interlace/progressive selection signal output to the video amplifier
189
DAVCC
-
Power supply terminal (+3.3V)
190
VREF
-
For bandgap reference voltage terminal
191
FS
-
Full scale adjustment terminal
192
YUV0
O
Video data output terminal    Not used
193
DAVSS
-
Ground terminal
194
YUV1
O
Y signal output to the video amplifier
195
DAVDD
-
Power supply terminal (+3.3V)
196
YUV2
O
Chroma signal output to the video amplifier
197
DAVSS
-
Ground terminal
198
YUV3
O
Video signal output to the video amplifier
199
DAVDD
-
Power supply terminal (+3.3V)
200
YUV4
O
Chroma signal output to the video amplifier
201
DAVSS
-
Ground terminal
202, 203
YUV5, YUV6
O
Component video signal output to the video amplifier
204
DVDD3
-
Power supply terminal (+3.3V)
205
VSYNC
O
Vertical sync signal output terminal    Not used
206
YUV7
O
Video data output terminal    Not used
207
HSYNC
O
Horizontal sync signal output terminal    Not used
208
SMSCK
O
Serial data transfer clock signal output terminal    Not used
209
SMSDI
I
Serial data input terminal    Not used
210
SMSDO
O
Serial data output terminal    Not used
211
XSMCS
O
Chip select signal output terminal    Not used
212
DVDD3
-
Power supply terminal (+3.3V)
213
ALRCK
O
L/R sampling clock signal output to the DSP
214
ABCK
O
Bit clock signal output to the DSP
215
ACLK
O
Master clock signal output to the DSP
216
DVSS
-
Ground terminal
217 to 219
ASDATA0 to
ASDATA2
O
Audio serial data output to the DSP
220
XRST
O
Reset signal output terminal    Not used
221
DVDD18
-
Power supply terminal (+1.8V)
222
ASDATA4
O
Audio serial data output terminal    Not used
223
DVSS
-
Ground terminal
224
DWIDE
-
Not used
225
SPDIF
O
SPDIF digital audio signal output to the digital audio interface receiver
226
RFGND18
-
Ground terminal
227
RFVDD18
-
Power supply terminal (+1.8V)
228
XTALO
O
System clock output terminal (27 MHz)
229
XTALI
I
System clock input terminal (27 MHz)
230
JITFO
O
Output terminal of the RF jitter meter
67
HCD-X1G
Pin No.
Pin Name
I/O
Description
231
JITFN
I
Input terminal of the RF jitter meter
232
PLLVSS
-
Ground terminal
233
IDAC
-
Not used
234
PLLVDD3
-
Power supply terminal (+3.3V)
235
LPFON
O
Data PLL loop filter output terminal
236
LPFIP
I
Data PLL loop filter input terminal
237
LPFIN
I
Data PLL loop filter input terminal
238
LPFOP
O
Data PLL loop filter output terminal
239
VDD3
-
Power supply terminal (+3.3V)
240
VCM
-
Not used
241
VSS
-
Ground terminal
242
VREFP
-
For reference voltage terminal
243
VREFN
-
For reference voltage terminal
244
RFVDD3
-
Power supply terminal (+3.3V)
245
RFRPDC
O
RF ripple detect output terminal
246
RFRPAC
I
RF ripple detect input terminal
247
HRFZC
I
High frequency RF ripple zero crossing terminal
248
CRTPLP
O
Defect level filter capacitor connecting terminal
249
RFGND
-
Ground terminal
250
CEQP
-
Not used
251
CEQN
-
Not used
252
OSP
O
RF offset cancellation capacitor connecting terminal
253
OSN
O
RF offset cancellation capacitor connecting terminal
254
RFGC
O
RF AGC loop capacitor connecting for DVD-ROM
255
IREF
I
Reference current input terminal
256
AVDD3
-
Power supply terminal (+3.3V)
68
HCD-X1G
MAIN BOARD  IC501 M30622MGP-A53FPU0 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DAMP SCDT
O
Serial data output to the stream processor
2
DAMP SHIFT
O
Shift clock signal output to the stream processor
3
V-CONTROL
-
Not used
4
SIRCS_IN
I
Remote control signal input terminal
5
COM_DATA
O
Serial data output to the digital audio interface receiver and DSP
6
DSP_DOUT
I
Serial data input from the DSP
7
COM_CLK
O
Serial data transfer clock signal output to the digital audio interface receiver and DSP
8
BYTE
-
Not used
9
CNVSS
-
Not used
10, 11
-
-
Not used
12
RESET
I
System reset signal input terminal    "L": reset
For several hundreds msec. after the power supply rises, "L" is input, then it change to "H"
13
XOUT
O
Main system clock output terminal (5 MHz)
14
VSS
-
Ground terminal
15
XIN
I
Main system clock input terminal (5 MHz)
16
VCC
-
Power supply terminal (+3.3V)
17
NMI
-
Not used
18
DIR ZERO
I
Audio serial data input from the digital audio interface receiver
19
DIR_CSFLAG
I
CSFRAG data input from the digital audio interface receiver
20
AC_CUT
I
AC cut detection signal input terminal    "L": AC cut
21
-
-
Not used
22, 23
LED0, LED1
O
LED drive signal output terminal    "H": LED on
24
FL_CLK
O
Serial data transfer clock signal output to the FL driver
25
MAMUTE
I
Muting request signal input from the servo DSP
26
STBY_LED
O
LED drive signal output of the STANDBY indicator    "H": LED on
27
FL_D_OUT
O
Serial data output to the FL driver
28
FL_CS
O
Chip select signal output to the FL driver
29
I2C_CLK
-
Not used
30
I2C_DATA
-
Not used
31
DVD SID
O
Serial data output to the servo DSP
32
DVD SOD
I
Serial data input from the servo DSP
33
DVD SCO
I
Serial data transfer clock signal input from the servo DSP
34
DVD XIFBUSY
I
Busy signal input from the servo DSP
35 to 37
-
-
Not used
38
SEL1FS
O
Data select signal output terminal
39
DVD XIFCS
O
Chip select signal output to the servo DSP
40
P_CONT1
O
Power on/off control signal output to the regulator IC
41
FL_RESET
O
System reset signal output to the FL driver    "L": reset
42
OCSW
I
Disc slot in/out detection switch input terminal
43
MTK XRST
O
System reset signal output to the servo DSP    "L": reset
44
P_CONT2
O
Power on/off control signal output to the regulator IC and power supply circuit
45
DEVICE
I
Fixed at "H" in this set (TI)
46
CE
-
Not used
47
DRIVE_RST
O
Reset signal output to the power driver    "L": reset
48
DRIVE_OCP
I
Shut down state input from the power driver    "L": shut down
49
OVERFLOW1
I
Over flow status 1 input stream processor
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