Sony DAV-FZ900KW / DAV-FZ900M / HCD-FZ900KW Service Manual ▷ View online
HCD-FZ900KW/FZ900M
77
Pin No.
Pin Name
I/O
Description
54
DRIVER_RST(EN)
O
D-AMP driver reset signal output
55
OVERFLOW1
I
D-AMP processor F/C/S over fl ow detect signal input
56
OVERFLOW2
I
D-AMP processor SW over fl ow detect signal input
57
DAMP INIT
O
D-AMP processor reset signal output
58
SOFT MUTE
O
D-AMP processor soft muting signal output
59
DAMP LAT1
O
D-AMP processor latch-1 (Front L/R) signal output
60
DAMP LAT2
O
D-AMP processor latch-2 (Center/Subwoofer) signal output
61
DAMP LAT3
O
D-AMP processor latch-3 (Surround L/R) signal output
62
VCC
—
Power supply (BUP+3.3V)
63
LINK_SW
O
Not used. (Open)
64
VSS
—
Ground
65
JACK1/JACK2/
DMP_DET
I
MIC/HEADPHONE insert detect and DMPORT detect signal input
66
DC_DET
I
Speaker DC balance protect signal input
67
SD/PVDD_DET
I
D-AMP driver shut down signal and PVDD detect signal input
68
A.CAL_OUT/DSP_INTR
I
DSP interrupt signal input
69
SACD_SEL
O
DSP input data select (SA-CD or others) signal output
70
DIR_HCE/EHDMI_SEL
O
DIR chip enable signal output
71
HP_MUTE/
S_AIR_Rcv_SEL
O
HEADPHONE muting signal output
72
HDMI_PCONT
O
HDMI hot plug power control signal output
73
KEY_INT
I
Wakeup signal input from function key
74
RDS-DATA
I
RDS data input
75
RDS_CLK
I
RDS clock input
76
ST_CE
O
TUNER chip enable signal output
77
ST_DI/MIC_DATA
O
TUNER serial data output
78
ST_DO
I
TUNER serial data input
79
ST_CLK/MIC_CLK
O
TUNER serial clock output
80
TUNED
I
TUNER TUNED signal input
81
V_SEL0
O
Video select signal output
82
V_SEL1
O
Video select signal output
83
V_SEL2
O
Video select signal output
84
IO_CE/ASEL0
O
Audio select signal output
85
IO_RESET/ASEL1
O
Audio select signal output
86
IO_DI/ASEL2
O
Audio select signal output
87
IO_DO/ASEL3
O
Audio select signal output
88
IO_CLK/ASEL4
O
Audio select signal output
89
ASEL5
O
Audio select signal output
90
MONO/ST_DET
I
MIC jack MONO or STEREO detect signal input
91
A.CAL MIC LEVEL/
DSP_MASTER
I
MIC input level detect signal input for Auto Calibration or DSP serial fl ash operation mode
signal input
signal input
92
DESTINATION
I
Destination select input
93
MODEL
I
Model select input
94
KEY2
I
Key 2 input
95
KEY1
I
Key 1 input
96
VSS
—
Ground
97
KEY0
I
Key 0 input
98
Vref
—
Reference voltage (3.3V)
99
VCC
—
Power supply (+3.3V)
100
DIR_HDOUT
I
DIR data input
HCD-FZ900KW/FZ900M
78
DSP BOARD IC700 ADSST-AVR-1115 (DIGITAL AUDIO SIGNAL PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
VDDINT
—
Power supply terminal (+1.2V)
2, 3
CLKCFG0, CLKCFG1
I
Clock frequency setting terminal
4, 5
BOOTCFG0,
BOOTCFG1
I
Boot mode setting terminal for DSP
6
GND
—
Ground terminal
7
VDDEXT
—
Power supply terminal (+3.3V)
8
GND
—
Ground terminal
9
VDDINT
—
Power supply terminal (+1.2V)
10
GND
—
Ground terminal
11
VDDINT
—
Power supply terminal (+1.2V)
12
GND
—
Ground terminal
13
VDDINT
—
Power supply terminal (+1.2V)
14
GND
—
Ground terminal
15
FLAG0/INT_REQ
O
Interrupt status signal output to the main system control
16
FLAG1/DIR_ERR
O
PLL lock error signal and data error fl ag output to the main system control
17
AD7
I/O
Two-way data bus and address signal output Not used. (Open)
18
GND
—
Ground terminal
19
VDDINT
—
Power supply terminal (+1.2V)
20
GND
—
Ground terminal
21
VDDEXT
—
Power supply terminal (+3.3V)
22
GND
—
Ground terminal
23
VDDINT
—
Power supply terminal (+1.2V)
24 to 26
AD6 to AD4
I/O
Two-way data bus and address signal output Not used. (Open)
27
VDDINT
—
Power supply terminal (+1.2V)
28
GND
—
Ground terminal
29, 30
AD3, AD2
I/O
Two-way data bus and address signal output Not used. (Open)
31
VDDEXT
—
Power supply terminal (+3.3V)
32
GND
—
Ground terminal
33, 34
AD1, AD0
I/O
Two-way data bus and address signal output Not used. (Open)
35
WR
O
Data write enable signal output “L”: active Not used. (Open)
36, 37
VDDINT
—
Power supply terminal (+1.2V)
38
GND
—
Ground terminal
39
RD
O
Read strobe signal output “L”: active Not used. (Open)
40
ALE
O
Address latch enable signal output Not used. (Open)
41 to 43
AD15 to AD13
I/O
Two-way data bus and address signal output Not used. (Open)
44
GND
—
Ground terminal
45
VDDEXT
—
Power supply terminal (+3.3V)
46
AD12
I/O
Two-way data bus and address signal output Not used. (Open)
47
VDDINT
—
Power supply terminal (+1.2V)
48
GND
—
Ground terminal
49 to 52
AD11 to AD8
I/O
Two-way data bus and address signal output Not used. (Open)
53
A16/DAI_P1
O
Address signal output Not used. (Open)
54
VDDINT
—
Power supply terminal (+1.2V)
55
GND
—
Ground terminal
56, 57
A17/DAI_P2,
A18/DAI_P3
O
Address signal output Not used. (Open)
58
GND
—
Ground terminal
59
VDDEXT
—
Power supply terminal (+3.3V)
60
VDDINT
—
Power supply terminal (+1.2V)
61
GND
—
Ground terminal
62
PF_CE/DAI_P4
I/O
Chip enable signal input/output Not used. (Open)
63
SPI_MAS/DAI_P5
O
Master/slave selection signal output “L”: DSP is master
64
FL/FR DPSOA/DAI_P6
O
PCM audio signal output
65
SL/SR DPSOB/DAI_P7
O
PCM audio signal output
66
VDDINT
—
Power supply terminal (+1.2V)
HCD-FZ900KW/FZ900M
79
Pin No.
Pin Name
I/O
Description
67
GND
—
Ground terminal
68
VDDINT
—
Power supply terminal (+1.2V)
69
GND
—
Ground terminal
70
C/SW DPSOC/DAI_P8
O
PCM audio signal output
71
SBL/SBR
DPSOD/DAI_P9
O
PCM audio signal output Not used. (Open)
72
VDDINT
—
Power supply terminal (+1.2V)
73
VDDEXT
—
Power supply terminal (+3.3V)
74
GND
—
Ground terminal
75
VDDINT
—
Power supply terminal (+1.2V)
76
GND
—
Ground terminal
77
LT/RT DPSOE/DAI_P10
O
PCM audio signal output
78
COMPRESSED
STREAM
DPSIA/DAI_P11
I
PCM digital audio signal input
79
LPCM FL/FR
DPSIB/DAI_P12
I
PCM digital audio signal input
80
LPCM SL/SR
DPSIC/DAI_P13
I
PCM digital audio signal input
81
LPCM C/SW
DPSID/DAI_P14
I
PCM digital audio signal input
82
LPCM SBL/SBR
DPSIE/DAI_P15
DPSIE/DAI_P15
I
PCM digital audio signal input
83
VDDINT
—
Power supply terminal (+1.2V)
84, 85
GND
—
Ground terminal
86
DPDVLRCK/DAI_P16
O
Sampling clock signal output
87
DPDVBCK/DAI_P17
O
Bit clock signal output
88
DPLRCK/DAI_P18
I
Sampling clock signal input
89
DPBCK/DAI_P19
I
Bit clock signal input
90
VDDINT
—
Power supply terminal (+1.2V)
91, 92
GND
—
Ground terminal
93
VDDEXT
—
Power supply terminal (+3.3V)
94
DPFSCK/DAI_P20
I
Master clock signal input
95
GND
—
Ground terminal
96
VDDINT
—
Power supply terminal (+1.2V)
97
NONAUDIO/FLAG2
I
Digital input signal switch control signal input
98
SF_CE/FLAG3
O
Chip enable signal output
99
VDDINT
—
Power supply terminal (+1.2V)
100
GND
—
Ground terminal
101
VDDINT
—
Power supply terminal (+1.2V)
102
GND
—
Ground terminal
103
VDDINT
—
Power supply terminal (+1.2V)
104
GND
—
Ground terminal
105
VDDINT
—
Power supply terminal (+1.2V)
106
GND
—
Ground terminal
107, 108
VDDINT
—
Power supply terminal (+1.2V)
109
GND
—
Ground terminal
110
VDDINT
—
Power supply terminal (+1.2V)
111
GND
—
Ground terminal
112
VDDINT
—
Power supply terminal (+1.2V)
113
GND
—
Ground terminal
114
VDDINT
—
Power supply terminal (+1.2V)
115
GND
—
Ground terminal
116
VDDEXT
—
Power supply terminal (+3.3V)
117
GND
—
Ground terminal
118
VDDINT
—
Power supply terminal (+1.2V)
119
GND
—
Ground terminal
120
VDDINT
—
Power supply terminal (+1.2V)
HCD-FZ900KW/FZ900M
80
Pin No.
Pin Name
I/O
Description
121
RESET
I
System reset signal input
122
SPIDS
I
Serial data latch pulse signal input
123
GND
—
Ground terminal
124
VDDINT
—
Power supply terminal (+1.2V)
125
SPICLK
I/O
Serial data transfer clock signal input/output
126
MISO
I/O
When DSP is master: Serial data input
When DSP is slave: Serial data output
When DSP is slave: Serial data output
127
MOSI
I/O
When DSP is master: Serial data output
When DSP is slave: Serial data input
When DSP is slave: Serial data input
128
GND
—
Ground terminal
129
VDDINT
—
Power supply terminal (+1.2V)
130
VDDEXT
—
Power supply terminal (+3.3V)
131
AVDD
—
Power supply terminal (+1.1V)
132
AVSS
—
Ground terminal
133
GND
—
Ground terminal
134
CLKOUT
—
Not used. (Open)
135
EMU
—
Not used.
136
TDO
—
Not used.
137
TDI
—
Not used.
138
TRST
—
Not used.
139
TCK
—
Not used.
140
TMS
—
Not used.
141
GND
—
Ground terminal
142
CLKIN
I
System clock input (25 MHz)
143
XTAL
O
System clock output (25 MHz)
144
VDDEXT
—
Power supply terminal (+3.3V)
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