Sony DAV-DZ910W / HBD-DZ910W Service Manual ▷ View online
HBD-DZ910W
65
Pin No.
Pin Name
I/O
Description
157
REGRST
O
REG reset signal output for Focus/Tracking/Sledding motor driver
158
MUTE
O
Mute signal output for Spindle motor
159
DDC_DA
I/O
HDMI DDC line data input/output
160
DVDD18
—
Power supply (+1.8V)
161
DDC_CLK
I/O
HDMI DDC line clock input/output
162
HTPLG
I
HDMI HPD signal input
163
AGND3
—
Ground
164
EXT_RES
—
Ext. resistor connected terminal
165, 166
AVDD3
—
Power supply (+3.3V)
167
EXT_CAP
—
Ext. capacitor connected terminal
168, 169
AGND3, AGND18
—
Ground
170
TXCN
O
HDMI TXD-clock output
171
TXCP
O
HDMI TXD-clock output
172
AVDD18
—
Power supply (+1.8V)
173
TX0N
O
HDMI TXD-0 output
174
TX0P
O
HDMI TXD-0 output
175
AGND18
—
Power supply (+1.8V)
176
TX1N
O
HDMI TXD-1 output
177
TX1P
O
HDMI TXD-1 output
178
AVDD18
—
Power supply (+1.8V)
179
TX2N
O
HDMI TXD-2 output
180
TX2P
O
HDMI TXD-2 output
181
AGND18
—
Power supply (+1.8V)
182
R/Cr/Pr
O
Video chroma R/Cr/Pr signal output
183
B/Cb/Pb
O
Video chroma B/Cb/Pb signal output
184
DACVSSA
—
Ground
185
Y/G
O
Video Y/chroma G signal output
186
DACVDDA
—
Power supply (+3.3V)
187
CVBS
O
Video Composite signal output
188
DACVSSB
—
Ground
189
C
O
Video chroma signal output (Not used in this set)
190
DACVDDB
—
Power supply (+3.3V)
191
Y
O
Video Y signal output (Not used in this set)
192
DACVSSC
—
Ground
193
FS
I
Full Scale Adjustment setting terminal
194
VREF
I
Reference Voltage input terminal
195
DACVDDC
—
Power supply (+3.3V)
196
VBUS_OE
O
VBUS power control signal output
197
VBUS_OC
I
VBUS over current detect signal input
198
SCORE/DIR_XSTATE
I
DIR status signal input
199
SPMCK
I
DIR MCK clock input
200
SPBCK
I
DIR BCK clock input
201
SPLRCK
I
DIR LACK clock input
202
ADIN (SPDATA)
I
DIR digital data input
203
ACLK
O
A/D converter and DAMP clock output
204
ABCK
O
A/D converter and DAMP BCK clock output
205
ALRCK
O
A/D converter and DAMP LRCK clock output
206
MC_DATA (ADIN)
I
A/D converter digital data input
207
DVDD3
—
Power supply (+3.3V)
208
MIC
I
Mic detect status signal input
209
WIDE
O
WIDE select signal output (Not used in this set)
210
RGB_SEL/DSEL
O
Video output select signal output (Not used in this set)
211
TRG_SW
I
Not used. (Pull up)
212
DVDD18
—
Power supply (+3.3V)
213
KMOD
O
KARAOKE mode information signal output
214
XVOICE/DIR_CSFLAG
I
XVOICE signal input
215
SPDIF
O
Not used. (Open)
216
APLLVDD3
—
Power supply (+3.3V)
217
APLLCAP
—
Ext capacitor connected terminal
HBD-DZ910W
66
Pin No.
Pin Name
I/O
Description
218
APLLVSS
—
Ground
219
ADACVSS2
—
Ground
220
ADACVSS1
—
Ground
221
DIR_CE
O
DIR I/F chip select signal output
222
ASDATA3
O
Audio digital signal output to S-AIR transmitter
223
ASDATA2
O
Audio digital signal output to D-AMP
224
AVCM
—
Ext capacitor connected terminal
225
ASDATA1
O
Audio digital signal output to D-AMP
226
ASDATA0
O
Audio digital signal output to D-AMP
227
DIR_CL
O
DIR I/F clock output
228
ADACVDD1
—
Power supply (+3.3V)
229
ADACVDD2
—
Power supply (+3.3V)
230
Rt/DIR_DI
O
DIR I/F data output
231
Lt/DIR_DO
I
DIR I/F data input
232
ADACVSS3
—
Ground
233
ADACVDD3
—
Power supply (+3.3V)
234
SADCVDD18
—
Power supply (+1.8V)
235
SADCVSS18
—
Ground
236
RFGND18
—
Ground
237
RFVDD18
—
Power supply (+1.8V)
238
XTALO
O
Crystal output for main clock (27MHz)
239
XTALI
I
Crystal input for main clock (27MHz)
240
JITFO
O
The output terminal of RF jitter meter
241
JITFN
I
The input terminal of RF jitter meter
242
PLLVSS
—
Ground
243
PLLVDD3
—
Power supply (+3.3V)
244
LPFON
O
The negative output of loop fi lter amplifi er
245
LPFIP
I
The positive input terminal of loop fi lter amplifi er
246
LPFIN
I
The negative input terminal of loop fi lter amplifi er
247
LPFOP
O
The positive output of loop fi lter amplifi er
248
ADCVDD3
—
Power supply (+3.3V)
249
ADCVSS
—
Ground
250
RFVDD3
—
Power supply (+3.3V)
251
RFRPDC
O
RF ripple detect output
252
RFRPAC
I
RF ripple detect input (through AC-coupling)
253
HRFZC
I
High frequency RF ripple zero crossing
254
CRTPLP
O
Defect level fi lter capacitor connected terminal
255
RFGND18
—
Power supply (+3.3V)
256
OSP
O
RF offset cancellation capacitor connecting terminal
HBD-DZ910W
67
MAIN BOARD (5/8) IC503 R5F364AEDFA (SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Description
1
DAMP_SCD
O
DAMP processor data output
2
DAMP_SHIFT
O
DAMP processor clock output
3
FL_CS
O
FL driver chip select signal output
4
SIRCS_IN
I
Sircs signal input
5
FL_D_OUT
O
FL and LED driver data output
6
reserved (CEC_RX_IN)
O
CEC data input (Not used in this set)
7
FL_CLK
O
FL and LED driver clock output
8
BYTE
I
External data bus input. (Connected to ground)
9
CNVSS
I
Change processor mode input
10
NO USE
—
Not used. (Open)
11
NO USE
—
Not used. (Open)
12
RESET
I
System reset signal input
13
XOUT
O
Crystal output for main clock (5MHz)
14
VSS
—
Ground
15
XIN
I
Crystal input for main clock (5MHz)
16
VCC
—
Power supply (BUP +3.3V)
17
CEC_TX_RX
I/O
CEC data input/output
18
NO USE
—
Not used. (Open)
19
NO USE
—
Not used. (Open)
20
AC_CUT
I
AC-CUT detect signal input
21
NO USE
—
Not used. (Open)
22
NO USE
—
Not used. (Open)
23
NO USE
—
Not used. (Open)
24
NO USE
—
Not used. (Open)
25
NO USE
—
Not used. (Open)
26
reserved
(CEC_TX_OUT)
O
CEC data output (Not used in this set) (Open)
27
NO USE
—
Not used. (Open)
28
LED_ILLUMI
O
LED drive PWM signal output for illumination
29
S-AIR_SCL
I/O
S-AIR serial clock input/output
30
S-AIR_SDA
I/O
S-AIR serial data input/output
31
I2C_DATA/TXD1
I/O
I2C data (debug) and Flash Write TXD data input/output
32
I2C_CLK/RXD1
I/O
I2C clock (debug) and Flash Write RXD data input/output
33
CLK1
O
Flash Write CLK signal output
34
RST1
O
Flash Write RST signal output
35
GPIO2
I
S-AIR interrupt signal input
36
S-AIR_DET
I
S-AIR unit detect signal input
37
S-AIR_RST
O
S-AIR reset signal and SRC reset signal output
38
S-AIR_ADC_SEL
O
S-AIR AD converter select signal output
39
P_CONT1
O
Power control signal output
40
reserved (NSP_MUTE)
—
Not used.
41
P_CONT_FL
O
Power control signal output
42
DC_CONT
O
A.CAL MIC DC control signal output
43
NO USE
—
Not used. (Open)
44
CDM_OPEN_SW
I
CDM open switch signal input
45
MTK_RST
O
Reset signal output to CDX9917R or CDX9927R
46
CE
I
Flash Write CE signal input
47
DVD_SID
O
Serial data output to CDX9917R or CDX9927R
48
DVD_SOD
I
Serial data input from CDX9917R or CDX9927R
49
DVD_SCO
I
Serial clock input from CDX9917R or CDX9927R
50
DVD_XIFBUSY
O
Busy request signal output to CDX9917R or CDX9927R
51
DVD XIFCS
I
Chip select signal input
52
TV_SEL/
MIC_DET_OUT
O
Mic detect status signal output
53
KARAOKE_MODE
I
KARAOKE mode information signal input.
54
DRIVER_RST(EN)
O
D-AMP driver reset signal output
55
OVERFLOW1
I
D-AMP processor F/C/S over fl ow detect signal input
56
OVERFLOW2
I
D-AMP processor SW over fl ow detect signal input
57
DAMP INIT
O
D-AMP processor reset signal output
HBD-DZ910W
68
Pin No.
Pin Name
I/O
Description
58
DAMP_SOFT_MUTE
O
D-AMP processor soft muting signal output
59
DAMP_LATCH1
O
D-AMP processor latch-1 (Front L/R) signal output
60
DAMP_LATCH2
O
D-AMP processor latch-2 (Surround L/R) signal output
61
DAMP_LATCH3
O
D-AMP processor latch-3 (Center/Subwoofer) signal output
62
VCC
—
Power supply (BUP+3.3V)
63
LINK_SW
O
LINK (S-AIR Headphone) control signal output
64
VSS
—
Ground
65
MIC/A.CAL_SW
MIC2_SW
I
MIC insert detect signal input
66
DC_DET
I
Speaker DC balance protect signal input
67
SD/PVDD_DET
I
D-AMP driver shut down signal and PVDD detect signal input
68
A.CAL_OUT_LEVEL
I
Speaker output detect signal input for audio calibration
69
MIC_DATA
O
MIC volume data output
70
MIC_CLK
O
MIC volume clock output
71
NO USE
—
Not used. (Open)
72
HDMI_PCONT
O
HDMI hot plug power control signal output
73
KEY_INT
I
Wakeup signal input from function key
74
RDS-DATA
I
RDS data input (Not used in this set)
75
RDS_CLK
I
RDS clock input (Not used in this set)
76
ST_CE
O
TUNER chip enable signal output
77
ST_DI
O
TUNER serial data output
78
ST_DO
I
TUNER serial data input
79
ST_CLK
O
TUNER serial clock output
80
TUNED
I
TUNER TUNED signal input
81
V_SEL0
O
Video select signal output
82
V_SEL1
O
Video select signal output
83
NO USE
—
Not used. (Open)
84
ASEL0
O
Audio select signal output
85
ASEL1
O
Audio select signal output
86
ASEL2
O
Audio select signal output
87
reserved (ASEL)
—
Not used. (Open)
88
NO USE
—
Not used. (Open)
89
reserved (EUP)
—
Not used.
90
NO USE
—
Not used. (Open)
91
A.CAL MIC LEVEL
I
MIC input level detect signal input for Auto Calibration
92
DESTINATION
I
Destination select input
93
MODEL
I
Model select input
94
KEY2
I
Key 2 input
95
KEY1
I
Key 1 input
96
VSS
—
Ground
97
KEY0
I
Key 0 input
98
Vref
—
Reference voltage (3.3V)
99
VCC
—
Power supply (+3.3V)
100
MODEL SERIES
I
Series select input
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