Sony DAV-DZ100 / HCD-DZ100 Service Manual ▷ View online
53
HCD-DZ100
IC108, 109, 110 CXD9843AR
IC101-106 CXD9774M
– MAIN Board –
RESET 4
GND 1
GND 3
PWM BP 2
DREG RTN 5
GVDD 6
M3 7
M1 10
M2 11
DVDD 12
DREG 8
DGND 9
DGND 14
GND 16
GND 18
PWM
RECEIVER
TIMING
CONTROL
&
PROTECTION
SD 13
OTW 15
DIGITAL
REGULATOR
PROTECTION
LOGIC
OT
&
UVP
DVDD DREG
DREG
DGND
PWM AP 17
PWM
RECEIVER
DVDD DREG
DGND
DREG
GVDD
DREG
GATE
DRIVE
GVDD B
35
GVDD B
36
BST B
33
PVDD B
32
PVDD B
31
OUT B
30
OUT B
29
GND
28
GND
34
GATE
DRIVE
OCH
OCL
TIMING
CONTROL
&
PROTECTION
DREG
GATE
DRIVE
GVDD A
20
GVDD A
19
BST A
22
PVDD A
23
PVDD A
24
OUT A
25
OUT A
26
GND
27
GND
21
GATE
DRIVE
OCH
OCL
GVDD
GVDD
S
P
Sampling Rate
Converter
Converter
DF1
DF2
Gain
Control
Filter
&
LOW
CUT
Filter
Serial Control
Liner
Interpolator
∆ ∑ Converter
XVSS
PWM
INIT/MUTE
Clock Generator
Clock Generator
(Secondary Clock System)
1
VSUBC
2
VSSR
VSSL
VSSL
VSSR
3
OUTR2
OUTL2
OUTR1
OUTL1
4
VDDR
DVDD
DVSS
VDDL
5
6
7
8
XOVSS
XOVDD
9
XFSOOUT
10 11
NSPMUTE
12
SOFTMUTE
13
PGMUTE
SCSHIFT
14
SCDT
15
SCLA
TCH
OVF FLAGR
OVF FLAGL
16
SFLAG
INIT
17
MCKSEL
18
LRCK
19
BCK
20
D
ATA
BFVDD
BFVSS
TEST
DVDD
XFSIIN
21
42
43
41 40 39 38 37
XFSOIN
36
XVDD
35
HPVDDL
34
HPOUTL2
33
HPVSSL
32
31
HPVDDR
30
HPOUTR1
HPOUTL1
29
28
HPVSSR
27
26
25
HPOUTR2
24
FSOI
23
FSOCKO
22
44
45
46
47
48
(Primary Clock System)
54
HCD-DZ100
IC802 PT6315
– FL Board –
1
2
3
4
5
4-bit latch
24-bit output latch
12-bit shift register
Data selector
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
Serial
interface
OSC
Timing generator
key scan
Display memory
24 bits x 12 words
Key data memory
(2 x 16 bits)
Command decoder
segment driver
Grid driver
Multiplexed driver
39
40
41
42
43
44
LED1
LED2
LED3
LED4
OSC
DOUT
DIN
CLK
STB
KEY1
KEY2
VSS
VDD
SEG1/KS1
SEG2/KS2
SEG3/KS3
SEG4/KS4
SEG5/KS5
SEG6/KS6
SEG7/KS7
SEG8/KS8
SEG9/KS9
SEG10/KS10
SEG20/GRID9
SEG21/GRID8
SEG22/GRID7
SEG23/GRID6
SEG24/GRID5
GRID4
GRID3
GRID2
GRID1
VDD
VSS
SEG11/KS11
SEG12/KS12
SEG13/KS13
SEG14/KS14
SEG15/KS15
SEG16/KS16
VEE
SEG17/GRID12
SEG18/GRID11
SEG19/GRID10
55
HCD-DZ100
• IC Pin Function Description
MAIN BOARD IC509 M30620MCP-A01FPU0/M30620MCP-A15FPU0 (SYSTEM CONTROLLER)
MAIN BOARD IC509 M30620MCP-A01FPU0/M30620MCP-A15FPU0 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DAMP SCDT/
O
Digital amp (IC108 to 110) data output
DIAT_SDATA
2
DAMP SHIFT/
O
Digital amp (IC108 to 110) data output (not used)
DIAT_SCLK
3
XSCEN
O
Voltage control for amp (not used)
4
SIRCS_IN
I
Sircs input
5
DSP_DIN/DIR_DIN
O
DSP data input
6
DSP_DOUT
I
DSP/DIR data output (not used)
7
DSP_CLK/DIR_CLK
O
DSP/DIR clock output (not used)
8
BYTE
—
Ground terminal
9
CNVSS
I
Ground terminal
10
EN_A
I
Volume signal input from ENCODER (A)
11
EN_B
I
Volume signal input from ENCODER (B)
12
RESET
I
System reset signal input
13
XOUT
O
Crystal output for main clock
14
VSS
—
Ground terminal
15
XIN
I
Crystal input for main clock
16
VCC
—
Power supply (+3.3V)
17
NMI
I
Not used
18
DIR ZERO
I
DIR zero input (not used)
19
DIR_CSFLAG
I
DIR csflag input (not used)
20
AC_CUT
I
Detect AC-CUT (primary power off)
21
XRST
O
XRST signal output (not used)
22
V-CONTROL
O
Voltage control output (not used)
23
DIAT_CSOD
I
DIAT CSOB signal input (not used)
24
FL_CLK/LED_CLK
O
FL driver (IC802) / LED driver (IC803) clock output
25
MAMUTE
I
MAMUTE Signal input from DVD RF (IC102)
26
LED LAT
O
LED driver latch output
27
FL_D_OUT/LED_DATA
O
FL driver (IC802) / LED Driver (IC803) data output
28
FL_CS/STB
O
FL driver (IC802) chip select output
29
12C_CLK
I
12C clock input
30
12C_DATA
I
12C data input
31
DVD SID/TXDI
O
SID data output to DVD RF (IC102)
32
DVD SOD/RXDI
I
SOD data input from DVD RF (IC102)
33
DVD SCO/CLK1
I
Clock signal input from DVD RF (IC102)
34
DVD XIFBUSY/RTS1
O
IFBUSY signal output to DVD RF (IC102)
35
(NO USE)
—
Not used
36
(NO USE)
—
Not used
37
(NO USE)
—
Not used
38
SEL1FS
—
DIR_SELECT/Flash Write RTS1 (not used)
39
DVD XIFCS
O
DVD RF (IC102) chip select signal output
40
P_CONT1
O
IC REG control signal output
41
EMP/FL_RESET
O
Not used
42
SEN
O
OCSW signal output (not used)
43
MTK XRST
O
DVD reset signal output
44
P_CONT2
O
IC REG control signal output
45
DEVICE
O
Not used
Ver. 1.2
56
HCD-DZ100
Pin No.
Pin Name
I/O
Description
46
CE
O
Flash Write CE (not used)
47
DRIVE_RST(EN)
O
Driver signal reset
48
DRIVE_OCP(DIAG)
I
Digital amp (power driver) diag input
49
OVERFLOW1
I
Over flow status1 of digital amp input (IC110)
50
OVERFLOW2
I
Over flow status2 of digital amp input (IC108 to 110)
51
DAMP LATCH1
O
Digital amp (IC108) chip select1 signal output
52
DAMP LATCH2
O
Digital amp (IC109) chip select2 signal output
53
DAMP LATCH3
O
Digital amp (IC110) chip select3 signal output
54
DAMP INIT
O
Digital amp (IC108 to 110) reset signal output
55
DAMP SOFT MUTE
O
Digital amp (IC108 to 110) soft muting output
56
HP SW
I
Switch headphone is insert signal input
57
HP MUTE
O
Control of muting headphone signal output
58
DSP_ACK
I
DSP acknowledge input (not used)
59
DSP_GP9
I
DSP GP9 input (not used)
60
DSP_XRST
O
DSP reset output (not used)
61
DSP_HCE
O
DSP chip enable output (not used)
62
VCC
—
Power supply (+3.3V)
63
DSP_BST
O
DSP bootstrap output (for DSP INIT) (not used)
64
VSS
—
Ground terminal
65
DSP_PM
O
DSP pll initial output (not used)
66
DIR RST
O
DIR reset output (not used)
67
DIR HCE
O
DIR chip enable signal output (not used)
68
DIR RERR
I
DIR error input (not used)
69
DIR XSTATE
I
DIR change clock status input (not used)
70
DIR HDOUT
I
DIR Data input (not used)
71
DSP_SKIP
O
DSP GP12 output (not used)
72
AD_RST
O
ADC reset output (not used)
73
MODEO
—
Not used
74
KEY INT
I
Wakeup from ECO mode by key input
75
RDS-CLK/MIC-CLK
O
Tuner RDS clock output
76
RDS-DATA/MIC-DATA
I
Tuner RDS data input
77
PLL-CLK
O
Tuner clock output
78
PLL-DO
O
Tuner data output (uCOM
→pack)
79
PLL-CE
O
Tuner chip enable output
80
PLL-DI
I
Tuner data input (pack
→uCOM)
81
AV SELECT 0
O
Audio/Video select0 output
82
AV SELECT 1
O
Audio/Video select1 output
83
AV SELECT 2
O
Audio/Video select2 output
84
AV SELECT 3
O
Audio/Video select3 output (not used)
85
TUNED
I
Tuner pack tuned input
86
IO_CE
O
I/O expander chip enable / control of loading CD tray (open action)
87
IO_RESET
O
I/O expander reset / control of loading CD tray (close action)
88
IO_DI
I
I/O expander data in / SW2 of CDM
89
IO_DO
O
I/O expander data out / SW3 of CDM
90
IO_CLK
O
I/O expander clock output
91
IPOD/MIC SW
O
Audio signal mute control output
92
DESTINATION
I
Destination select input
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