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Model
CX-JV3 JAX-V3
Pages
95
Size
8.81 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
cx-jv3-jax-v3.pdf
Date

Sony CX-JV3 / JAX-V3 Service Manual ▷ View online

58
CX-JV3
 VMP50 BOARD  IC802  ES3889 (MPEG VIDEO/AUDIO DECODER)
Pin No.
Pin Name
I/O
Description
1, 2
GND
Ground terminal
3
NC
Not used
4, 5
VDD
Power supply terminal (+5V)
6
DSC-C
I
Clock signal input from the video CD MPEG processor
7
AUX00
I
Video system select switch input terminal    “L”: PAL, “H”: AUTO or NTSC
8
DSCD0
I/O
Two-way data bus with the video CD MPEG processor    Data input from the program ROM
9
AUX01
I
Video system select switch input terminal    “L”: NTSC, “H”: PAL or AUTO
10
DSC-C
I
Strobe signal input from the video CD MPEG processor
11
AUX02
O
Serial data load output to the D/A converter
12
DCLK
O
System clock signal output to the video CD MPEG processor
13
RST
I
Reset signal input terminal    “L”: reset
14
AUX07
I
Internal status (SENSE) signal input from the digital signal processor
15
MUTE
O
Audio muting on/off control signal output terminal    Not used
16
VDD
Power supply terminal (+5V)
17
MCLK
I
Audio master clock signal input from the video CD MPEG processor
18
AUX08
O
Laser diode on/off control signal output to the RF amplifier    “L”: laser diode on
19
TWS
I
Audio frame sync signal input from the video CD MPEG processor
20
AUX09
I/O
Subcode Q data input from the video CD MPEG processor
21
TSD
I
Audio data input from the video CD MPEG processor
22
TBCK
I
Audio bit clock signal (2.8224 MHz) input from the video CD MPEG processor
23
PWS/SPLL1
I/O
Audio frame sync signal output to the video CD MPEG processor
Selection signal input terminal for the PLL clock frequency of the DCLK (pin qs) output
(fixed at “H” in this set)
24
RSTOUT
O
Reset signal output to the video CD MPEG processor    “L”: reset
25, 26
GND
Ground terminal
27, 28
NC
Not used
29 to 31
GND
Ground terminal
32
VDD
Power supply terminal (+5V)
33
RSD/SPLL0
I/O
Audio data output to the video CD MPEG processor
Selection signal input terminal for the PLL clock frequency of the DCLK (pin qs) output
(fixed at “L” in this set)
34
AUX10
O
Reading clock signal output to the digital signal processor
35
AUX11
I
Interrupt request signal input from the video CD MPEG processor
36
AUX12
I
C2 pointer signal input from the digital signal processor
37
RBCK/SER IN
I/O
Audio bit clock signal (2.8224 MHz) output to the video CD MPEG processor
Selection signal input terminal for the serial input DSC mode
“L”: parallel DSC mode, “H”: serial DSC mode (fixed at “L” in this set)
38
AUX13
O
Reset signal output to the digital signal processor and motor/coil driver    “L”: reset
39
AUX14
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
40
AUX15
I
Serial data input from the system controller
41
AGND
Ground terminal (analog system)
42
VREFM
I
Not used
43
VREFP
I
Not used
44
AVDD
Power supply terminal (+5V) (analog system)
45
AOR+
O
Audio data (R-ch) output to the electrical volume
46
AOR–
O
Audio data (R-ch) output to the electrical volume
47
AOL+
O
Audio data (L-ch) output to the electrical volume
59
CX-JV3
Pin No.
Pin Name
I/O
Description
48
AOL–
O
Audio data (L-ch) output to the electrical volume
49, 50
MIC2, MIC1
I
MIC signal input terminal    Not used
51
AGND
Ground terminal (analog system)
52
VREF
I
Not used
53
VCM
I
Not used
54
RSET
I
Not used
55
COMP
I
Not used
56, 57
VGND
Ground terminal (video analog system)
58
CDAC
O
Modulated chrominance output terminal    Not used
59, 60
VVDD
Power supply terminal (+5V) (for video)
61
YDAC
O
Y luminance data bus terminal    Not used
62, 63
VGND
Ground terminal (video analog system)
64
VDAC
O
Composite video signal output terminal
65
ACAP
I
Not used
66
VDD
Power supply terminal (+5V)
67
AUX06
O
Serial data latch pulse signal output to the digital signal processor
68
AUX05
O
Serial data latch pulse signal output to the digital signal processor and D/A converter
69
AUX04
O
Laser diode on/off control signal output to the RF amplifier    “L”: laser diode on
70
AUX03
I/O
Not used
71
XOUT
O
System clock output terminal (27 MHz)
72
GND
Ground terminal
73
VDD
Power supply terminal (+5V)
74
XIN
I
System clock input terminal (27 MHz)
75
GND
Ground terminal
76
NC
Not used
77
GND
Ground terminal
78
VDD
Power supply terminal (+5V)
79
PCK
O
13.5 MHz pixel clock signal output to the video CD MPEG processor
80
PCK2
O
27 MHz pixel clock signal output to the video CD MPEG processor
81
DSCD7
I/O
Two-way data bus with the video CD MPEG processor    Data input from the program ROM
82
HSYNC
O
Horizontal sync signal output to the video CD MPEG processor    “L”: active
83
DSCD6
I/O
Two-way data bus with the video CD MPEG processor    Data input from the program ROM
84
VSYNC
O
Vertical sync signal output to the video CD MPEG processor    “L”: active
85
DSCD5
I/O
Two-way data bus with the video CD MPEG processor    Data input from the program ROM
86 to 89
YUV7 to YUV4
I
YUV 8-bit video data bus input from the video CD MPEG processor
90
VDD
Power supply terminal (+5V)
91
GND
Ground terminal
92
YUV3
I
YUV 8-bit video data bus input from the video CD MPEG processor
93
DSCD4
I/O
Two-way data bus with the video CD MPEG processor    Data input from the program ROM
94
YUV2
I
YUV 8-bit video data bus input from the video CD MPEG processor
95
DSCD3
I/O
Two-way data bus with the video CD MPEG processor    Data input from the program ROM
96
YUV1
I
YUV 8-bit video data bus input from the video CD MPEG processor
97
DSCD2
I/O
Two-way data bus with the video CD MPEG processor    Data input from the program ROM
98
YUV0
I
YUV 8-bit video data bus input from the video CD MPEG processor
99
DSCD1
I/O
Two-way data bus with the video CD MPEG processor    Data input from the program ROM
100
GND
Ground terminal
60
CX-JV3
  PANEL BOARD  IC901 LC876764C-52M9-E (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
SYS-MUTE
O
Line muting on/off control signal output terminal
2
LATCH (ECHO)
O
Serial data latch pulse signal output to the digital echo
3
TU/EVOL DO
O
Serial data output to the FM/AM tuner unit, motor/plunger driver and electrical volume
4
NC
O
Not used
5
CD DATAO
O
Serial data output to the MPEG video/audio decoder
6
CD ON
O
Power supply on/off control signal output for the CD/video CD section    “H”: power on
7
CLK-SHIFT
O
Shift clock signal output terminal    Not used
8
LCK
O
Serial data latch pulse clock signal  output to the motor/plunger driver
9
TU CE
O
Chip enable signal output to the FM/AM tuner unit
10
NC
I
Not used
11
RESET
I
System reset signal input from the reset signal generator    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
12
XT1
I
System clock input terminal (32.768 kHz)
13
XT2
O
System clock output terminal (32.768 kHz)
14
VSS1
Ground terminal
15
CF1
I
System clock input terminal (8.64 MHz)
16
CF2
O
System clock output terminal (8.64 MHz)
17
VDD1
Power supply terminal (+3.3V)
18
POWER DOWN
I
Power down detection signal input terminal
19
TU-SIG/MIC
I
MIC signal input terminal
20
CD BUSY SW
I
Optical pick-up up/down detection and tray open/close detection signal input terminal
21
SPEANA-L
I
Spectrum analyzer drive signal input terminal (low band)
22
SPEANA-M
I
Spectrum analyzer drive signal input terminal (middle band)
23
SPEANA-H
I
Spectrum analyzer drive signal input terminal (high band)
24 to 26
KEY3 to KEY1
I
Front panel key input terminal (A/D input)
27
HOLD
I
System malfunction signal (hold signal) input from the power amplifier circuit
28
DATA (ECHO)
O
Serial data output to the digital echo
29
RMC
I
Remote control signal input terminal
30 to 40
G1 to G11
O
Grid drive signal output to the fluorescent indicator tube
41 to 45
S1 to S5
O
Segment drive signal output to the fluorescent indicator tube
46
VDD3
Power supply terminal (+3.3V)
47
A PHOTO/S6
I/O
Deck-A tape reel rotating detection signal input and segment drive signal output to the fluorescent
indicator tube
48
B PHOTO/S7
I/O
Deck-B tape reel rotating detection signal input and segment drive signal output to the fluorescent
indicator tube
49
REC REV/S8
I/O
Recording (reverse direction) detection signal input and segment drive signal output to the
fluorescent indicator tube
50
B MODE/S9
I/O
Deck-B mode detection signal input and segment drive signal output to the fluorescent indicator
tube
51
FIX0
I/O
Not used
52
B HALF/S10
I/O
Deck-B cassette detection signal input  and segment drive signal output to the fluorescent
indicator tube
53
REC FWD/S11
I/O
Recording (forward direction) detection signal input and segment drive signal output to the
fluorescent indicator tube
54
A HALF/S12
I/O
Deck-A cassette detection signal input  and segment drive signal output to the fluorescent
indicator tube
61
CX-JV3
Pin No.
Pin Name
I/O
Description
55
A MODE/S13
I/O
Deck-A mode detection signal input and segment drive signal output to the fluorescent indicator
tube
56 to 71
S14 to S29
O
Segment drive signal output to the fluorescent indicator tube
72
VDD4
Power supply terminal (+3.3V)
73
S30
O
Segment drive signal output to the fluorescent indicator tube
74
CD NUMBER
SENS
I
CD table address detection signal input terminal
75
TUNED
I
Tuning detection signal input from the FM/AM tuner unit
76
STEREO
I
FM stereo detection signal input from the FM/AM tuner unit
77
VOL A
I
Jog dial pulse input terminal (VOLUME)
78
VOL B
I
Jog dial pulse input terminal (VOLUME)
79
JOG A
I
Jog dial pulse input terminal (MULTI JOG)
80
JOG B
I
Jog dial pulse input terminal (MULTI JOG)
81
TRE A
I
Jog dial pulse input terminal (TREBLE)
82
TRE B
I
Jog dial pulse input terminal (TREBLE)
83
BASS A
I
Jog dial pulse input terminal (BASS)
84
BASS B
I
Jog dial pulse input terminal (BASS)
85
TUNER MUTE
O
Tuner muting on/off control signal output terminal
86
LED L
O
LED drive signal output terminal    Not used
87
LED R
O
LED drive signal output terminal    Not used
88
CLK
O
Serial data transfer clock signal output to the FM/AM tuner unit, motor/plunger driver, digital
echo and BBE controller
89
VSS2
Ground terminal
90
VDD2
Power supply terminal (+3.3V)
91
VF ON
O
VF (vocal fader) on/off control signal output terminal    “H”: VF on
92
KEYSCAN
O
Scan signal output for switches in the tape deck section and segment drive signal (S14 to S25)
93
POWER LED
O
LED drive signal output terminal
94
POWER
O
Power on/off control signal output terminal    “H”: power on
95
CD ACK
I
Acknowledge signal input from the video CD MPEG processor
96
TU DI
I
Serial data input from the FM/AM tuner unit
97
CD DATAI
I
Serial data input from the video CD MPEG processor
98
NC
I
Not used
99
NC
O
Not used
100
CD STB
O
Strobe signal output to the video CD MPEG processor
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