Sony CX-JN331 / CX-JPK331 / JAX-N331 Service Manual ▷ View online
CX-JN331/JPK331
45
45
CX-JN331/JPK331
CN907
CN905
C909
R903
R904
CN902
CN906
C906
D906
C910
C926
C925
C924
C922
C923
C921
C920
C911
JW910
JW901
JW902
JW925
RY901
CN901
W001
PT902
D902
D904
D903
D905
JW912
JW909
PT901
JW917
D908
R908
F905
F904
F906
F907
C908
JW905
JW904
S901
D901
Q902
CN904
CN903
10P
3P
10
50V
12k
1k
3P
3P
0.1
MTZJ-T72
-27D
100
50V
50V
0.1
0.1
0.1
0.01
0.01
0.01
0.01
1000
25V
2P
10EDB40
10EDB40
10EDB40
10EDB40
10EDB40
1
T6.3A
250V
T6.3A
250V
T3.15A
250V
T3.15A
250V
220
63V
63V
1SS133
2SB734
VP
STBY-RELAY
EVER +10V
D-GND
AC-1
AC-1
GND
220V
240V
120V
NEUTRAL
LIVE
220V
STBY-RELAY
EVER +10V
D-GND
240V
NC
(CHASSIS)
4P (JN331/JPK331:E51)
2P (JPK331:MX)
VOLTAGE SELECTOR
120V
220V
230-240V
(AC IN)
SUB POWER
TRANSFORMER
BUILT IN TRANSFORMER
NOT REPLACEABLE:
∗
TRANSFORMER
MAIN POWER
AC3
AC3
AC4
AC4
VF2
VF1
-27V REGULATOR
(JN331/JPK331:E51)
4P (JN331/JPK331:E51)
2P (JPK331:MX)
JN331/
JPK331:E51
(JN331/JPK331:E51)
(JPK331:MX)
(JPK331:MX)
(Page 43)
(Page 37)
7-21. SCHEMATIC DIAGRAM – TRANS Section –
CX-JN331/JPK331
46
46
CX-JN331/JPK331
•
Waveforms
4
IC101
ra
(RFACO)
(CD PLAY mode)
500 mV/DIV, 500 ns/DIV
Approx. 800 mVp-p
22.8
µ
s
4.4 Vp-p
1
IC101
yd
(LRCK)
(CD PLAY mode)
2 V/DIV, 10
µ
s/DIV
2
IC101
yh
(BCK)
(CD PLAY mode)
2 V/DIV, 200 ns/DIV
472 ns
4.5 Vp-p
3
IC101
uj
(XTAO)
(CD PLAY mode)
2 V/DIV, 20 ns/DIV
59 ns
4.5 Vp-p
5
L101
5
(REC mode)
10 V/DIV, 5
µ
s/DIV
13
µ
s
38 Vp-p
qs
IC601
qh
(CF2)
1 V/DIV, 500 ns/DIV
1
µ
s
3.2Vp-p
qa
IC601
qd
(I-XT2)
1 V/DIV, 10
µ
s/DIV
30.5
µ
s
3.2 Vp-p
– CD Board –
– MAIN Board –
– PANEL Board –
IC101 CXD3059AR
•
IC Block Diagrams
– CD Board –
SERVO
INTERFACE
32
RFDCO
34
AC_SUM
35
EQ_IN
33
PDSENS
31
AVDD4
91
LMUT
92
NC
93
XTSL
94
IOVSS0
95
XTACN
96
SQSO
97
SQCK
98
SBSO
99
EXCK
1
MIRR
2
DFCT
3
FOK
9
SFDR
10
SRDR
11
TFDR
12
TRDR
13
FFDR
14
FRDR
19
E
20
F
26
A
27
B
28
C
29
D
30
NC
21
TEI
23
FEI
22
TEO
24
FEO
25
VC
5
LOCK
6
MDP
7
SSTP
4
VSS
8
IOVSS1
18
NC
15
IOVDD1
16
AVDD0
17
AVSS0
68 EMPH
66 BCK
67 VDD
71 DOUT
69 EMPHI
70 IOVDD2
64 VSS
63 LRCK
65 PCMD
75 NC
73 TES1
74 IOVSS2
78 XTAI
76 XVSS
79 XVDD
80 AVDD1
77 XTAO
72 TEST
MIRR
DFCT
FOK
TE
FE
SUM
PWM
GENERATOR
SERVO
DSP
A/D
CONVERTER
DC/DC
CONVERTER
ASYNMMETRY
CORRECTOR
SUB CODE
PROCESSOR
ERROR
CORRECTOR
32k
RAM
D/A
INTERFACE
D/A
COVERTER
SELECTOR
DIGITAL OUT
CPU INTERFACE
CLOCK
GENERATOR
SERVO
AUTO
SEQUENCER
LPF
LPF
DIGITAL
CLV
VC
ATT
39
RFC
EQ
41
RFACO
AMP
36
LD
37
PD
42
RFACI
43
AVDD3
44
BIAS
56
DDVRSEN
57
AVSS5
59
NC
54
AVDD5
58
DDCR
60
BCKI
55
DDVROUT
45
ASYI
47
VPCO
48
VCTL
49
AVSS3
46
ASYO
DIGITAL
PLL
EFM
DEMODULATOR
51
FILO
50
CLTV
52
FILI
53
PCO
38
NC
40
AVSS4
APC
112
XPCK
111
XUGF
110
WFCK
109
ATCK
101
SYSM
100
XRST
103
VSS
102
DATA
104
XLAT
106
VDD
107
SENS
105
CLOK
108
SCLK
113
GFS
116
VDD
115
SCOR
114
C2PO
117
C4M
119
COUT
118
WDCK
120
NC
82 VREFL
83 AVSS1
84 AVSS2
81 AOUT1
86 AOUT2
87 AVDD2
88 NC
89 IOVDD0
90 RMUT
85 VREFR
61 PCMDI
62 LRCKI
47
CX-JN331/JPK331
IC251 BA5947FM-E2
1
LEVEL SHIFT
MUTING
D
15
16
+
–
+
–
D
D
17
18
D
19
20
VREF
21
22
23
24
25
26
27
28
PREVCC
OPOUT
OUTVREF
CH4CAPA
CH4IN
CH3FIN
CH3RIN
GND
MUTE
POWVCC
CH3OUTF
CH3OUTR
CH4OUTF
CH4OUTR
OPIN
–
2
OPIN+
INTERFACE
14
13
D
12
11
D
10
9
8
7
6
CH2FIN
CH2RIN
GND
5
4
CH1FIN
CH1RIN
VREFIN
POWVCC
CH2OUTR
CH2OUTF
CH1OUTR
CH1OUTF
INTERFACE
D
D
3
SW
INTERFACE
48
CX-JN331/JPK331
IC301 TC94A34FG-002
33
34
35
36
37
38
39
40
41
42
1
8
43
57
62
58
61
56
63
52
50
47
46
45
44
48
49
25
26
27
28
29
30
31
32
17
18
19
20
21
22
23
24
9
10
11
2
3
4
5
6
7
64
55
53
51
12
13
14
15
16
54
SDO2/
/CS/
/RAS
/CS/
/RAS
PO12/
AD15/
/CAS
AD15/
/CAS
SDO3/
/OE
/OE
TXO
DIT
Bus
Switch
BUCK/
PO11/
AD14
PO11/
AD14
/CCE/
PO10/
AD13
PO10/
AD13
PO9/AD12
PO8/AD11
VDDM
General
Input/
Output
Port
Address Calc.
2sets
Y-
P
ointer
register
C-P
ointer
register
CDP
Control
I/F
Sub Code I/F
X-P
ointer
register
SRMSTB
VDDT
AD10
AD9
AD8
PO7AD7
PO6/AD6
PO5/AD5
YRAM
4k w
ord
CRAM
4k w
ord
ERAM
4k w
ord
x1
2k w
ord
x1
CR
OM
4k w
ord
x9
XRAM
4k w
ord
Timer
Flag
Interrupt
Control
SRAM/DRAM
I/F
SRAM I/F
1k bit
SRAM
X-Bus
Y
-Bus
VCO
Timing
Generator
PRAM
4k w
ord
PR
OM
4k w
ord
x5
40 bit
Instr
uction
Decoder
Prog
ram
Control
MCU I/F
register
XO/X1/X2
Y0/Y1/Y2
MX
MY
MZ
MA
C
A0
A1
AX
AY
ALU
A2
A3
round & limit
round & limit
A
udio I/F
SBSY/
BCKIB
D
ATA
/
SDI1
LRCKIA
BCKIA
SDI0
LRCKO
BCKO
SDO0
VDDT
VSS
/MIACK/
AD16
/MICK
MIDIO
/MILP
/MICS
STANDBY
/RESET
VDDP
PO4/
AD4
PO3/
AD3
PO2/
AD2
PO0/
AD0
VSS
PO1/
AD1
VDD
VSSP
VCOI
VDDX
TEST
60
VSSX
CK
O/
PO13/
AD16
MIMD
59
XI
XO
CKI/CLCK/
IRQ/FI0
VDD
VSS
PIO0/
SDI2/IO0
PIO1/
SDI3/IO1
PIO2/
IO2
PIO3/
IO3
B
US3/FI1/
PIO4/IO4
B
US2/FI2/
PIO5/IO5
B
US1/FI3/
PIO6/IO6
B
US0/
PIO7/IO7
SDO1//WE
SFSY/
LRCKIB
JT
A
G
I/F
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