Sony CMT-L1 / HCD-L1 Service Manual ▷ View online
46
46
HCD-L1
6-23. Printed Wiring Board POWER Section
• See page 25 for Circuit Boards Location.
Ref. No.
Location
IC 800
B-1
IC 801
B-2
IC 802
B-2
IC 803
B-3
IC 804
B-3
D801
A-3
D802
A-2
D803
A-2
D804
B-4
Q800
B-3
Q801
B-4
Q802
A-3
Q803
A-3
Q804
A-4
• Semiconductor
Location
(Page 34)
IC804
IC800
IC801
IC802
IC803
47
47
HCD-L1
6-24. Schematic Diagram POWER Section
(Page 37)
4.7k
2k
2.2k
JW
JW
1/2W
48
48
HCD-L1
6-25. IC PIN FUNCTION DESCRIPTION
• IC500 uPD703033AYGF-M34-3BA (MASTER CONTROL) (MAIN BOARD)
I/O
O
O
I/O
O
I/O
O
O
O
—
—
O
O
O
O
O
O
O
O
O
O
—
O
I
I
O
O
O
O
O
O
O
I
O
I
I
—
—
—
I
—
—
O
O
I
O
O
O
I
I
I
Pin Name
FL-DATA
FL-CLK
IIC DATA
FL-CE1
IIC CLK
FL_CE2
LED DRV DATA
LED DRV CLK
EVDD
EVSS
LED DRV STB
LED DRV CLR
FAN-ON
FAN-LOW
SM CS
SM DATA
SM CLK
SM PG MUTING
SM NSP MUTING
SM INIT
VPP
SM DRV IC RST
SM OPC
HP_IN
HP_MUTING
SPK-RELAY
AD-RESET
LINE MUTE
GEQ-DATA
GEQ-CLK
REC-MUTING
TAPE-IN
—
RESET
XT1
XT2
REGC
X2
X1
VSS
VDD
CLKOUT
PLL-CLK
PLL-DI
PLL-DO
PLL-CE
ST-MUTING
STEREO
TUNED
RDS-DATA
Description
Data output for display
Clock output for display
IIC data input/output
Enable output for display
IIC clock output
Enable output for display
LED data output (not used)
LED clock output (not used)
+5 V power terminal
Ground terminal
LED strobe output (not used)
LED reset output (not used)
Fan motor ON/OFF output
Fan motor HIGH/LOW control output
S-MASTER latch output
S-MASTER data output
S-MASTER clock output
S-MASTER PG mute output (not used)
S-MASTER NSP mute output
S-MASTER initialize
Internal connection/power output for writing flash ROM
S-MASTER driver IC reset output
S-MASTER OPC input
Headphones connected/not-connected input
Headphones mute output
Speaker relay output (not used)
ADC reset output
Not used
Data output for M61519FP
Clock output for M61519FP
REC OUT mute output (not used)
MD/TAPE connected/not-connected input
Not used
System reset input
SUB clock input
SUB clock output
Regulator output stabilizer capacitance is connected to this terminal.
Main clock output
Main clock input
Ground terminal
+5 V power terminal
Clock output (not used)
PLL clock output for tuner
PLL data input for tuner
PLL data output for tuner
PLL enable output for tuner
Mute output for tuner
Tuner STEREO detection input
Tuner tuning input
Tuner RDS data input (for CE destination)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Pin No.
51
52
53
54
55
56,57
58
59
60-63
64
65
66
67
68
69,70
71,72
73
74
75
76
77-79
80,81
82-84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
O
O
O
O
O
O
—
—
I
O
O
O
I
I
O
O
O
—
—
I
I
I
I
I
I
I
I
O
I
I
I
I
I
O
I
I
O
O
I/O
Pin Name
SOFT CHECK1
SOFT CHECK2
AM
DEVICE RESET OUT
DEVICE ACCUT OUT
—
BVDD
BVSS
DEST1-4
PWR-RELAY
DEVICE VDD
ON/STANDBY
JOG1 A
JOG1 B
—
LED1,2
LED3
AVDD
AVSS
AVREF
KEY1-3
REC LEVEL INPUT L,R
—
MODEL1
DEVICE1
DEVICE2
DEVICE3
FL-RST
KEY INIT
ACCUT
PCPON
RM INIT
SIRCS
—
RDS-CLK
SELF-WRITE-IN
SELF-WRITE-OUT
SELF-WRITE-CLK
IIC HELP
Description
Main operation check terminal
Power saving operation check terminal
Function AM output (for CE destination)
Reset output for HDD (for L7 model)
AC off output
Not used
+5 V power terminal
Ground terminal
Destination setting terminal 1-4 (Refer to destination, model and device sheet.)
Power relay output (Clock display: H, Echo mode: L)
Device power control output
ON/STANDBY output
JOG 1A input
JOG 1B input
Not used
LED control output for illumination
Not used
+5 V power terminal
Ground terminal
Analog reference voltage
Key input 1-3
Reset level input L and R (for L7 model)
Not used
Model setting
Device setting (DISPLAY)
Device setting (IO)
Device setting (CD)
Display reset output
Key interrupt input
AC off detection input
Power control input from a PC
Remote control interrupt input
Remote control input
Not used
Tuner RDS clock input (for CE destination)
Write data input to the flash ROM
Flash ROM data output
Flash ROM clock output
IIC help input/output
49
HCD-L1
• IC600 uPD703033AYGF-M34-3BA (CD CONTROL) (CD Board)
I/O
O
O
I/O
O
I/O
O
O
O
—
—
O
O
O
O
I/O
O
O
I/O
O
O
—
O
O
O
O
O
O
O
O
O
O
I
I
—
—
—
I
—
—
O
I
I
I
I
O
Pin Name
DACDAT
DACCLK
IICDATA
—
IICCLK
—
DATA
CLK
EVDD
EVSS
PWM4
PWM1
XLT
LDON
SUBQ
—
SQCLK
SENSE
PWM2
PWM3
VPP
SPMUTE
X4
CTRL1
—
OMUTE
AMUTE
DMUTE
BDPWR
BDRST
DACRST
RESET
XT1
XT2
REGC
X2
X1
VSS
VDD
CLKOUT
ENC1—4
ENC5
SW1
SW2
—
Description
DAC data output
DAC clock output
12C bus data input/output
Not used
12C bus clock input/output
Not used
Data output for CXD30689
Clock output for display
+5 V power terminal
Ground terminal
PWM4 (not used)
PWM1
Latch output for CXD30689
Laser power control output
SUBQ data input/output
Not used
SUBQ clock output
SENSE input/output
PWM2
PWM3
Internal connection/Power for writing to the flash ROM
Spindle motor muting output (not used)
4 times speed switching output (not used)
2 times speed switching output (Normal speed: H, 2 x speed: L) (not used)
Not used
Optical output muting output (not used)
Analog muting output (not used)
DAC muting output (not used)
BD power control output
BD reset output
DAC reset output (not used)
System reset input
Sub clock (not used)
Sub clock (not used)
Capacitor connection terminal for regulator
Main clock
Main clock
Ground terminal
+5 V power terminal
Clock output (not used)
Encoder input 1-4
Encoder input 5 (not used)
Chucking motor switch input
Loading motor switch input
Not used
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25-27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43-46
47
48
49
50
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