Sony CMT-C7NT / HCD-C7NT Service Manual ▷ View online
77
HCD-C7NT
Pin No.
86
87
88
89
90
91
92
93
94
95
96 to 98
99
100
I/O
O
—
O
O
O
O
O
O
O
I (S)
I
—
O
Pin Name
TFDR
DVDD
FFDR
FRDR
FS4
SRDR
SFDR
SPRD
SPFD
FGIN
TEST1 to TEST3
DVSS
EFMO
Description
Tracking servo drive PWM output (+) to the BH6519FS
+3V power supply (Digital)
Focus servo drive PWM output (+) to the BH6519FS
Focus servo drive PWM output (–) to the BH6519FS
176.4 kHz clock signal output (X’tal) (Not used)
Sled servo drive PWM output (–) to the BH6519FS
Sled servo drive PWM output (+) to the BH6519FS
Spindle servo drive PWM output (–) to the BH6519FS
Spindle servo drive PWM output (+) to the BH6519FS
Test input (Fixed at “L”)
Ground (Digital)
EFM output when recording to the over write head driver
• Abbreviation
EFM: Eight to Fourteen Modulation
78
HCD-C7NT
• IC1003 M30835 Master Controller (MD DIGITAL Board)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
–
–
O
I
O
I
I
I
O
I
O
–
I
–
I
I
I
I
–
–
O
–
I
–
–
–
I/O
I/O
O
I
O
–
O
–
O
O
–
–
O
–
–
O
O
I
I
O
I
O
I
I
Pin Name
A-IN
RMC
NETMD-SO
NETMD-SI
NETMD-CLK
BYTE
CNVSS
XIN-T
XOUT-T
S.RST
X OUT
VSS
X IN
VCC
NMI
DQSY
P.DOWN
SQSY
KBCLK
KB.DATA
I2CBUSY
A1 OUT
X INT
NC
NC
NC
I2CCLK
I2CDATA
SWDT
SRDT
SCLK
KB.CTRL
L3DATAO
L3DATAI
L3CLK
L3MODE
ADA.RST
ADA.LAT
EPM
NC
NC
MOD
LDON
CE
LIMIT-IN
WRPWR
REC-SW
D.RST
SENS
PLAY-SW
Description
Not used
Not used
Serial communication data output to the IC1002
Serial communication data input from the IC1002
Serial clock output to the IC1002
Data bus selection signal input (connected to ground)
Processor mode selection signal input (connected to ground)
Sub clock input (32.768kHz)
Sub clock output (32.768kHz)
System reset input
Main clock output (10MHz)
Ground
Main clock input (10MHz)
Power supply
Fixed at “H” (pull up)
Digital in sync input (record system)
Power down detection input “L”: power down
ADIP (MO) sync or subcode Q(PIT) sync signal input from the CXD2662R (playback system)
Not used
Not used
I2C cable connection check signal output
Not used
Interrupt request signal input from the CXD2662R
Not used
Not used
Not used
I2C serial clock input/output
I2C serial data input/output
Writing data output to the serial bus
Reading data input from the serial bus
Clock signal output to the serial bus
Not used
Communication data output to the IC1006
Communication data input from the IC1006
Clock output to the IC1006
Chip select signal output to the IC1006
Not used
Not used
Not used
Not used
Not used
Laser modulation switching signal output “L”: off, “H”: on
Laser ON/OFF control signal output “H”: laser on
Not used (fixed at “H”)
Detection signal input from the limit switch “L”: sled limit in, “H”: sled limit out
Write power ON/OFF control signal output “L”: off, “H”: on
Detection signal input from the recording position detection switch
Digital reset signal output to the CXD2662R and the motor driver “L”: rest
SENS signal input from the CXD2662R
Detection signal input from the playback position detection switch “L”: playback
79
HCD-C7NT
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
O
O
I
I
I
O
I/O
I
I
–
–
–
O
O
O
I
I
I
I
–
–
–
I
O
O
O
I
–
I
–
O
O
O
O
–
O
I
I
I
–
–
–
–
–
–
I
–
–
–
–
Pin Name
XLAT
SCL
OUT-SW
MNT2
MNT1
EEP-WP
SDA
REFLECT
PROTECT
VCC
NC
VSS
LOAD-LO
LOAD-OUT
LOAD-IN
TEST0
TEST1
TEST2
TEST3
NC
NC
NC
NETMD-INT
NETMD-CS
NETMDRST
NETMD PLLSW
VBUS
NC
LOCK
NC
ADSEL-2
ADSEL-1
ADSEL-0
OPTSEL
DACMUTE
DARESET
IOP
SEL1
SEL0
TIMER
KEY3
KEY2
KEY1
AVSS
KEY0
VREF
AVCC
NC
FLDATA
FLCK
Description
Latch signal output to the DSP IC
Serial clock output to the EEPROM
Detection signal input from the loading out detection switch
Busy monitoring signal input from the mechanism deck
Track jump detection signal input from the mechanism deck
EEP-ROM write protect signal output “L”: write enable
Serial data input/output with the EEP-ROM
Disc reflection rate detection signal input from the reflect detection switch “H”: disc with low reflection rate
Recording-protection claw detection signal input from the protect detection switch “H”: protect
Power supply
Not used
Ground
Loading motor voltage control signal output “L”: high voltage, “H”: low voltage
Loading motor control signal output “H”: out
Loading motor control signal output “H”: in
Input terminal for test
Input terminal for test
Input terminal for test
Input terminal for test
Not used
Not used
Not used
Interrupt request signal input from the IC1002 “L”: interrupt request active
Chip select signal output to the IC1002
Reset signal output to the IC1002 “L”: reset
PLL function ON/OFF control signal output to the IC1002 “L”: PLL function on
USB VBUS detection signal intput “H”: USB on
Not used
Digital in LOCK detection signal input from the IC1006
Not used
Not used
A/D converter input source selection signal output to the IC1012
A/D converter input source selection signal output to the IC1012
Optical input selection signal output
Not used
Reset signal output to the D/A converter “L”: active
Iop measurement signal input
Destination setting terminal
Destination setting terminal
Not used
Not used
Not used
Not used
Ground (analog)
Not used
Reference voltage input
Power supply (analog)
Not used
Not used
Not used
80
HCD-C7NT
• IC501
µ
PD703032AYGY-M02-3BA Master Control (UCOM Board)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
O
O
I/O
O
I/O
O
O
O
–
–
O
O
O
I
I
O
O
O
O
O
–
O
O
O
O
O
O
O
O
I
I
I
I
I
I
O
–
O
I
–
–
O
O
O
I
O
O
I
I
I
Pin Name
FL-DATA
FL-CLK
SDA
FL-CE
SCL
FL-RST
CXD-DATA
CXD-CLK
EVDD
EVSS
CXD-XLT
PWM1
LDON
SENSE
SUBQ
CHECK
SCLK
CTRL1
PWM2
PWM3
VPP
SP-MUTE
1-4
DMUTE
AMUTE
LODNEG
LODPOS
BDPWR
BDRST
SW1
SW2
SW3(ENC-A)
SW4(ENC-B)
RESET
XT1
XT2
REGC
X2
X1
VSS
VDD
CLKOUT
PLL-CLK
PLL-DO(µCOM-ST)
PLL-DI(ST-µCOM)
PLL-CE
ST-MUTE
STEREO
TUNED
RDS-DATA
Description
Data signal output to the fluorescent indicator tube
Clock signal output to the fluorescent indicator tube
I2C data input/output
Enable signal output to the fluorescent indicator tube
I2C clock input/output
Reset signal output to the fluorescent indicator tube
Data output to the DSP
Clock signal output to the DSP
Power supply (I/O port)
Ground (I/O port)
Latch signal output to the DSP
PWM1 signal output
Laser power supply control signal output
CD DENSE signal input
CD SUBQ signal input
Not used (open)
CD SUBQ clock signal output
CTRL1 (double times speed selection) signal output
PWM2 signal output
PWM3 signal output
Not used
Not used (open)
Not used (open)
Muting signal output to the DAC
Not used (open)
Loading motor control signal output
Loading motor control signal output
Power supply control signal output to the CD section
CD reset signal output
Loading switch signal input
Loading switch signal input
Loading switch signal input
Loading switch signal input
System reset input
Sub clock input
Sub clock output
Capacitor connection terminal for regulator output stabilizing
Main system clock output
Main system clock input
Ground
Power supply
Clock output (open)
Clock signal output to the tuner
Data output to the tuner
Data input from the tuner
Chip enable signal output to the tuner
Muting signal output to the tuner
Stereo signal input from the tuner
Tuning detection signal input from the tuner
RDS data input
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