DOWNLOAD Sony CFD-S03CP / CFD-S03CPL Service Manual ↓ Size: 4.3 MB | Pages: 55 in PDF or view online for FREE

Model
CFD-S03CP CFD-S03CPL
Pages
55
Size
4.3 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
cfd-s03cp-cfd-s03cpl.pdf
Date

Sony CFD-S03CP / CFD-S03CPL Service Manual ▷ View online

33
CFD-S03CP/S03CPL
IC302  PT2257-S (MAIN Board (3/3))
VR 2
VR 1
R-IN
R-OUT
GND
DATA
L-IN
L-OUT
VDD
CLK
7
2
3
4
8
1
REF AMP
VOL AMP 2
VOL AMP 1
6
LOGIC
CONTROL
5
VREF
1
2
3
6
9
10
11
12
8
7
4
5
22
TAPE
TAPE
TAPE
BUF AMP
A1
BUF AMP
A2
NAB
AMP1
NAB
AMP2
23
24
15
14
13
21
20
17
16
RADIO
BUF AMP
B1
BUF AMP
B2
MUTE
MUTE
ON
ON
ON
7dB
26dB
26dB
MONITOR
AMP
LOGIC
18
19
MUTE
7dB
MONITOR
AMP
LINE
TAPE
RADIO
LINE
ALC2
ALC1
DET
REC
AMP1
REC
AMP2
2.1
REF
AMP
MIC
AMP1
VCC
R.LO
LINE
R.RAD
TAPE
R.LIN
MIC
L.LO
REC
L.RAD
MIC I/EX
L.LIN
AGC
L.PO
L.NF
L.RO
L.IN
REF
GND
R.IN
R.RO
R.NF
R.PO
MIC.NF
IC301  TA2068N (TC Board)
34
CFD-S03CP/S03CPL
• IC PIN DESCRIPTIONS
• IC201  CXD3014A-201R (RF AMP, SYSTEM SERVO PROCESSOR, DIGITAL SIGNAL PROCESSOR) (BD83S BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
LRCK
O
L/R sampling clock signal output terminal
2
LRCKI
I
L/R sampling clock signal input terminal
3
PCMD
O
Serial data output terminal
4
PCMDI
I
Serial data input terminal
5
BCK
O
Bit clock signal output terminal
6
BCKI
I
Bit clock signal input terminal
7
XTACN
I
Oscillation circuit on/off switch control signal input from the system controller
“L”: oscillation stop, “H”: self-oscillation
8
XRST
I
System reset signal input from the system controller    “L”: reset
9
VSS
Ground terminal
10
IREQ-MP3
O
MP3 data request signal output to the system controller
11
CLOK
I
CD serial data transfer clock signal input from the system controller
12
DATA2
I
MP3 serial data input/output with the system controller
13
XLAT-MP3
I
MP3 serial data latch pulse signal input from the system controller
14
REQ-MP3
I
MP3 data request signal input from the system controller
15
ACK-MP3
O
MP3 acknowledge signal output to the system controller
16
XLAT
I
CD serial data latch pulse signal input from the system controller
17
VDD
Power supply terminal (+1.8V)
18
SVSS
Ground terminal
19
SVDD
Power supply terminal (+1.8V)
20
SENS
O
Internal status (SENSE) signal output to the system controller
21
WFCK
Not used
22
XUGF
Not used
23
XPCK
Not used
24
GFS
Not used
25
C2PO
Not used
26
SCOR
O
Subcode sync (S0+S1) detection signal output to the system controller
27
VDD
Power supply terminal (+1.8V)
28
COUT
Not used
29
SVSS
Ground terminal
30
SVDD
Power supply terminal (+1.8V)
31
MIRR
Not used
32
DFCT
Not used
33
FOK
Not used
34
VSS
Ground terminal
35
VDD
Power supply terminal (+1.8V)
36
VSS
Ground terminal
37
MIRR
Not used
38
MDP
O
Spindle motor servo control signal output terminal
39
SSTP
I
Disc inner position detection signal input terminal
40
IOVSS1
Ground terminal
41
SFDR
O
Sled servo drive signal (+) output to the coil/motor driver
42
SRDR
O
Sled servo drive signal (–) output to the coil/motor driver
43
TFDR
O
Tracking servo drive signal (+) output to the coil/motor driver
44
TRDR
O
Tracking servo drive signal (–) output to the coil/motor driver
45
FFDR
O
Focus servo drive signal (+) output to the coil/motor driver
46
FRDR
O
Focus servo drive signal (–) output to the coil/motor driver
47
IOVDD1
Power supply terminal (+3.3V)
35
CFD-S03CP/S03CPL
48
AVDD0
Power supply terminal (+3.3V)
49
AVSS0
Ground terminal
50
E
I
E signal input from the optical pick-up block
51
F
I
F signal input from the optical pick-up block
52
TEI
I
Tracking error signal input terminal
53
TEO
O
Tracking error signal output terminal
54
FEI
I
Focus error signal input terminal
55
FEO
O
Focus error signal output terminal
56
VC
O
Middle point voltage output terminal
57
A
I
A signal input from the optical pick-up block
58
B
I
B signal input from the optical pick-up block
59
C
I
C signal input from the optical pick-up block
60
D
I
D signal input from the optical pick-up block
61
AVDD4
Power supply terminal (+3.3V)
62
RFDCO
O
Not used
63
PDSENS
I
Not used
64
AC_SUM
O
RFAC summing amplifier signal output terminal
65
EQ_IN
I
RF equalizer circuit input terminal
66
LD
O
Laser diode on/off control signal output to the automatic power control circuit
“L”: laser off, “H”: laser on
67
PD
I
Light amount monitor input from the optical pick-up block laser diode
68
RFC
I
Equalizer cut off frequency adjustment terminal
69
AVSS4
Ground terminal
70
RFACO
O
EFM signal output terminal
71
RFACI
I
EFM signal input terminal
72
AVDD3
Power supply terminal (+3.3V)
73
BIAS
I
Asymmetry circuit constant current input terminal
74
ASYI
I
Playback EFM asymmetry comparator voltage input terminal
75
ASYO
O
Playback EFM full-swing output terminal
76
VPCO
O
Charge pump output terminal for broad-band EFM PLL
77
VCTL
I
VCO2 control voltage input terminal for broad-band EFM PLL
78
AVSS3
Ground terminal
79
CLTV
I
VCO1 control voltage input terminal for multiplier
80
FILO
O
Filter output terminal for master PLL
81
FILI
I
Filter input terminal for master PLL
82
PCO
O
Charge pump output terminal for master PLL
83
SVSS
Ground terminal
84
SVDD
Power supply terminal (+1.8V)
85
SSTB-MP3
I
MP3 standby on/off control signal input terminal    “L”: standby    Not used
86
VDD
Power supply terminal (+1.8V)
87
VSS
Ground terminal
88
TEST1
I
Test terminal    Normally: fixed at “L”
89
DATA
I
CD serial data input from the system controller
90
CLK2
I
MP3 serial data transfer clock signal input from the system controller
91
SVSS
Ground terminal
92
SVDD
Power supply terminal (+2.5V)
93
JTAGTCK
Not used
94
JTAGTDI
Not used
95
JTAGTDO
Not used
96
JTAGTMS
Not used
Pin No.
Pin Name
I/O
Pin Description
36
CFD-S03CP/S03CPL
97
TRST
Not used
98
VSS
Ground terminal
99
VDD
Power supply terminal (+1.8V)
100
IOVDD2
Power supply terminal (+3.3V)
101
DOUT
O
Digital audio signal output terminal    Not used
102
TEST
I
Test terminal    Normally: fixed at “L”
103
TES1
I
Test terminal    Normally: fixed at “L”
104
IOVSS2
Ground terminal
105
PLLVDD
Power supply terminal (+1.8V)
106
PLLVSS
Ground terminal
107
XVSS
Ground terminal
108
XTAO
O
System clock output terminal (16.9344 MHz)
109
XTAI
I
System clock input terminal (16.9344 MHz)
110
XVDD
Power supply terminal (+1.8V)
111
AVDD1
Power supply terminal (+3.3V)
112
AOUT1
O
L-ch analog audio signal output terminal
113
VREFL
O
L-ch reference voltage output terminal
114
AVSS1
Ground terminal
115
AVSS2
Ground terminal
116
VREFR
O
R-ch reference voltage output terminal
117
AOUT2
O
R-ch analog audio signal output terminal
118
AVDD1
Power supply terminal (+3.3V)
119
IOVDD0
Power supply terminal (+3.3V)
120
IOVSS0
Ground terminal
Pin No.
Pin Name
I/O
Pin Description
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