Sony CFD-922L (serv.man2) Service Manual ▷ View online
– 25 –
– 26 –
6-6. SCHEMATIC DIAGRAM — TUNER SECTION — • Refer to page 47 for IC Block Diagrams.
Note on Schematic Diagram:
• All capacitors are in µF unless otherwise noted. pF: µµF
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
f
: internal component.
•
U
: B+ Line.
•
H
: adjustment for repair.
• Power voltage is dc 9V and fed with regulated dc power
supply from battery terminal.
CFD-922L
(Page 36)
(Page 36)
• Voltage and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : FM
(
no mark : FM
(
) : MW
<
> : LW
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Signal path.
F
: FM
f
: MW
– 27 –
– 28 –
6-7. PRINTED WIRING BOARD — CD SECTION — • Refer to page 18 for Circuit Boards Location.
1
A
B
C
D
E
F
G
H
I
J
2
3
4
5
6
7
8
9
10
04
TP
(RF)
C763
C764
C766
C773
Note on Printed Wiring Boards:
•
X
: parts extracted from the component side.
•
b
: Pattern from the side which enables seeing.
IC701
H-7
IC702
E-5
IC703
B-5
Q701
F-8
Q702
J-7
• Semiconductor
Location
Ref. No.
Location
CFD-922L
(Page 33)
• Waveforms
(MODE: PLAY)
1
2.2Vp-p
2
16.9344MHz
IC702
yj
(XTAO)
3
4
2.5V
5
0.9 – 1.5Vp-p
Approx. 200mVp-p
IC701
qd
(FE)
7.6
µ
sec
2Vp-p
IC702
wh
(MDP)
IC701
qg
(RFO)
2.5V
Approx. 100mVp-p
IC701
qa
(TE)
100mV/div 20nsec/div
100mV/div 2
µ
sec/div
50mV/div 500nsec/div
100mV/div 1
µ
sec/div
100mV/div 1
µ
sec/div
– 29 –
6-8. SCHEMATIC DIAGRAM — CD SECTION — • Refer to page 47 for IC Block Diagrams.
– 30 –
Note on Schematic Diagram:
• All capacitors are in µF unless otherwise noted. pF: µµF
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
U
: B+ Line.
• Power voltage is dc 9V and fed with regulated dc power
supply from battery terminal.
CFD-922L
• Voltage and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : CD STOP
no mark : CD STOP
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
• Signal path.
J
: CD
(Page 35)
Note: The components identified by mark
0
or dotted line
with mark
0
are critical for safety.
Replace only with part number specified.
– 31 –
– 32 –
6-9. SCHEMATIC DIAGRAM — PRE SECTION — • Refer to page 48 for IC Block Diagrams.
Note on Schematic Diagram:
• All capacitors are in µF unless otherwise noted. pF: µµF
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
C
: panel designation.
•
U
: B+ Line.
• Power voltage is dc 9V and fed with regulated dc power
supply from battery terminal.
• Voltage and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : FM
(
no mark : FM
(
) : PB
<
> : REC
[
] : CD STOP
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Signal path.
F
: FM
E
: PB
a
: REC
J
: CD
Note on Printed Wiring Boards:
•
X
: parts extracted from the component side.
•
b
: Pattern from the side which enables seeing.
CFD-922L
(Page 35)
Q301
C
(REC)
• Waveform
1
4Vp-p
19.5
µ
sec
5
µ
sec/div
0.1V/div
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