Sony CDP-XE530 Service Manual ▷ View online
CDP-XE530
— 21 —
— 22 —
6-7. SCHEMATIC DIAGRAM – MAIN SECTION –
• See page 33 for IC Block Diagrams.
(Page 17)
(Page 26)
(Page 14)
C619
1000
µ
16v
D615
1SS133
D616
1SS133
D614 11ES2
UK MODEL
UK
MODEL
D613 11ES2
HEADPHONE BOARD
CN681
C620
4700pF
C621
4700p
S621
POWER
CN602
2P
CN601 2P
CN603 2P
OFF
ON
~AC IN
POWER SW
BOARD
16
CDP-XE530
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— 24 —
6-8. PRINTED WIRING BOARD – DISPLAY SECTION –
• See page 12 for Circuit Board Location.
1
2
A
B
C
D
E
F
G
3
4
5
6
7
8
9
10
11
12
13
14
CDP-XE530
— 25 —
— 26 —
6-9 SCHEMATIC DIAGRAM – DISPLAY SECTION –
• See page 29 for IC Pin Functions.
(Page 21)
2
2
KEY BOARD
10V
NO502 2P
NO301
2P
16
CDP-XE530
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6-10. IC PINFUNCTIONS
• IC101 DIGITAL SIGNAL PROCESSOR (CXD2585Q)(BD board)
• Abbreviation
GFS : Guarded Frame Sync
• Abbreviation
EFM : Eight to Fourteen Modulation
PLL : Phase Locked Loop
PLL : Phase Locked Loop
DVDD
XRST
MUTE
DATA
XLAT
CLOK
SENS
SCLK
ATSK
WFCK
XUGF
XPCK
GFS
C2PO
SCOR
CM4
WDCK
DVSS
COUT
MIRR
DFCT
FOK
PWMI
LOCK
MDP
SSTP
FSTO
DVDD1
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
DVSS1
TEST
TES1
VC
FE
SE
–
I
I
I
I
I
O
I
I
O
O
O
O
O
O
O
O
–
I/O
I/O
I/O
I/O
I
I/O
O
I
O
–
O
O
O
O
O
O
–
I
I
I
I
I
Digital power supply
System reset
“L” : reset
Muting input “H” : mute
Serial data input, supplied from CPU
Latch input, supplied from CPU
Serial data transfer clock input, supplied from CPU
SENS signal output to CPU
SENS serial data read-out clock input
Input pin for anti-shock (Connected to ground)
WFCK output (Not used)
Not used
Not used
Not used
Not used
Sub-code sync output
4.2336 MHz output (Not used)
Word clock output (ƒ = 2Fs)
Digital ground
Numbers of track counted signal input/output (Not used)
Mirror signal input/output (Not used)
Defect signal input/output (Not used)
Focus OK input/output (Not used)
Spindle motor external control input (Connected to ground)
GFS is sampled by 460 Hz. H when GFS is H (Not used)
Output to control spindle motor servo
Input signal to detect disc inner most track
2/3 divider output of pin 71 (Not used)
Digital power supply
Sled drive output
Sled drive output
Tracking drive output
Tracking drive output
Focus drive output
Focus drive output
Digital ground
TEST pin connected normally to ground
TEST pin connected normally to ground
Center voltage input pin
Focus error signal input
Sled error signal input
Pin No.
Pin Name
I/O
Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin No.
Pin Name
I/O
Function
TE
CE
RFDC
ADIO
AVSS0
IGEN
AVDD0
ASYO
ASYI
RFAC
AVSS1
CLTV
FILO
FILI
PCO
AVDD1
BIAS
VCTL
V16M
VPCO
DVDD2
ASYE
MD2
DOUT
LRCK
PCMD
BCLK
EMPH
XTSL
DVSS2
XTAI
XTAO
SOUT
SOCK
XOLT
SQSO
SQCK
SCSY
SBSO
EXCK
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
I
I
I
O
–
I
–
O
I
I
–
I
O
I
O
–
I
I
I/O
O
–
I
I
O
O
O
O
O
I
–
I
O
O
O
O
O
I
I
O
I
Tracking error signal input
Center servo analog input
RF signal input
Test pin (Not used)
Analog ground
Stabilized current input for operational amplifiers
Analog power supply
EFM full swing output
Asymmetry comparate voltage input
EFM signal input
Analog ground
Control voltage input for master VCO1
Filter output for master PLL
Filter input for master PLL
Charge-pump output for master PLL
Analog power supply
Asymmetry circuit constant current input
VCO2 control voltage input for wide band EFM PLL (Connected to VDD)
VCO2 oscillator input/output for wide band EFM PLL (Not used)
Charge-pump output for wide band EFM PLL (Not used)
Digital power supply
Asymmetry circuit ON/OFF input
“L” OFF, “H” : ON (Connected to VDD)
Digital-out ON/OFF control input (Connected to VDD)
Digital-out output pin
D/A interface LR clock output (ƒ = Fs)
D/A interface serial data output
D/A interface bit clock output
Playback disc output in emphasis mode (Not used)
X'tal selection input (Connected to ground)
Digital ground
X'tal oscillator circuit input
X'tal oscillator circuit output (Not used)
Serial data output in servo block (Not used)
Serial data read clock output in servo block (Not used)
Serial data latch output in servo block (Not used)
Sub-Q 80-bit and PCM peak level data output (CD text data output)
Clock input for SQSO read-out
Connected to ground
Sub-P through Sub-W serial output (Not used)
Clock input for SBSO read-out (Connected to ground)
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