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Model
BDV-L600 BDV-L800 BDV-L800M HBD-L600 HBD-L800 HBD-L800M
Pages
109
Size
6.81 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
bdv-l600-bdv-l800-bdv-l800m-hbd-l600-hbd-l800-hbd-.pdf
Date

Sony BDV-L600 / BDV-L800 / BDV-L800M / HBD-L600 / HBD-L800 / HBD-L800M Service Manual ▷ View online

HBD-L600/L800/L800M
73
•  IC Pin Function Description
MB-141  BOARD  IC101  CXD9998G-BB (BD  DECODER) (HBD-L600: Canadian, AEP, Italian, UK, Mexican/L800/L800M)
 
 
IC101  CXD9998G-BC (BD  DECODER) (HBD-L600: Chinese model)
Pin No.
Pin Name
I/O
Description
A2
TXVP_0
O
Transmit data (positive) output to the ethernet connector
A4
TXVN_1
I
Receive data (negative) input from the ethernet connector
A5
TANA_0
-
Ethernet analog test terminal
A6 to A8
RX2B to RX0B
I
TMDS data (negative) input from the HDMI input selector
A9
RXCKB
I
TMDS clock (negative) signal input from the HDMI input selector
A12
AOBCK
O
Bit clock (for audio output) signal output to the digital sample rate converter and D/A converter
A13
NS_XTALI
O
System clock signal output terminal (27 MHz)
A14 to 
A16
CH2_M to CH0_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
A17
CLK_M
O
TMDS clock (negative) signal output to the HDMI ARC OUT connector
A18
EXT_CAP
-
Not used
A19
VDACG_OUT
O
Video (Y) signal output terminal    Not used
A21, A22
VDIN26, VDIN24
I/O
Not used
A24 to 
A27
VDIN15, VDIN13, 
VDIN11, VDIN9
I/O
Not used
A28
VDIN7
O
Request signal output to the system controller
B3
TXVN_0
I
Receive data (positive) input from the ethernet connector
B4
TXVP_1
O
Transmit data (negative) output to the ethernet connector
B5
TANA_1
-
Ethernet analog test terminal
B6 to B8
RX2 to RX0
I
TMDS data (positive) input from the HDMI input selector
B9
RXCK
I
TMDS clock (positive) signal input from the HDMI input selector
B10
SCL
O
I2C clock signal output to the EEPROM
B12
AOLRCK
O
L/R sampling clock (for audio output) signal output to the digital sample rate converter and 
D/A converter
B13
NS_XTALO
I
System clock signal input terminal (27 MHz)
B14 to 
B16
CH2_P to CH0_P
O
TMDS data (positive) output to the HDMI ARC OUT connector
B17
CLK_P
O
TMDS clock (positive) signal output to the HDMI ARC OUT connector
B18
EXT_RES
-
HDMI reference voltage terminal
B19
VDACB_OUT
O
Video (P
B
) signal output terminal    Not used
B21, B22
VDIN27, VDIN25
I/O
Not used
B24 to 
B28
VDIN16, VDIN14, 
VDIN12, VDIN8, 
VDIN5
I/O
Not used
C1
FOIN
I
End detection signal input from the motor driver
C2
FOIP
I
Not used
C4
AVSS33_LD
-
Ground terminal
C5
AVDD33_COM
-
Power supply terminal (+3.3V)
C7, C8
VDD33_HDMI_RX
-
Power supply terminal (+3.3V)
C10
SDA
I/O
Two-way I2C data bus with the EEPROM
C11
AOSDATA0
O
Serial data (for audio output) output to the digital sample rate converter
C12
AOMCLK
O
Master clock (for audio output) signal output to the D/A converter
C14
TP_PLLG
-
Test terminal
C15
AVDD33_XTAL
-
Power supply terminal (+3.3V)
C17
AVDD33_HDMI_TX
-
Power supply terminal (+3.3V)
C18
VDACR_OUT
O
Video (P
R
) signal output terminal    Not used
C19
VDACX_OUT
O
Video (CVBS) signal output to the video amplifi er
C20
VDIN29
-
Not used
C21
VDIN31
I/O
Two-way I2C data bus with the EEPROM
C22
VDIN20
O
Karaoke mode information output terminal    Not used
C23
VDIN18
I/O
Not used
C24
CEC
I/O
HDMI CEC data input/output terminal    Not used
C25
HDMISCK
I/O
Two-way I2C clock bus with the HDMI ARC OUT connector
C26, C27
VDIN10, VDIN4
I/O
Not used
C28
VDIN3
O
EEPROM input data selection signal output terminal
D1
FPDOCD
I
Laser power monitor signal input terminal    Not used
D3
RSTI
I
Reset signal input terminal    Not used
D4
AVDD33_LD
-
Power supply terminal (+3.3V)
HBD-L600/L800/L800M
74
Pin No.
Pin Name
I/O
Description
D5
AVSS33_COM
-
Ground terminal
D6
REXT
-
External reference resistor connection terminal
D7, D8
VDD12_HDMI_RX
-
Power supply terminal (+1.2V)
D9
GPIO3
I/O
Not used
D10
AMUTE
O
Audio muting control signal output terminal    Not used
D11
AOSDATA1
O
Serial data (for audio output) output terminal    Not used
D12
AOSDATA2
O
Serial data (for audio output) output to the digital sample rate converter
D14
TP_PLLG
-
Test terminal
D15
AVSS33_XTAL
-
Ground terminal
D16
AVDD12_HDMI_TX
-
Power supply terminal (+1.2V)
D17
AVDD33_HDMI_TX
-
Power supply terminal (+3.3V)
D18
FS
-
Full scale adjustment terminal
D19
AVDD33_VDAC_BG
-
Power supply terminal (+3.3V)
D20
VDIN33
I/O
Not used
D21
VDIN30
I/O
Two-way I2C clock bus with the EEPROM
D22, D23
VDIN19, VDIN17
I/O
Not used
D24
HDMISD
I/O
Two-way I2C data bus with the HDMI ARC OUT connector
D25
HTPLG
I
Hot plug detection signal input from the HDMI ARC OUT connector
D26
VDIN6
O
HDMI +5V power input selection signal output terminal
D27
VDIN2
O
Digital audio signal selection signal output terminal    “L”: optical input, “H”: coaxial input
D28
VDIN1
O
HDMI input selection signal output to the HDMI input selector
E1
VWDC2O
O
Laser diode control voltage output terminal    Not used
E2
FPDODVD
I
Laser power monitor signal input from the BD drive
E3
VRDCO
O
Laser diode control voltage output terminal    Not used
E4
AVDD12_1A
-
Power supply terminal (+1.15V)
E5
AVDD12_COM
-
Power supply terminal (+1.2V)
E6
AVDD12_REC
-
Power supply terminal (+1.2V)
E8
VSS33_HDMI_RX
-
Ground terminal
E9
GPIO1
I
Ready signal input from the system controller    “H”: ready
E10
AOSDATA3
O
Serial data (for audio output) output terminal    Not used
E12
MCIN
I
Serial data (for audio output) input from the A/D converter
E13
SPDIF
O
SPDIF (for digital audio output) signal output terminal    Not used
E14
AVSS12_27MPLL
-
Ground terminal
E15
AVDD12_27MPLL
-
Power supply terminal (+1.2V)
E16
AVDD12_HDMI_TX
-
Power supply terminal (+1.2V)
E17
AVSS33_HDMI_TX
-
Ground terminal
E18
AVSS33_VDAC_BG
-
Ground terminal
E19
AVDD33_VDAC_X
-
Power supply terminal (+3.3V)
E20
VDIN28
I/O
Not used
E21
VDIN32
I
Chip select signal input from the system controller
E22
VDIN22
I/O
Not used
E23
VDIN21
I
Microphone insert detection signal input terminal    Not used
E25
ETRXDV
I
Receive data valid signal input terminal    Not used
E26
ETRXER/DDC_SDA
I/O
Two-way I2C data bus with the HDMI input selector
E27
VDIN0
O
HDMI input selection signal output to the HDMI input selector
E28
VDINHSYNC
O
Horizontal sync signal output terminal    Not used
F3
VDAC0
-
Not used
F4
VWDC1O
O
Laser diode control voltage output terminal    Not used
F5
AVDD33_REC
-
Power supply terminal (+3.3V)
F6
AVSS33_REC
-
Ground terminal
F7
AVSS12_COM
-
Ground terminal
F8
VSS33_HDMI_RX
-
Ground terminal
F9
GPIO0
I/O
Not used
F10
AOSDATA4
O
Serial data (for audio output) output to the D/A converter
F11
SPMCLK/DIN1
I
SPDIF (for digital audio output) signal input from the HDMI ARC OUT connector
F12
SPLRCK
I
L/R sampling clock (for SPDIF signal) signal input terminal    Not used
F13
SPDATA
I
Serial data (for SPDIF signal) input terminal    Not used
F14
AVSS12_DMPLL
-
Ground terminal
F15
AVDD12_DMPLL
-
Power supply terminal (+1.2V)
F16
AVSS12_HDMI_TX
-
Ground terminal
HBD-L600/L800/L800M
75
Pin No.
Pin Name
I/O
Description
F17
AVSS33_HDMI_TX
-
Ground terminal
F18
AVDD33_VDAC_R
-
Power supply terminal (+3.3V)
F19
AVSS33_VDAC_X
-
Ground terminal
F21
VDIN34
O
EEPROM input data selection signal output terminal
F22
VDIN23
I/O
Not used
F24
ETTXER/DDC_SCL
O
I2C clock signal output to the HDMI input selector
F25
ETRXD0
I
Receive data input terminal    Not used
F26
ETCRS/HPG_RX
O
Hot plug detection signal output to the HDMI input selector
F27
VDINVSYNC
O
Vertical sync signal output terminal    Not used
F28
VDINCLK
O
Video clock signal output terminal    Not used
G1
INB
I
Main beam (B) input from the BD drive
G2
INA
I
Main beam (A) input from the BD drive
G3
TRINA
I
Tracking signal (A) input terminal    Not used
G4
AUX1
I
Monitoring signal input from the BD drive
G5
VWDC3O
O
Laser diode control voltage output terminal    Not used
G6
AGND12_1A
-
Ground terminal
G7
AVSS12_REC
-
Ground terminal
G9
GPIO2
I/O
Not used
G11
SPBCK/DIN2
I
SPDIF (for digital audio output) signal input from the digital in optical receiver or digital in 
coaxial jack
G14
AVSS12_APLL
-
Ground terminal
G15
AVDD12_APLL
-
Power supply terminal (+1.2V)
G16
AVSS12_HDMI_TX
-
Ground terminal
G17
AVSS33_VDAC_R
-
Ground terminal
G20
VDIN35/LIN
I/O
Not used
G23
ETTXD0
O
Transmit data output terminal    Not used
G24
ETTXCLK
O
Transmit clock signal output terminal    Not used
G25
ETRXD3
I
Receive data input terminal    Not used
G26
ETRXCLK
I
Receive clock signal input terminal    Not used
G27, 
G28
ETRXD1, ETRXD2
I
Receive data input terminal    Not used
H1
IND
I
Main beam (D) input from the BD drive
H2
INC
I
Main beam (C) input from the BD drive
H3
TRINC
I
Tracking signal (C) input terminal    Not used
H4
TRINB
I
Tracking signal (B) input terminal    Not used
H5
TRIND
I
Tracking signal (D) input terminal    Not used
H6
FVREF
O
Reference voltage output terminal    Not used
H21
DVCC33_IO_STB
-
Power supply terminal (+3.3V)
H22
AVSS33_LDO
-
Ground terminal
H23
ETTXD1
O
Transmit data output terminal    Not used
H24
GPIO8/5V_RX
I
Power supply voltage (+5V) input from the HDMI IN connector
H25
ETTXEN
O
Transmit enable signal output terminal    Not used
H26
ETTXD3
O
Transmit data output terminal    Not used
J3
INH
O
Sub beam (H) input from the BD drive
J4
ING
O
Sub beam (G) input from the BD drive
J5
AVDD33_1A
-
Power supply terminal (+3.3V)
J6
AGND33_1A
-
Ground terminal
J13, J14
DVCC33_IO_5
-
Power supply terminal (+3.3V)
J18, J19
DVCC33_IO_3
-
Power supply terminal (+3.3V)
J21
DVCC33_IO_STB
-
Power supply terminal (+3.3V)
J23
ETTXD2
O
Transmit data output terminal    Not used
J24
AVDD33_LDO
-
Power supply terminal (+3.3V)
J25
UARXD
I
Receive data input terminal
J26
ETMDIO
I/O
Management data input/output terminal    Not used
J27
ETCOL
I
Collision detection signal input terminal    Not used
J28
ETMDC
O
Management data clock signal output terminal    Not used
K1
RFIP
I
BD RF signal (positive) input from the BD drive
K2
RFIN
I
BD RF signal (negative) input from the BD drive
K3
INE
O
Sub beam (E) input from the BD drive
K4
INF
O
Sub beam (F) input from the BD drive
HBD-L600/L800/L800M
76
Pin No.
Pin Name
I/O
Description
K5
HAVC
O
Reference voltage output to the BD drive
K6
V14
O
Reference voltage (+1.4V) output to the coil/motor driver
K10
DGND
-
Ground terminal
K11
DVCC10_K
-
Power supply terminal (+1.1V)
K12
DGND
-
Ground terminal
K13
DVCC10_K
-
Power supply terminal (+1.1V)
K14
DGND
-
Ground terminal
K15
DVCC10_K
-
Power supply terminal (+1.1V)
K16
DGND
-
Ground terminal
K17
DVCC10_K
-
Power supply terminal (+1.1V)
K18
DGND
-
Ground terminal
K19
DVCC10_K
-
Power supply terminal (+1.1V)
K21
AVDD10_LDO
-
Power supply terminal for internal standby
K23
RESET_
I
Reset signal input from the system controller    “L”: reset
K24
OPWRSB
O
Power control signal output to the system controller
K25
IR
I
SIRCS signal input terminal   Not used
K26
UATXD
O
Transmit data output terminal
L1
RFIP2
I
DVD RF signal (positive) input from the BD drive
L2
RFIN2
I
DVD RF signal (negative) input from the BD drive
L3
FOO
O
Focus servo drive signal output to the coil/motor driver
L4
EQBIAS
O
External bias connection terminal
L5
AVDD12_2A
-
Power supply terminal (+1.15V)
L6
AVDD33_3A
-
Power supply terminal (+3.3V)
L7
AGND33_2
-
Ground terminal
L10
DVCC10_K
-
Power supply terminal (+1.1V)
L11
DGND
-
Ground terminal
L12
DVCC10_K
-
Power supply terminal (+1.1V)
L13
DGND
-
Ground terminal
L14
DVCC10_K
-
Power supply terminal (+1.1V)
L15
DGND
-
Ground terminal
L16
DVCC10_K
-
Power supply terminal (+1.1V)
L17
DGND
-
Ground terminal
L18
DVCC10_K
-
Power supply terminal (+1.1V)
L19
DGND
-
Ground terminal
L21
DGND
-
Ground terminal
L25
VSTB
O
Video muting on/off control signal output to the video amplifi er    “L”: muting on
L26
LCDRD
O
Serial data output to the system controller
L27
RCLK0_B
O
Clock signal (positive) output to the SD-RAM
L28
RCLK0_B_
O
Clock signal (negative) output to the SD-RAM
M3
TLO
O
Tilt servo drive signal output to the coil/motor driver
M4
TRO
O
Tracking servo drive signal output to the coil/motor driver
M5
AGND33_3A
-
Ground terminal
M6
AGND12_2A
-
Ground terminal
M9
DVCC10_K
-
Power supply terminal (+1.1V)
M10 to 
M18
DGND
-
Ground terminal
M19
DVCC10_K
-
Power supply terminal (+1.1V)
M21
DVCC15_IO_1
-
Power supply terminal (+1.5V)
M23
VDATA
I
Serial data input from the system controller
M24
VCLK
O
Serial data transfer clock signal output to the system controller
M25, 
M26
RDQ5_B, RDQ4_B
I/O
Two-way data bus with the SD-RAM
N1
FEFMO
O
Sled motor drive signal output to the coil/motor driver
N2
FEDMO
O
Spindle motor drive signal output to the coil/motor driver
N3
FEFMO2
O
Sled motor drive signal output to the coil/motor driver
N4
FETRAYPWM
O
Loading motor drive signal output to the coil/motor driver
N5
FEFMO4
O
Stepping motor drive signal output to the motor driver
N6
FEMPXOUT2
O
Monitoring signal output terminal
N8
DVCC33_IO
-
Power supply terminal (+3.3V)
N9
DGND
-
Ground terminal
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