Sony AVD-K800P / HT-C800DP Service Manual ▷ View online
65
AVD-K800P
Pin No.
201
202
203
204
205
206
207
208
I/O
I
I
I/O
—
—
I/O
I/O
—
Pin Name
TCK
RESET
BUS CLK
GND
VDD
HA3
HA2
GNDP
Description
TCK signal input
ZIVA reset input
Not used
Ground terminal (inside core)
Power supply terminal (+1.8V) (inside core)
Address bus 3
Address bus 2
Ground terminal (I/O signal)
66
AVD-K800P
• IC901 CX973F064R-1 (MECHANISM CONTROLLER)(DMB03 BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14 to 21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43, 44
45
46
47
48
49
50
51
52
53
54
55
56
I/O
O
O
O
O
I/O
I
O
O
I
O
O
O
—
I/O
I
I
O
O
I
O
O
I
I
I
O
I
O
O
O
O
I
—
I
O
—
O
O
O
I
I
O
O
O
I
O
O
—
I
Pin Name
NO USE
SDEN
DOCTRL/
ISBTEST
XPST 2753
SDA EEP
MNT1
FCS JMP 1
FCS JMP 2
SENS CD
CDSP2
CDSP4
XCS DVD
VSS
D0 to D7
INIT0 DVD
INIT1 DVD
MSCK SAMBA
XRST 1882
SCOR
LAT CD
LD ON
MIRR
COUT CD
INLIM
CS ZIVA
SI ZIVA
SO ZIVA
SCK ZIVA
DRVIRQ
DRVRDY
RST
VSS
XTAL
EXTAL
VDD
SLED A, SLED B
SCK DSD
SDOUT DSD
SDIN DSD
READY DSD
DATA CD
CLOK CD
XMSLAT
SQSO
MUTE DSD
SQCK
VSS
CONTROL 4
Description
Not used
Serial data enable signal output to DVD/CD RF amplifier
Digital out on/off control signal output to the digital signal processor
“L”: digital out off, “H”: digital out on
“L”: digital out off, “H”: digital out on
Not used
Two-way data bus with the EEPROM
EEPROM ready signal input from the DVD decoder
Focus jump 1 signal output to the motor/coil driver
Focus jump 2 signal output to the motor/coil driver
Internal status (SENSE) signal input from the digital signal processor
Loading motor drive signal (loading in direction) output terminal
Loading motor drive signal (loading out direction) output terminal
Chip select signal output to the DVD decoder
Ground terminal (digital system)
Two-way data bus with the DVD decoder
Interrupt signal input from the DVD decoder
Interrupt signal input from the DVD decoder
Serial data transfer clock signal output to the DSD decoder
Reset signal output to the DVD decoder “L”: reset
Subcode sync (S0+S1) detection signal input from the digital signal processor
Serial data latch pulse signal output to the digital signal processor
Laser diode on/off control signal output to the DVD/CD RF amplifier
“L”: laser diode off, “H”: laser diode on
“L”: laser diode off, “H”: laser diode on
Mirror signal input from the digital signal processor
Numbers of track counted signal input from the digital signal processor
Detection signal input from limit in switch The optical pick-up is inner position when “H”
Chip select signal output to the DVD system processor
Serial data input from the DVD system processor
Serial data output to the DVD system processor
Serial data transfer clock signal output to the DVD system processor
Interrupt request signal output to the DVD system processor
Ready signal output to the DVD system processor
System reset signal input from the DVD system processor “L”: reset
Ground terminal (digital system)
System clock input terminal (20 MHz)
System clock output terminal (20 MHz)
Power supply terminal (+3.3V) (digital system)
Sled motor drive signal output
Output terminal for offset adjustment of APEO
Serial data output to the DSD decoder
Serial data input from the DSD decoder
Ready signal input from the DSD decoder “L”: ready
Serial data output to the digital signal processor
Serial data transfer clock signal output to the digital signal processor
Serial data latch pulse signal output to the DSD decoder
Subcode Q data input from the digital signal processor
Muting on/off control signal output to the DSD decoder “H”: muting on
Subcode Q data reading clock signal output to the digital signal processor
Ground terminal (digital system)
Disc tray in detection signal input terminal Not used
67
AVD-K800P
Pin No.
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89 to 96
97
98
99
100
Pin Name
CONTROL 2
GFS DVD
MUTE CD
MUTE 2D
SLED
FG
SP ON
JIT
TE
PI
FE
AVSS
AVREF
AVDD
GFS CD
SCLK CD
TSD
FOK CD
LOCK CD
LDSEL
SACD/DVD
I2C SIO
I2C SCL
RXD
TXD
SDCLK RF
SDATA RF
XWR
XRD
(PWE)
VDD
VSS
A0 to A7
DSAVE
XDRST
WP EEP
SCL EEP
I/O
I
I
O
O
I
I
O
I
I
I
I
—
I
—
I
O
O
I
I
O
O
I/O
I/O
I
O
O
I/O
O
O
—
—
—
O
O
O
O
O
Description
Disc tray out detection signal input terminal Not used
Guard frame sync signal input from the DVD decoder
Muting on/off control signal output to the digital signal processor “H”: muting on
Muting on/off control signal output to the motor/coil driver “H”: muting on
Sled motor servo drive PWM signal input terminal
Spindle motor control signal input
Muting on/off control signal output to the motor/coil driver “H”: muting on
Jitter signal input
Tracking error signal input from the DVD/CD RF amplifier
Pull in signal input from the DVD/CD RF amplifier
Focus error signal input from the DVD/CD RF amplifier
Ground terminal (for A/D converter)
Reference voltage input terminal (for A/D converter)
Power supply terminal (+3.3V) (for A/D converter)
Guard frame sync signal input from the digital signal processor
SENSE serial data reading clock signal output to the digital signal processor
Thermal shut down signal output to the motor/coil driver
Focus OK signal input from the digital signal processor
GFS is sampled by 460 Hz “H” input when GFS is “H”
Laser diode selection signal output
“SACD/DVD selection signal output “L”: DVD, “H”: SACD”
Communication data bus with the DVD system processor and system controller
Communication data reading clock signal input or transfer clock signal output with the DVD system processor
and system controller
and system controller
Serial data input from the RS-232C (for check)
Serial data output to the RS-232C (for check)
Serial data transfer clock signal output to the DVD/CD RF amplifier
Two-way data bus with the DVD/CD RF amplifier
Write strobe signal output to the DVD decoder
Read strobe signal output to the DVD decoder
Not used
Power supply terminal (+3.3V) (digital system)
Ground terminal (digital system)
Address signal output to the DVD decoder
Motor/coil driver power save control signal output terminal
Reset signal output to the digital signal processor and DSD decoder “L”: reset
Write protect signal output to the EEPROM
Clock signal output to the EEPROM
68
AVD-K800P
• IC901
µ
PD703033BYGF-M15-3BA (SYSTEM CONTROLLER)(MAIN BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
O
O
I/O
O
I/O
I
O
O
—
—
O
I
O
O
I
O
I
I
I
O
—
I
O
O
I
I
O
O
O
O
O
O
O
I
—
—
—
—
—
—
—
—
O
I
O
O
O
O
I
O
Pin Name
TUN_CLK
TUN_LATCH
I2C_DATA
ZIVA_RST
I2C_CLK
DSP_DOUT
DSP_ERROR
DSP_EXLOCK
EVDD
EVSS
TUN_MUTE
FAN ON_H
FANH_SPEED
DSP_HCE
DSP_ACK
DSP_BST
DSP_DECODE
DIR_HCE
DIR_ERR
DIR_RST
VPP
DIR_INT
DIR_HDIN
DIR_HCLK
DIR_HDOUT
2PIN
COMP_MUTE
VIDEO_MUTE
FUNC_MUTE
FAN ON
F_SPEED
PWR RY
M_CH_LED
RESET
XT1
XT2
REGC
X1
X2
VSS
VDD
CLKOUT
DIR_XSTATE
HP_SW
VSW1
VSW2
VOL_DATA
VOL_CLK
PROG_SW
STBY_LED
Description
Clock output to the tuner
Latch signal output to the tuner
I2C data input/output
Reset signal output to the DVD system processor (IC207)
I2C clock input/output
Not used (open)
Not used (open)
Not used (open)
Power supply terminal (port)
Ground terminal (port)
Muting signal output to the tuner
Fan control signal input for high speed
Fan motor speed control signal output for high speed
Not used (open)
Not used (open)
Not used (open)
Not used (fixed at “L”)
Not used (open)
Not used (open)
Not used (open)
Power supply for programming
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Component video signal muting signal output to the video amplifier and driver (IC1301)
Video signal muting signal output to the video amplifier and driver (IC1301)
Audio muting signal output
Not used
Not used
Main power relay control signal output
Multi channel decoding LED control signal output
System reset signal input
Not used (open)
Not used (open)
Regulator output stabilization capacitance connection terminal
Resonator connection terminal for main clock (20MHz)
Resonator connection terminal for main clock (20MHz)
Ground terminal
Power supply terminal
Not used (open)
Not used (open)
Headphone plug insert detection signal input
Not used (open)
Video signal selection control signal output to the video input selector (IC1302)
Data output to the sound processor (IC1312) and the audio input selector (IC1303)
Clock output to the sound processor (IC1312) and the audio input selector (IC1303)
Not used (fixed at “L”)
Not used (open)
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