Sony AIR-SA50R Service Manual ▷ View online
AIR-SA50R
17
• Waveforms
– MAIN Board –
326 ns
3.4 Vp-p
4
IC302 8 (BCK)
1 V/DIV, 200 ns/DIV
20.8
Ps
3.5 Vp-p
5
IC302 7 (LRCK)
1 V/DIV, 10
Ps/DIV
2
IC401 qd (XOUT)
1 V/DIV, 100 ns/DIV
200 ns
3.3 Vp-p
1
IC401 qa (XCOUT)
1 V/DIV, 20
Ps/DIV
30.4
Ps
1.8 Vp-p
81.4 ns
3.9 Vp-p
3
IC351 4 (OUT)
1 V/DIV, 50 ns/DIV
AIR-SA50R
18
• IC Block Diagrams
– MAIN Board –
IC301 TAS5706PAPR
IC302 PCM1808PWR
SERIAL
AUDIO
PORT
7 ABQs
PDAP
MIXERS BASS
MANAGEMENT
MICROCONTROLLER
BASED SYSTEM
CONTROL
SAMPLE RATE
AUTODETECT
AND PLL
SERIAL
CONTROL
TERMINAL CONTROL
4th
ORDER
NOISE
SHAPER
AND
PWM
2 ABQ
HIGH
PRECISION
VOLUME
SRC
SDIN1
25
SDIN2
24
VR_DIG
27
DVSS
26
SCLK
23
LRCLK
22
MUTE
21
DVSS
20
OSC_RES
19
VREG_EN
18
PDN
17
SCL
29
SDA
28
STEST
31
HPSEL
30
TEST2
BYPASS
AGND
VCLAMP_CD
BST_D
AVCC
BST_A
VCLAMP_AB
BST_B
PVCC_B
PVCC_B
PVCC_B
OUT_B
PVCC_C
BST_C
OUT_C
PVCC_C
OUT_C
32
56
57
54
55
55
58
59
60
61
60
61
62
63
63
64
52
53
50
51
49
7 ABQs
R
SUB
L
BQ
DRC
DRC
LOUDNESS
BQ
2x HB
FET OUT
2x HB
FET OUT
CLICK AND POP
CONTROL
DVDD
33
MCLK
34
BKND_ERR
35
VALID
36
HPL_PWM
37
HPR_PWM
38
SUB_PWM-
39
SUB_PWM+
40
PVCC_D
41
PVCC_D
42
PGND_D
43
PGND_D
44
OUT_D
45
OUT_D
46
PGND_C
47
PGND_C
48
OUT_B
1
PGND_B
2
PGND_B
3
OUT_A
4
OUT_A
5
PGND_A
6
PGND_A
7
PVCC_A
8
PVCC_A
9
AVDD
10
AVSS
11
PLL_FLTM
12
PLL_FLTP
13
VR_ANA
14
DVDD
15
RESET
16
DELTA-SIGMA
MODULATOR
DELTA-SIGMA
MODULATOR
ANTIALIAS
LOW-PASS FILTER
ANTIALIAS
LOW-PASS FILTER
AGND
VCC
2
3
3
VDD
DGND
4
5
5
LRCK 7
REFERENCE
u1/64
DECIMATION
FILTER
WITH
HIGH-PASS
FILTER
SERIAL
INTERFACE
&
MODE/FORMAT
CONTROL
FMT
12
VINR
14
VINL
13
MD1
11
MD0
10
DOUT
9
BCK
8
CLOCK & TIMING CONTROL
POWER
SUPPLY
SUPPLY
SCKI 6
VREF 1
AIR-SA50R
19
1
VIN
2
CONTROL
5
GND
3
VOUT
4
VA
D
J
BANDGAP
REFERENCE
OVER VOLTAGE
PROTECTION
OVER CURRENT
PROTECTION
THERMAL
PROTECTION
ON/OFF
CONTROL
REGULATOR
CONTROL
CIRCUIT
BANDGAP
REFERENCE
+
–
OVER HEAT &
OVER CURRENT
PROTECTION
1
VCONT
3
NP
2
GND
4
VOUT
5
VIN
VOUT
1
FB
2
VIN
3
NOISE P
ASS
6
GND
5
VCONT
4
CONTROL
CIRCUIT
OVER HEAT
PROTECTION
&
OVER CURRENT
PROTECTION
+
–
BANDGAP
REFERENCE
SHORT CIRCUIT
PROTECTION
NC 1
VSS
4
VIN
5
ON/OFF
6
+
–
–
VIN 2
VOUT 3
VREF
IC901, 902 NJM2387ADL3 (TE2)
IC903 TK11150CSCL-G
IC904, 906, 952 TK11133CSCL-G
IC904, 906, 952 TK11133CSCL-G
IC951 S-812C33BPI-C4NTFG
IC905 TK11100CSCB-G
AIR-SA50R
20
Pin No.
Pin Name
I/O
Description
1 to 3
NC
-
Not used
4
IR_IN
I
SIRCS signal input from the remote control receiver
5 to 7
NC
-
Not used
8
BYTE
I
External data bus width selection signal input terminal
9
CNVSS
I
Change processor mode setting signal input terminal
10
XCIN
I
Sub system clock input terminal (32.768 kHz)
11
XCOUT
O
Sub system clock output terminal (32.768 kHz)
12
RESET
I
System reset signal input from the reset signal generator “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
13
XOUT
O
System clock output terminal (5 MHz)
14
VSS
-
Ground terminal
15
XIN
I
System clock input terminal (5 MHz)
16
VCC1
-
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt signal input terminal Not used
18
TSINT
I
Interrupt signal input from the TOUCH board
19
DAMP PDN
O
Power down signal output to the digital power amplifi er “L”: power down
20
AC CUT
I
AC cut detection signal input terminal “L”: AC cut
21
DAMP MUTE
O
Muting on/off control signal output to the digital power amplifi er “L”: muting on
22
DAMP CLK
O
Serial data transfer clock signal output to the digital power amplifi er
23
DAMP VALID
I
Valid signal input from the digital power amplifi er “H”: valid
24
DAMP DOUT
O
Serial data output to the digital power amplifi er
25
DAMP RST
O
Reset signal output to the digital power amplifi er “L”: reset
26
BUZZER
O
Buzzer sound signal output terminal
27
TRST
O
Reset signal output to the TOUCH board “L”: reset
28
BEEP
O
Beep sound signal output terminal
29
TSCLK
O
I2C clock signal output to the TOUCH board
30
TSDATA
I/O
Two-way I2C data bus with the TOUCH board
31
TXD1
-
Not used
32
RXD1
-
Not used
33
CLK1
-
Not used
34
RTS1
-
Not used
35
O_POWER
O
Power supply on/off control signal output terminal “H”: power on
36
NC
O
Not used
37
STBY_LED
O
LED drive signal output terminal for STANDBY indicator “H”: LED on
38
MODULE_ON
O
Power supply on/off control signal output terminal for wireless transceiver “H”: power on
39
CLOCK
-
Not used
40
LCD_RST
O
Reset signal output to the liquid crystal display “L”: reset
41
EPM
-
Not used
42
LCD SCL
O
Serial data transfer clock signal output to the liquid crystal display
43
LCD CE
O
Chip enable signal output to the liquid crystal display
44
LCD DATA
O
Serial data output to the liquid crystal display
45
LCD RS
O
Read strobe signal output to the liquid crystal display
46
FLASH CE
-
Not used
47
EEPROM DATA
I/O
Two-way I2C data bus with the EEPROM
48
EEPROM CLK
O
I2C clock signal output to the EEPROM
49
ADC3.3V_ON
O
Power supply on/off control signal output terminal for +3.3V power supply “H”: power on
50
A5V_ON
O
Power supply on/off control signal output terminal for +5V power supply “H”: power on
51, 52
LIGHT2, LIGHT1
O
LED drive signal output terminal for liquid crystal display back light “H”: LED on
53
SONY LOGO LED
O
LED drive signal output terminal for SONY indicator “H”: LED on
54
S-AIR LED
O
LED drive signal output terminal for S-AIR indicator “H”: LED on
55 to 57
NC
-
Not used
58
S-AIR RST
O
Reset signal output to the wireless transceiver “L”: reset
59 to 61
NC
-
Not used
62
VCC2
-
Power supply terminal (+3.3V)
63
NC
-
Not used
64
VSS
-
Ground terminal
• IC Pin Function Description
MAIN BOARD IC401 R5F3640DDFAR-128 (SYSTEM CONTROLLER)
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