DOWNLOAD Sharp LC-46XL1E (serv.man5) Service Manual ↓ Size: 7.14 MB | Pages: 32 in PDF or view online for FREE

Model
LC-46XL1E (serv.man5)
Pages
32
Size
7.14 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD / Major IC Informations
File
lc-46xl1e-sm5.pdf
Date
PREV: Sharp LC-46XL1E (serv.man4) Service Manual

Sharp LC-46XL1E (serv.man5) Service Manual ▷ View online

LC-46XL1E/RU, LC-52XL1E/RU
5 – 13
66
R1X1-
I
TMDS input data pair. HDMI Port 1.
71
R1X2+
I
TMDS input data pair. HDMI Port 1.
70
R1X2-
I
TMDS input data pair. HDMI Port 1.
22, 23, 35, 74, 
79, 92, 105, 114, 
128, 139
CVCC18
—
Digital Logic VCC. (1.8V)
21, 24, 36, 73, 
80, 91, 106, 115, 
127, 138
CGND
—
Digital Logic GND.
5, 16, 26, 76, 89, 
109, 122, 134
IOVCC
—
Input/Output Pin VCC. (3.3V)
4, 15, 25, 75, 90, 
108, 120, 135
IOGND
—
Input/Output Pin GND.
38, 42, 46, 50, 
57, 61, 65, 69
AVCC
—
TMDS Analog VCC. (3.3V)
41, 45, 49, 53, 
60, 64, 68, 72
AGND
—
TMDS Analog GND.
37
PVCC0
—
TMDS Port 0 PLL VCC. (3.3V)
55
PVCC1
—
TMDS Port 1 PLL VCC. (3.3V)
54
TMDSPGND
—
TMDS PLL GND.
94
AUDPVCC18
—
ACR PLL VCC. (1.8V)
95
AUDPGND
—
ACR PLL GND.
98
XTALVCC
—
ACR PLL Crystal Input VCC. (3.3V)
99
REGVCC
—
ACR PLL Regulator VCC. (3.3V)
Pin No.
Pin Name
I/O
Pin Function
LC-46XL1E/RU, LC-52XL1E/RU
5 – 14
8. IC3002: RH-IXB755WJZZ
VIDEO GRAPHICS CONTROLLER
Pin No.
Pin Name
I/O
Pin Function
Seet name
Destination
M23 
XIN 
I
20. 25MHz clock or crystal input
X3001
M22 
XOUT 
O
Output to a crystal that is connected to XIN.
X3001
D18 
RESET_N 
I
Reset input (active low)   
RESET_N
IC1710 62pin
G15
POR_N
O
Power-on reset generator (active low), May be connected to 
RESET_N. 
NC
H7 
TM 
I
Test mode enable.   
IC3001 8pin
L20 
VARCLK 
O
Vriable clock output (e.g. FRC94xxAclk)   
NC
Y20 
CV01 
O
Analog video out (CVBS or Y) (EXT2-VOUT2)
CVO1
SC2703 15pin
Y23 
CV02 
O
Analog video out (CVBS or Y) (EXT1-VOUT1)
CVO2
SC2702 15pin
Y22 
CV03
O
— (pull up)
CVO3
BU3.3V
Y21 
CV04 
O
— (pull up)
CVO4
BU3.3V
AA23 
CV05 
O
— (pull up)
CVO5
BU3.3V
AA22 
CV06 
O
— (pull up)
CV06
BU3.3V
AB23 
CV09 
O
— (pull up)
CVO9
BU3.3V
AC23 
CVI1
I
Analog video in (CVBS) (TUNER CVBS IN)    
CVBS
SC2705 2pin
AB22 
CVI2
I
Analog video in (CVBS) (EXT1 VIN1)    
VIN1
SC2702 10pin
AC22 CVI3
I
—
GND
AA21 
CVI4
I
Analog video in (CVBS) (DVB CVBS IN)    
DTV_CVBS
P2702 33pin
AB20 
YI1
I
Analog video in (Y or CVBS) (EXT3 CVBS IN)
IN3Y
SC2703 21pin
AB21 
YI2
I
Analog video in (Y or CVBS) (EXT2 Y/CVBS IN)   
VIN2
SC2703 10pin
AA20 YI3
I
—
GND
AC20 
CI1
I
Analog video in (chroma) (EXT3 IN3C IN)
IN3C
SC2703 23Pin
AC21 
CI2
I
Analog video in (chroma) (EXT2 C2 IN)
C2
SC2703 4pin
AC19 CI3
I
—
GND
Y19 
RI1
I
Analog component input 1 (EXT1-RED1)    
RED1
SC2702 4pin
AB19 
GI1
I
Analog component input 1 (EXT1-GREEN1)
GREEN1
SC2702 6pin
AC18 
BI1
I
Analog component input 1 (EXT1-BLUE1)
BLUE1
SC2702 8pin
AA19 
FBI1
I
Analog component input 1 (EXT1-FAST-SW1)
IN1FSW
SC2702 1pin
AA18 
RI2 
I
Analog component input2 (DVB-R) 
DTV_R
P2702 36pin
AB18 
GI2 
I
Analog component input2 (DVB-G)         
DTV_G
P2702 32pin
Y18 
BI2
I
Analog component input2 (DVB-B)   
DTV_B
P2702 28pin
AC17 
FBI2
I
Analog component input2 GND 
GND
LC-46XL1E/RU, LC-52XL1E/RU
5 – 15
AA17 
RI3 
I
Analog component input3 (APC_R) 
APC_R
SC2303 2pin
AB17 
GI3
I
Analog component input3 (APC_G) 
APC_G
SC2303 1pin
Y17 
BI3
I
Analog component input3 (APC_B)
APC_B
SC2303 3pin
AC16 FBI3
I
Horizontal 
sync 
input. (PCV_H)
PCVH
IC2306 1pin
W21 
VIN 
I
Vertical sync input. (PCV_V)
PCVV
IC2305 6pin
B17
I2SWS
I
I2S word strobe (digital audio left/right select input)
I2SWS
IC3701 11pin
C17
I2SCL
I
I2S clock (digital audio bit clock input)
I2SCL
IC3701 10pin
D17
I2SDA1
I
I2S data input (PCM audio data)
I2SDA1
IC3701 9pin
A18
I2SDA0
O
I2S data output (PCM audio data)
I2SDAO
IC3701 8pin
L3 
RAMD_31 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_31)
DDR_DQ31 
IC3502 65pin
L4 
RAMD_30 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_30)
DDR_DQ30 
IC3502 63pin
K3 
RAMD_29 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_29)
DDR_DQ29 
IC3502 62pin
K1 
RAMD_28 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_28)
DDR_DQ28 
IC3502 60pin
K4 
RAMD_27 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_27)
DDR_DQ27 
IC3502 59pin
J3 
RAMD_26 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_26)
DDR_DQ26 
IC3502 57pin
J4 
RAMD_25 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_25)
DDR_DQ25 
IC3502 56pin
H3 
RAMD_24 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_24)
DDR_DQ24 
IC3502 54pin
H4 
RAMD_23 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_23)
DDR_DQ23 
IC3502 13pin
G3 
RAMD_22 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_22)
DDR_DQ22 
IC3502 11pin
G4 
RAMD_21 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_21)
DDR_DQ21 
IC3502 10pin
F3 
RAMD_20 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_20)
DDR_DQ20 
IC3502 8pin
F1
RAMD_19
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_19)
DDR_DQ19 
IC3502 7pin
G2 
RAMD_18 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_18)
DDR_DQ18 
IC3502 5pin
G1
RAMD_17 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_17)
DDR_DQ17 
IC3502 4pin
H2 
RAMD_16 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_16)
DDR_DQ16 
IC3502 2pin
C1
RAMD_15 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_15)
DDR_DQ15 
IC3501 65pin
D2 
RAMD_14 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_14)
DDR_DQ14 
IC3501 63pin
D1
RAMD_13 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_13)
DDR_DQ13 
IC3501 62pin
E2 
RAMD_12 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_12)
DDR_DQ12 
IC3501 60pin
D3 
RAMD_11
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_11)
DDR_DQ11 
IC3501 59pin
E4 
RAMD_10
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_10)
DDR_DQ10
IC3501 57pin
E3 
RAMD_9 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_9)
DDR_DQ9
IC3501 56pin
F4 
RAMD_8 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_8)
DDR_DQ8
IC3501 54pin
C7 
RAMD_7 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_7)
DDR_DQ7
IC3501 13pin
D6 
RAMD_6
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_6)
DDR_DQ6
IC3501 11pin
C6 
RAMD_5 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_5)
DDR_DQ5
IC3501 10pin
D5 
RAMD_4 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_4)
DDR_DQ4
IC3501 8pin
A7 
RAMD_3 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_3)
DDR_DQ3
IC3501 7pin
B6 
RAMD_2 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_2)
DDR_DQ2
IC3501 5pin
A6 
RAMD_1
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_1)
DDR_DQ1
IC3501 4pin
B5 
RAMD_0 
I/O
DDR-SDRAM bi-directional data bus. (SDRAM-RAMD_0)
DDR_DQ0
IC3501 2pin
A2 
RAMA_12 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_12)
DDR_A12
IC3501 42pin
A3 
RAMA_11 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_11)
DDR_A11
IC3501 41pin
D8 
RAMA_10 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_10)
DDR_A10
IC3501 28pin
B3 
RAMA_9 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_9)
DDR_A9
IC3501 40pin
A4 
RAMA_8 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_8)
DDR_A8
IC3501 39pin
B4 
RAMA_7 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_7)
DDR_A7
IC3501 38pin
C3 
RAMA_6 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_6)
DDR_A6
IC3501 37pin
C4 
RAMA_5 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_5)
DDR_A5
IC3501 36pin
D4 
RAMA_4 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_4)
DDR_A4
IC3501 35pin
D9 
RAMA_3
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_3)
DDR_A3
IC3501 32pin
AlO 
RAMA_2 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_2)
DDR_A2
IC3501 31pin
B9 
RAMA_1 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_1)
DDR_A1
IC3501 30pin
C9 
RAMA_0 
O
Address bits for DRAM (Row/Col) (SDRAM-RAMA_0)
DDR_A0
IC3501 29pin
C8
RAMBA_1
O
DRAM bank select (SDRAM-RAM_BA1)
DDR_BA1
IC3501 27pin
D7 
RAMBA_0 
O
DRAM bank select (SDRAM-RAM_BA0)
DDR_BA0
IC3501 26pin
B8 
RAMRAS_N 
O
DRAM row address strobe (active low) (SDRAM-RAMRAS_N)
N_DDR_RAS
IC3501 23pin
A8 
RAMCAS_N 
O
DRAM column address strobe (active low) (SDRAM-RAMCAS_N) N_DDR_CAS
IC3501 22pin
J1
RAMDM_3 
O
DRAM byte mask lines. (SDRAM-RAMDM_3)
DDR_DM3
J2 
RAMDM_2 
O
DRAM byte mask lines. (SDRAM-RAMDM_2)
DDR_DM2
F2 
RAMDM_1 
O
DRAM byte mask lines. (SDRAM-RAMDM_1)
DDR_DM1
IC3501 47pin
C5 
RAMDM_0 
O
DRAM byte mask lines. (SDRAM-RAMDM_0)
DDR_DM0
IC3501 20pin
B7 
RAMWE_N 
O
DRAM write enable (active low) (SDRAM-RAMWE_N)
RAMWE_N 
A9 
RAMCS_N 
O
DRAM chip select (active low) (SDRAM-RAMCS_N)
RAMCS_N 
Pin No.
Pin Name
I/O
Pin Function
Seet name
Destination
LC-46XL1E/RU, LC-52XL1E/RU
5 – 16
A1
RAMCKE 
O
DRAM clock enable. (SDRAM-RAMCKE)
RAMCKE 
B2 
RAMCLK 
O
DRAM clock output. (SDRAM-RAMCLK)
RAMCLK 
C2 
RAMCLK_N 
O
DRAM clock output (inverted) (SDRAM-RAMCLK_N)
RAMCLK_N 
K2 
RAMDQS_3 
I/O
Strobe signal. (SDRAM-RAMDQS_3)
RAMDQS_3 
H1
RAMDQS_2 
I/O
Strobe signal. (SDRAM-RAMDQS_2)
RAMDQS_2 
E1
RAMDQS_1 
I/O
Strobe signal. (SDRAM-RAMDQS_1)
RAMDQS_1 
A5 
RAMDQS_0 
I/O
Strobe signal. (SDRAM-RAMDQS_0)
RAMDQS_0 
B1
RAMCLKIN 
I
Clock (RAMCLK) feed back. (SDRAM-RAMCLKIN)
RAMCLKIN 
G7 
SSTLVREF 
I
SSTL2 Reference Voltage. (SDRAM-SSTLVREF)
SSTL
K20 
SCL1
I
12C bus 1clock.        
SCL1
IC3001
K21 
SDA1 
I/O
12C bus 1 data.   
SDA1 
IC3001
B18 
SCL2 
I
12C bus 2 clock. (no used)
BU3.3V
C18 
SDA2 
I/O
12C bus 2 data. (no used)
BU3.3V
H17 
TRST 
I
Test reset.   
TRST
P2304 1pin
G17 
TMS 
I
Test mode select.
TMS
P2304 7pin
G8 
TDO 
O
Test data output.
TDO
P2304 5PIN
G16 
TCLK 
I
Test clock.
TCLK
P2304 9PIN
G9 
TDI 
I
Test data input.
TDI
P2304 3PIN
M20 
CADC5 
I
CADC analog source input. (KEY-1) (to key-unit)
KEY1
P2302 1pin
M21 
CADC4 
I
CADC analog source input. (TH3001)
PICAA1
TH3001
L21 
CADC3 
I
CADC analog source input. (OPCIN)
OPCIN
K22 
CADC2 
I
CADC analog source input. (KEY-2) (to key-unit)
IF-AGC/KEY2
P2302 2pin
L22 
CADC1
I
CADC analog source input. (SLOW_SW1)
SLOWSW1
SC2702 3pin
L23 
CADC0 
I
CADC analog source input. (SLOW_SW2)
SLOWSW2
SC2703 3pin
N23
DPWM1 
O
Display-PWM outputs. (PWMOUT-BRT-INV)
PWMOUT
INV
N22
DPWM2 O
—
NC
W23
DPWM3 O
—
NC
W22
VITUFE 
O
V sync output of ITUE_FE.   
NC
U3
NVM_22 
O
NVM_[22:16] upper address bits (to-flash memory)
Pull-up and pull-down resistors must be used for boot-process 
configuration
IC3503 2pin
—
M2
NVM_21
O
NVM_[22:16] upper address bits (to-flash memory)
IC3503 15Pin
—
M4
NVM_20
O
NVM_[22:16] upper address bits (to-flash memory)
IC3503 12Pin
—
L1
NVM_19
O
NVM_[22:16] upper address bits (to-flash memory)
IC3503 11pin
—
M1
NVM_18
O
NVM_[22:16] upper address bits (to-flash memory)
IC3503 18pin
—
N4
NVM_17
O
NVM_[22:16] upper address bits (to-flash memory)
IC3503 19pin
—
U1
NVM_16
O
NVM_[22:16] upper address bits (to-flash memory)
IC3503 54pin
—
U4
NVM_15
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 51pin
IC3504 26piN
T1
NVM_14
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 49piN
IC3504 27pin
T2
NVM_13
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 47pin
IC3504 29pin
T3
NVM_12
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 45pin
IC3504 30pin
T4
NVM_11
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 42pin
IC3504 32pin
R1 
NVM_10
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 40piN
IC3504 33pin
R2
NVM_9
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 38pin
IC3504 35pin
R3
NVM_8
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 36pin
IC3504 36pin
R4
NVM_7
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 50pin
IC3504 37pin
P1
NVM_6
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 48pin
IC3504 38pin
P2
NVM_5
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 46pin
IC3504 40pin
P3
NVM_4
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 44pin
IC3504 41pin
P4
NVM_3
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 41pin
IC3504 43pin
N1
NVM_2
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 39piN
IC3504 44pin
N2
NVM_1
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 37pin
IC3504 46pin
N3
NVM_0
I/O
NVMD_[15:0] multiplexed address/data (to-flash memory)
IC3503 35pin
IC3504 47pin
L2
NVMOE_N
O
Output enable (active low)   
IC3503 34pin
—
M3
NVMWE_N
O
Write enable (active low)
IC3503 13pin
—
U2
ENVMALE
O
Address latch enable.
NVMALE
IC3504 48pin
R7 REXT_LVDS  S
External 
Resistor 
(6.2K
Ω, 1%)   
AC8 
PORT_A_29 
I
Port A data RGB or LVDS (TA1-)
TA1-
SC2302 40pin
AB8 
PORT_A_28 
I
Port A data RGB or LVDS (TA1+)
TA1+
SC2302 39pin
AC7 
PORT_A_27
I
Port A data RGB or LVDS (TB1-)
TB1-
SC2302 38pin
AB7 
PORT_A_26
I
Port A data RGB or LVDS (TB1+)
TB1+
SC2302 37pin
AC6 
PORT_A_25
I
Port A data RGB or LVDS (TC1-)
TC1-
SC2302 36pin
AB6 
PORT_A_24
I
Port A data RGB or LVDS (TC1+)
TC1+
SC2302 35pin
AC5 
PORT_A_23
I
Port A data RGB or LVDS (CK1-)
CK1-
SC2302 33pin
AB5 
PORT_A_22
I
Port A data RGB or LVDS (CK1+)
CK1+
SC2302 32pin
Pin No.
Pin Name
I/O
Pin Function
Seet name
Destination
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