Sharp LC-42LE761K Service Manual ▷ View online
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C. SUBWOOFER AMPLIFIER STAGE
1. PREAMPLIFIER (DRV632)
a. Description
The DRV632 is a 2-VRMS pop-free stereo line driver designed to allow the removal of the
output dc-blocking capacitors for reduced component count and cost. The device is ideal for
single-supply electronics where size and cost are critical design parameters.
Designed using TI’s patented DirectPath™ technology, The DRV632 is capable of driving
2 VRMS into a 10-kΩ load with 3.3-V supply voltage. The device has differential inputs and
uses external gain-setting resistors to support a gain range of ±1 V/V to ±10 V/V, and gain
can be configured individually for each channel. Line outputs have ±8-kV IEC ESD
protection, requiring just a simple resistor-capacitor ESD protection circuit. The DRV632 has
built-in active-mute control for pop-free audio on/off control. The DRV632 has an external
undervoltage detector that mutes the output when the power supply is removed, ensuring a
pop-free shutdown.
Using the DRV632 in audio products can reduce component count considerably compared
to traditional methods of generating a 2-VRMS output. The DRV632 does not require a power
supply greater than 3.3 V to generate its 5.6-Vpp output, nor does it require a split-rail power
supply. The DRV632 integrates its own charge pump to generate a negative supply rail that
provides a clean, pop-free ground-biased 2-VRMS output.
The DRV632 is available in a 14-pin TSSOP.
b. Features
• Stereo DirectPath™ Audio Line Driver
– 2 Vrms Into 10 kΩ With 3.3-V Supply
• Low THD+N < 0.01% at 2 Vrms Into 10 kΩ
• High SNR, >90 dB
• 600-Ω Output Load Compliant
• Differential Input and Single-Ended Output
• Adjustable Gain by External Gain-Setting Resistors
• Low DC Offset, <1 mV
• Ground-Referenced Outputs Eliminate DC-Blocking Capacitors
– Reduce Board Area
– Reduce Component Cost
– Improve THD+N Performance
– No Degradation of Low-Frequency Response Due to Output Capacitors
• Short-Circuit Protection
• Click- and Pop-Reduction Circuitry
• External Undervoltage Mute
• Active Mute Control for Pop-Free Audio On/Off Control
• Space-Saving TSSOP Package
C. SUBWOOFER AMPLIER STAGE
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Figure: PW package.
Table: Pin functions.
Table: Recommended operating conditions.
2. SUB WOOFER MAIN AMPLIFIER (TPA3112D1)
a. Description
The TPA3112D1 is a 25-W efficient, Class-D audio power amplifier for driving a bridge
tied speaker. Advanced EMI Suppression Technology enables the use of inexpensive ferrite
bead filters at the outputs while meeting EMC requirements. SpeakerGuard™ speaker
protection system includes an adjustable power limiter and a DC detection circuit. The
adjustable power limiter allows the user to set a "virtual" voltage rail lower than the chip
supply to limit the amount of current through the speaker. The DC detect circuit measures the
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4. POWER STAGE
Figure 7: Power socket and options.
Power socket is used for taking voltages which are 3.3V, 12V, 5V and 24V(VDD_Audio).
These voltages are produced in power card. Also socket is used for giving dimming, backlight
and standby signals with power card. İt is shown in figure 7.
Figure 8: General illustration of voltage stages on main board.
24V(VDD_Audio) goes directly to the audio side, through power socket other incoming
voltages from power card are converted several voltages, shown in figure 8.
3. POWER STAGE
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List of the components are:
SW1 and SW2 → FDC642P
DC/DC3, DC/DC1 and DC/DC4 → TPS65251
DC/DC2 → MP1484
LDO1 → APL5910
LDO2 → LM1117
FDC642P
General Description and Features
TPS65251
a) General Description
The TPS65251 features three synchronous wide input range high efficiency buck
converters. The converters are designed to simplify its application while giving the designer
the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems and have integrated power
transistors. The output voltage can be set externally using a resistor divider to any value
between 0.8 V and close to the input supply. Each converter features enable pin that allows a
delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time
by choosing the soft-start capacitor, and a current limit (RLIMx) pin that enables designer to
adjust current limit by selecting an external resistor and optimize the choice of inductor. The
current mode control allows a simple RC compensation.
The switching frequency of the converters can either be set with an external resistor
connected to ROSC pin or can be synchronized to an external clock connected to SYNC pin if
needed. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. 180° out
of phase operation between Buck 1 and Buck 2, 3 (Buck 2 and 3 run in phase) minimizes the
input filter requirements.
TPS65251 features a supervisor circuit that monitors each converter output. The PGOOD
pin is asserted once sequencing is done, all PG signals are reported and a selectable end of
reset time lapses. The polarity of the PGOOD signal is active high.
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List of the components are:
SW1 and SW2 → FDC642P
DC/DC3, DC/DC1 and DC/DC4 → TPS65251
DC/DC2 → MP1484
LDO1 → APL5910
LDO2 → LM1117
FDC642P
General Description and Features
TPS65251
a) General Description
The TPS65251 features three synchronous wide input range high efficiency buck
converters. The converters are designed to simplify its application while giving the designer
the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems and have integrated power
transistors. The output voltage can be set externally using a resistor divider to any value
between 0.8 V and close to the input supply. Each converter features enable pin that allows a
delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time
by choosing the soft-start capacitor, and a current limit (RLIMx) pin that enables designer to
adjust current limit by selecting an external resistor and optimize the choice of inductor. The
current mode control allows a simple RC compensation.
The switching frequency of the converters can either be set with an external resistor
connected to ROSC pin or can be synchronized to an external clock connected to SYNC pin if
needed. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. 180° out
of phase operation between Buck 1 and Buck 2, 3 (Buck 2 and 3 run in phase) minimizes the
input filter requirements.
TPS65251 features a supervisor circuit that monitors each converter output. The PGOOD
pin is asserted once sequencing is done, all PG signals are reported and a selectable end of
reset time lapses. The polarity of the PGOOD signal is active high.
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