DOWNLOAD Sharp LC-42LD266K (serv.man3) Service Manual ↓ Size: 6.94 MB | Pages: 108 in PDF or view online for FREE

  Register.           2176  

  8 

  Page size          2176 bytes 
  Block size         (128K 8K) bytes 

‡  Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy   
‡ Mode control 
    Serial input/output Command control   
‡ Number of valid blocks  

Min 1004 blocks Max 1024 blocks 

Ʉġ

‡  Power supply    VCC = 2.7V to 3.6V   
‡  Access time Cell array to register 25s max Serial Read Cycle 25 ns min (CL=50pF)   
‡ Program/Erase time  

  Auto Page Program 300s/page typ.    Auto Block Erase 2.5 ms/block typ.   

‡ Operating current 
    Read (25 ns cycle) 30 mA max.   
    Program (avg.) 30 mA max   
  Erase (avg.) 30 mA max  
    Standby 50A max   
‡  Package TSOP I 48-P-1220-0.50 (Weight: 0.53 g typ.)   

‡ 

8 bit ECC for each 512Byte is required.

     

7.4.  U414 (74HC4052PW)  

General Description   

The 74HC4052 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4052B. The device is specified in 
compliance with JEDEC standard no. 7A. The 74HC4052 is a dual 4-channel analog multiplexer/demultiplexer with common 
select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The 
common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When 
pin E = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0 and S1. When pin E = HIGH, all 
switches are in the high-impedance OFF-state, independent of pins S0 and S1. VCC and GND are the supply voltage pins for 
the digital control inputs (pins S0, S1 and E). The VCC to GND ranges are 2.0 V to 10.0 V for the 74HC4052.The analog 
inputs/outputs (pins nY0 to nY3 and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC 

í VEE 

may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).   

 
Features   

     Wide analog input voltage range from 

í5 V to +5 V   

    Low ON resistance:   
   

Ʉ80  ȟ (typical) at VCC 

í VEE = 4.5 V   

Ʉ70  ȟ (typical) at VCC 

í VEE = 6.0 V   

Ʉ60  ȟ (typical) at VCC 

í VEE = 9.0 V   

     Logic level translation: to enable 5 V logic to communicate with 

Ʋ5 V analog signals   

     Typical ‘break before make’ built-in   
    Complies with JEDEC standard no. 7A   
    ESD protection:   
   

ɄHBM JESD22-A114F exceeds 2000 V   

ġ ġ ɄMM JESD22-A115-A exceeds 200 V   
     Specified from 

í40  ƱC to +85  ƱC and í40  ƱC to +125  ƱC  

Applications   

     Analog multiplexing and demultiplexing   
     Digital multiplexing and demultiplexing   
     Signal gating   

 
 

7.5.  U601 (TAS5721)  
 

General Description   

The TAS5721 is an efficient, digital-input audio amplifier for driving 2.0 speaker systems configured as a bridge tied load (BTL), 
2.1 systems with two satellite speakers and one subwoofer, or in PBTL systems driving a single speaker configured as a parallel 
bridge tied load (PBTL). One serial data input allows processing of up to two discrete audio channels and seamless integration 
to most digital audio processors and MPEG decoders. The device accepts a wide range of input data formats and sample rates. 
A fully programmable data path routes these channels to the internal speaker drivers.   

The TAS5721 is a slave-only device, receiving all clocks from external sources. The TAS5721 operates with a PWM carrier 
frequency between a 384-kHz switching rate and a 288-KHz switching rate, depending on the input sample rate. Oversampling, 
combined with a fourth-order noise shaper, provides a flat noise floor and excellent dynamic range from 20 Hz to 20 kHz.   
An integrated ground centered DirectPath™ combination headphone amplifier and 2VRMS line driver is integrated in the 
TAS5721.  

 

Features   

– 10 W x 2 into 8 

ȟ  With PVDD = 24 V   

– Supports 2.0.   

– Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I

2

S)  

–  Headphone Amplifier and 2 VRMS Line Driver   

  

– Independent Channel Volume Controls With 24-dB to Mute in 0.5 dB Steps   
– Separate Dynamic Range Control for Satellite and Sub Channels   
– 21 Programmable Biquads for Speaker EQ   
– Programmable Two-Band Dynamic Range Control   
– Support for 3D Effects   

  

– I

2

!" ! # !$%  

– Configurable I

2

C Address (0x34 or 0x36)   

– Automatic Sample Rate Detection   
– Thermal and Short-Circuit    Protection   
– Wide PVDD Supply Range (4.5 V to 24 V)   
 

Applications 

 $'$!*;<" >< ? " <!" ?  

    Output Power vs. PVDD in 2.0 Mode 

   

General Description   

The SSC9522S is a controller IC (SMZ method) for half-bridge resonant type power supply, incorporating a floating drive circuit 
for High-side MOSFET drive. 
ɈSMZ = Soft-switched Multi-resonant Zero Current switch. 
All switching periods work with soft switching operation.   
The IC is in SOP18 package, and suitable for high performance power supply system with small size, high efficiency and low 
noise, because for various power supply specifications, more effective and easier design works are achievable with effective 
functions as the Automatic Dead Time Adjustment, the Uncontrollable Operation Detection and so on.   
ɈUncontrollable Operation Detection = there are two areas in resonant circuit impedance; capacitance area and inductance 
area. The Uncontrollable Operation occurs in capacitance area (the frequency is lower than the resonant frequency, fO), the 
output voltage can not be controlled and the switching operation becomes hard switching. 
   
Features   

  SOP18 package  

    Built-in floating drive circuit for High-side MOSFET   

   Soft Start Function, reducing of power MOSFET stress and preventing Uncontrollable Operation, at startup   

    Uncontrollable Operation Detection Function on pulse-by-pulse basis, improving the ability of transformer output wattage   

    because the frequency range is available up to the resonant frequency, fO, and reducing power MOSFET stress   

   Automatic Dead Time Adjustment Function, not being necessary to make the dead time adjustment for each power supply   
  specification  
  Protection Functions  
-    Line Undervoltage Protection Function-(Brown-In

炾Brown-Out Function)------------------Prevention of excessive input current 

      and overheat at low input voltage   

-    External Latch Function--------------------------------------Latch shutdown by external signal input   

-    Overcurrent Protection Function (OCP) ------------------Three steps protection corresponding to overcurrent levels   

-    Overvoltage Protection Function (OVP)------------------Latch shutdown   

-    Overload Protection Function (OLP) ----------------------Latch shutdown   

 

8.1  U401 (MT5561JUDT)  &  (MT5561PUDT only for LC-50LD266 )