Sharp LC-39LE651K Handy Guide ▷ View online
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Major IC Information…cont
October 2013
Low-Power Features (PIC16LF1503):
Standby Current:
Standby Current:
o 20 nA @ 1.8V, typical.
Watchdog Timer Current:
o 300 nA @ 1.8V, typical
Operating Current:
o 30 uA/MHz @ 1.8V, typical
Peripheral Features:
Analog-to-Digital Converter (ADC):
Analog-to-Digital Converter (ADC):
o 10-bit resolution.
o 8 external channels.
o 2 internal channels:
Fixed Voltage Reference and DAC channels.
Temperature Indicator channel.
o Auto acquisition capability.
o Conversion available during Sleep.
2 Comparators:
o Rail-to-rail inputs.
o Power mode control.
o Software controllable hysteresis.
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Major IC Information…cont
October 2013
Voltage Reference module:
o Fixed Voltage Reference (FVR) with 1.024V, 2.048V and 4.096V output levels.
o 1 rail-to-rail resistive 5-bit DAC with positive reference selection.
12 I/O Pins (1 Input-only Pin):
o High current sink/source 25 mA/25 mA.
o Individually programmable weak pull-ups.
o Individually programmable interrupt-on-change (IOC) pins.
Timer0: 8-Bit Timer/Counter with 8-Bit Programmable Prescaler.
Enhanced Timer1:
Enhanced Timer1:
o 16-bit timer/counter with prescaler.
o External Gate Input mode.
Timer2: 8-Bit Timer/Counter with 8-Bit Period Register, Prescaler and Postscaler.
Four 10-bit PWM modules.
Master Synchronous Serial Port (MSSP) with SPI and I2C™ with:
Four 10-bit PWM modules.
Master Synchronous Serial Port (MSSP) with SPI and I2C™ with:
o 7-bit address masking.
o SMBus/PMBus™ compatibility.
2 Configurable Logic Cell (CLC) modules:
o 16 selectable input source signals.
o Four inputs per module.
o Software control of combinational/sequential logic/state/clock functions.
o AND/OR/XOR/D Flop/D Latch/SR/JK.
o External or internal inputs/outputs.
o Operation while in Sleep.
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Block Diagrams
Major IC Information…cont
October 2013
Numerically Controlled Oscillator (NCO):
o 20-bit accumulator.
o 16-bit increment.
o True linear frequency control.
o High-speed clock input.
Selectable Output modes:
o Fixed Duty Cycle (FDC).
o Pulse Frequency Mode (PFM).
Complementary Waveform Generator (CWG):
o 8 selectable signal sources.
o Selectable falling and rising edge
dead-band control.
o Polarity control.
o 4 auto-shutdown sources.
o
Multiple input sources: PWM, CLC, NCO.
Issued by:
CE After Sales Service
CE After Sales Service
Block Diagrams
Main Unit Voltage Diagram
October 2013
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