Sharp LC-32GA6E (serv.man2) Service Manual ▷ View online
73
LC-26GA5E
LC-32GA5E
LC-32GA5E
LC-26GA6E
LC-32GA6E
LC-37GA6E
4.3. Description of Pins IC2201, continued
DER0
98
OSR
DEPort Red Pixel Data. In dual pixel output mode these pins are the EVEN
red outputs.
red outputs.
DER1
97
OSR
DER2
94
OSR
DER3
93
OSR
DER4
92
OSR
DER5
91
OSR
DER6
90
OSR
DER7
89
OSR
DEG0
88
OSR
DEPort Green Pixel Data. In dual pixel output mode these pins are the
EVEN green outputs.
EVEN green outputs.
DEG1
87
OSR
DEG2
86
OSR
DEG3
85
OSR
DEG4
82
OSR
DEG5
81
OSR
DEG6
80
OSR
DEG7
79
OSR
DEB0
78
OSR
DEPort Blue Pixel Data. In dual pixel output mode these pins are the EVEN
blue outputs.
blue outputs.
DEB1
77
OSR
DEB2
74
OSR
DEB3
73
OSR
DEB4
71
OSR
DEB5
70
OSR
DEB6
67
OSR
DEB7
66
OSR
Table 2-2 Display/Even Port Pin Descriptions (continued)
Name
Pin(s)
Type
Function
CONFIDENTIAL
74
LC-26GA5E
LC-32GA5E
LC-32GA5E
LC-26GA6E
LC-32GA6E
LC-37GA6E
LC-32GA6E
LC-37GA6E
Table 2-4
provides detailed Display/Odd Port pin descriptions.
Table 2-3 Port D Pin Descriptions
Name
Pin(s)
Type
Function
VCLK
72
I/O D5
DVPort Pixel Clock. The VCLK pin is used for DV port image capture.
The polarity can be selected by the VCLKPOL bit.
The polarity can be selected by the VCLKPOL bit.
VPEN
55
I/O D5
DVPort Pixel Enable. Used when external flow control capture mode is
enabled by the EXTFCE bit. When VPEN is active, the input data is valid.
The polarity can be selected by the PENPOL bit. Use of this pin allows
non-contiguous input data.
enabled by the EXTFCE bit. When VPEN is active, the input data is valid.
The polarity can be selected by the PENPOL bit. Use of this pin allows
non-contiguous input data.
PORTD0
63
I/O D5
PORTD(7:0) can be used as GPO (Output Only).
PORTD1
62
I/O D5
PORTD2
61
I/O D5
PORTD3
60
I/O D5
PORTD4
59
I/O D5
PORTD5
58
I/O D5
PORTD6
57
I/O D5
PORTD7
56
I/O D5
Table 2-4 Display/Odd Port Pin Descriptions
Name
Pin(s)
Type
Function
DOR0
131
I/O SR5
DOPort Red Pixel Data. In dual pixel output mode these pins are the ODD
red outputs. In single pixel output mode these pins are not used.
red outputs. In single pixel output mode these pins are not used.
DOR1
130
I/O SR5
DOR2
129
I/O SR5
DOR3
128
I/O SR5
DOR4
127
I/O SR5
DOR5
126
I/O SR5
DOR6
125
I/O SR5
DOR7
124
I/O SR5
4.3. Description of Pins IC2201, continued
CONFIDENTIAL
75
LC-26GA5E
LC-32GA5E
LC-32GA5E
LC-26GA6E
LC-32GA6E
LC-37GA6E
Table 2-5
provides detailed Microprocessor Interface pin descriptions.
DOG0
121
I/O SR5
DOPort Green Pixel Data. In dual pixel output mode these pins are the
ODD green outputs. In single pixel output mode these pins are not used.
ODD green outputs. In single pixel output mode these pins are not used.
DOG1
120
I/O SR5
DOG2
119
I/O SR5
DOG3
118
I/O SR5
DOG4
117
I/O SR5
DOG5
116
I/O SR5
DOG6
115
I/O SR5
DOG7
114
I/O SR5
DOB0
113
I/O SR5
DOPort Blue Pixel Data. In dual pixel output mode these pins are the ODD
blue outputs. In single pixel output mode these pins are not used.
blue outputs. In single pixel output mode these pins are not used.
DOB1
112
I/O SR5
DOB2
111
I/O SR5
DOB3
110
I/O SR5
DOB4
109
I/O SR5
DOB5
108
I/O SR5
DOB6
100
I/O SR5
DOB7
99
I/O SR5
Table 2-5 Microprocessor Interface Pin Descriptions
Name
Pin(s)
Type
Function
WR
195
I/O D5
Write Enable. Low indicates a write to external RAM or other devices.
RD
196
I/O D5
Read Enable. Low indicates a read to external RAM or other devices.
ROMOE
197
OS
ROM Output Enable. Low output indicates a read from external ROM.
ROMWE
198
OS
ROM Write Enable. Low indicates a write to external ROM.
CS0
199
I/O D5
Miscellaneous Chip Select 0. Low selects external devices.
CS1
200
I/O D5
Miscellaneous Chip Select 1. When EXTRAMEN=0, low selects external
devices.
Chip select for external RAM. When EXTRAMEN=1, low selects external
RAM. (RAMCS)
devices.
Chip select for external RAM. When EXTRAMEN=1, low selects external
RAM. (RAMCS)
NMI
194
ID 5
Non-Maskable Interrupt. A high input triggers a non-maskable interrupt to
the on-chip microprocessor.
the on-chip microprocessor.
Table 2-4 Display/Odd Port Pin Descriptions (continued)
Name
Pin(s)
Type
Function
4.3. Description of Pins IC2201, continued
CONFIDENTIAL
76
LC-26GA5E
LC-32GA5E
LC-32GA5E
LC-26GA6E
LC-32GA6E
LC-37GA6E
LC-32GA6E
LC-37GA6E
A1
193
I/O D5
Microprocessor address bus output bits (19:1).
A2
192
I/O D5
A3
191
I/O D5
A4
190
I/O D5
A5
189
I/O D5
A6
188
I/O D5
A7
183
I/O D5
A8
182
I/O D5
A9
181
I/O D5
A10
180
I/O D5
A11
179
I/O D5
A12
178
I/O D5
A13
177
I/O D5
A14
176
I/O D5
A15
175
I/O D5
A16
164
I/O D5
A17
163
I/O D5
A18
162
I/O D5
A19
161
I/O D5
D0
160
I/O D5
Microprocessor 16-bit bidirectional data bus.
D1
159
I/O D5
D2
158
I/O D5
D3
157
I/O D5
D4
156
I/O D5
D5
155
I/O D5
D6
154
I/O D5
D7
153
I/O D5
D8
152
I/O D5
D9
151
I/O D5
D10
150
I/O D5
D11
149
I/O D5
D12
148
I/O D5
D13
145
I/O D5
D14
144
I/O D5
D15
143
I/O D5
Table 2-5 Microprocessor Interface Pin Descriptions (continued)
Name
Pin(s)
Type
Function
4.3. Description of Pins IC2201, continued
CONFIDENTIAL
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