Sharp LC-26SB25E Service Manual ▷ View online
2008-03-14
LC-26SB25E/S/RU, LC-32SB25E/S/RU, LC-42SB55E/S/RU
53
CHAPTER 5.
MAJOR IC INFORMATIONS
[1] MAJOR IC INFORMATIONS
1. MAJOR IC INFORMATIONS
1.1. U400 (MT5337PKR PBGA-465)
Notes: The function of MT5337PKR is same as the function of MT5336PKR except the below 2 items:
1). The MT5337PKR support de-blocking filter, but MT5336PKR has not this function.
2). The MT5337PKR supports up to 1920x1080 panel and VGA dot-to-dot. The MT5336PKR supports up to 1680x1050 panel and
VGA dot-to-dot.
Notes: The function of MT5337PKR is same as the function of MT5336PKR except the below 2 items:
1). The MT5337PKR support de-blocking filter, but MT5336PKR has not this function.
2). The MT5337PKR supports up to 1920x1080 panel and VGA dot-to-dot. The MT5336PKR supports up to 1680x1050 panel and
VGA dot-to-dot.
GENERAL DESCRIPTION
The
MediaTek MT5337PKR
family consists of a backend decoder and a TV controller and offers high integration for advanced applications. It combines a
transport de-multiplexer, a high definition MPEG-2 video decoder, an MPEG2 audio decoder, an LVDS transmitter, and an NTSC/PAL/SECAM TV
decoder with a 3D comb filter. The MT5337PKR enables consumer electronics manufactures to build high quality, low cost and feature-rich iDTVs.
decoder with a 3D comb filter. The MT5337PKR enables consumer electronics manufactures to build high quality, low cost and feature-rich iDTVs.
World-Leading Audio/Video Technology
:
The MT5337PKR family has built-in high resolution and high-quality audio codec. It includes MediaTek
MDDi
TM
de-interlace solution to generate very smooth picture quality for motions. A 3D comb filter added to the TV decoder recovers great detail for still
pictures. The special color processing technology provides natural, deep colors and true studio quality graphics.
Rich Features for High Value Products
:
The MT5337PKR family enables a true single-chip experience. It integrates high-quality HDMI1.3, high speed
VGA ADC, dual-channel LVDS, and USB2.0 receiver.
Reliable Front-end Receiving Capability
:
Excellent adjacent and co-channel rejection capability grants customers never miss any wonderful stream.
Professional error-concealment provides stable, smooth and mosaic-free video quality.
FEATURES
□
□
Host CPU
·
·
ARM 926EJS
·
8K I-Cache and 8K D-Cache
·
4K Instruction TCM
·
JTAG ICE interface
·
Watch Dog timers
□
Transport Demultiplexer
·
·
Supports a serial or parallel transport stream input
·
Supports DVB-T, MPEG-2 transport stream input
·
Supports DES/3-DES/DVB de-scramblers
·
Up to 8-PID even/odd keys for descrambling
·
Supports 32 PID filters and 32 section filters
·
Supports positive/negative/mask section filtering
·
Supports hardware CRC-32 check
·
Supports PCR recovery function
·
Supports a micro-processor for stream process and MPEG start code detection
□
MPEG2 Decoder
·
·
Supports one MPEG-2 HD decoder
·
MPEG MP@ML, MP@HL and MPEG-1 video standards
·
The MT5337PKR support de-blocking filter
□
2D Graphics
·
·
Supports multiple color modes
·
Point, horizontal/vertical line primitive drawings
·
Rectangle fill and gradient fill functions
·
Bitblt with transparent options
·
Alpha blending and alpha composition Bitblt
·
Stretch Bitblt
·
Font rendering by color expansion
·
YCbCr to RGB color space conversion
·
Supports off-line scaler
□
OSD Plane
·
·
Two linking list OSDs with multiple color mode and one of them has scaler
□
Video Plane
·
·
Supports video capture and over scan.
·
Flesh tone management
·
Gamma/anti-Gamma correction
·
Color Transient Improvement (CTI)
·
2D Peaking
·
Saturation/hue adjustment
·
Brightness and contrast adjustment
·
Black and White level extender
LC-26SB25E/S/RU, LC-32SB25E/S/RU, LC-42SB55E/S/RU
54
·
Adaptive Luma/Chroma management
·
Automatic detect film or video source
·
3:2/2:2 pull down source detection
·
The MT5337PKR supports maximum 1920 width motion-adaptive de-interlace and supports excellent low angle image processing.
·
Arbitrary ratio vertical/horizontal scaling of video, from 1/32X to 32X
·
Advanced non-linear panorama scaling.
·
Programmable zoom viewer
·
Progressive or interlace scan output
·
Supports alpha blending
·
Dithering processing for flat panel display
·
Frame rate conversion.
·
The MT5337PKR supports up to 1920x1080 panel and VGA dot-to-dot.
·
Support 2 video source PIP/POP feature.
□
LVDS
·
·
MT5337PKR supports 6/8/10-bit dual–channel , LVDS speeding up to 75 MHz
·
Built-in spread spectrum for EMI performance
·
Programmable panel timing output
□
CVBS In
·
·
On-chip 54 MHz 10-bit video ADC
·
Supports PAL (B,G,D,H,M,N,I,Nc), NTSC, NTSC-4.43, SECAM
·
Macrovision detection
·
NTSC/PAL support 3D comb filter, SECAM supports 2D comb filter
·
Built-in motion-adaptive 3D Noise Reduction
·
VBI data slicer for CC/TT decoding
·
Supports 2-S-Video.
·
The MT5337PKR support 4-channel CVBS.
·
Supports SCART connector
□
VGA In
·
·
Supports VGA input up to UXGA 162 MHz
·
Supports full VESA standards
□
Component Video In
·
·
Supports two component video inputs
·
Supports 480i / 480p / 576i / 576p / 720p / 1080i / 1080p
□
Audio line in interface
·
·
The MT5337PKR support 1-bit line in data (two channels)
□
HDMI Receiver
·
·
Mixed 3 channels of HDMI1.3, data rate can be up to 2.25 GHz
·
EIA/CEA-861B
·
CEC
□
Audio ADC
·
·
The MT5337PKR support 14-channel (7 R/L pairs) analog audio input.
□
TV audio demodulator
·
·
Supports BTSC/EIA-J/A2/NICAM/PAL FM/SECAM world-wide formats
·
Standard automatic detection
·
Stereo demodulation, SAP demodulation
·
Mode selection (Main/SAP/Stereo)
□
Audio DAC
·
·
Four on-chip audio DACs (2 R/L pairs) support R/L channel and subwoofer outputs
□
DRAM Controller
·
·
Supports 64 Mb to 512 Mb DDR DRAM devices
·
The MT5337PKR support configurable 16/32-bit data bus interface. The 16-bit address offers up to 64 M bytes space. The 32-bit address offers up to
128 M bytes space.
·
Supports DDR1-333, DDR1-400, DDR2-400, DDR2-533, DDR2-667, DDR2-800
□
Audio DSP
·
·
Supports Dolby Digital AC-3 decoding
·
MPEG-1 layer I/II decoding (DVB)
·
Dolby Prologic II
·
Audio output: 7.1ch + 2ch (down mix)
·
Pink noise and white noise generator
·
Equalizer
·
Bass management
·
3D surround processing with virtual surround
·
Audio and video lip synchronization
·
Supports reverberation
·
Automatic volume control
·
One SPDIF out
2008-03-14
LC-26SB25E/S/RU, LC-32SB25E/S/RU, LC-42SB55E/S/RU
55
·
If internal audio DAC is disabled, the MT5337PKR will support 5-bit (10-channel) main audio I2S output interface. Each channel is up to 24-bit
resolution.
·
If internal audio DAC is disabled, the MT5337PKR family supports 1-bit (2-channel) aux audio I2S output I/F. Each channel is up to 24-bit resolution.
□
Flash Interface
·
·
The MT5337PKR supports two configurations for the flash interface: 1. two serial flashes, or 2. one serial flash and one 8-bit NAND flash (not
OneNAND flash).
·
The MT5337PKR supports booting from either one serial flash or NAND flash which can be selected by the settings of strapping at power-on.
·
Serial flash interface supports up to 60 MHz clock rate, depending on the spec. of the flash device (currently 20 MHz at maximum)
·
NAND flash interface supports 17 Mbytes/sec
·
Supports on-the-fly decompression from Serial Flash to DRAM or from NAND Flash to DRAM.
□
Peripherals
·
·
Each of the MT5337PKR has two built-in UARTs with Tx and Rx FIFO, one of them has hardware flow control and high speed data transferring.
·
The MT5337PKR has five serial interfaces; one is for the tuner, one is the master for general purpose, the other three are the slaves for three HDMI
EDID data.
·
Three PWMs
·
IR blaster and receiver
·
Real-time clock and watchdog controller
·
1-port USB2.0/1.1 host supports USB mass storage class devices.
·
Supports five-channel servo ADC.
·
If NAND flash is not enabled, the MT5337PKR supports xD/SM, MS/MS-PRO, SD/MMC, and SDHC card reader.
□
IC Outline
·
·
The MT5337PKR is 465-pin BGA Package
·
3.3V/1.1V and 2.5V for DDR1, 1.8V for DDR2
□
System Software
·
·
MHEG-5 is supported
1.2. U102 (LP2996MRX PSOP-8)
General Description
The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed
operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current
and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2996 also incorporates a V
The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed
operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current
and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2996 also incorporates a V
SENSE
pin to provide superior
load regulation and a V
REF
output as a reference for the chipset and DIMMs. An additional feature found on the LP2996 is an active low shutdown (SD) pin
that provides Suspend To RAM (STR) functionality. When SD is pulled low the V
TT
output will tri-state providing a high impedance output, but, V
REF
will
remain active. A power savings advantage can be obtained in this mode through lower quiescent current.
Features
·
·
Source and sink current
·
Low output voltage offset
·
No external resistors required
·
Linear topology
·
Suspend to Ram (STR) functionality
·
Low external component count
·
Thermal Shutdown
·
Available in SO-8, PSOP-8 or LLP-16 packages
Applications
·
·
DDR-I and DDR-II Termination Voltage
·
SSTL-2 and SSTL-3 Termination
·
HSTL Termination
1.3. U104 (L5985 VFQFPN8)
Description
The L5985 is a step down switching regulator with 2.5A current limited embedded power MOSFET, so it is able to deliver up to 2A DC current to the load
depending on the application condition.
The input voltage can range from 2.9V to 18V, while the output voltage can be set starting from 0.6V to V
The L5985 is a step down switching regulator with 2.5A current limited embedded power MOSFET, so it is able to deliver up to 2A DC current to the load
depending on the application condition.
The input voltage can range from 2.9V to 18V, while the output voltage can be set starting from 0.6V to V
IN
. Having a minimum input voltage of 2.9V, the
device is suitable for buses staring from for 3.3V bus.
Requiring a minimum set of external components, the device includes an internal 250KHz switching frequency oscillator that can be externally adjusted up
to 1MHz.
The QFN package with exposed pad allows reducing the R
Requiring a minimum set of external components, the device includes an internal 250KHz switching frequency oscillator that can be externally adjusted up
to 1MHz.
The QFN package with exposed pad allows reducing the R
thJA
down to approximately 60°C/W.
Features
·
·
2A DC output current
·
2.9V to 18V input voltage
·
Output voltage adjustable from 0.6V
·
250KHz switching frequency, programmable up to 1MHz
·
Internal Soft-start and Inhibit
·
Low dropout operation: 100% duty cycle
·
Voltage feed-forward
·
Zero load current operation
LC-26SB25E/S/RU, LC-32SB25E/S/RU, LC-42SB55E/S/RU
56
·
Over current and thermal protection
·
VQFN3x3-8L package
Applications
·
·
Consumer:
STB, DVD, DVD recorder, car audio, LCD TV and monitors
·
·
Industrial:
Chargers, car battery, PLD, PLA, FPGA
·
·
Networking: XDSL, modems, DC-DC modules
·
Computer:
Optical storage, hard disk drive, printers, audio/graphic cards
1.4. U351 (HYB18TC256160BF-3S TFBGA-84-55)
Features
The 256-Mbit Double-Data-Rate-Two SDRAM offers the following key features:
·
The 256-Mbit Double-Data-Rate-Two SDRAM offers the following key features:
·
1.8 V ± 0.1 V Power Supply
·
1.8 V ± 0.1 V (SSTL_18) compatible I/O
·
DRAM organizations with 4, 8 and 16 data in/outputs
·
Double Data Rate architecture: two data transfers per clock cycle four internal banks for concurrent operation
·
Programmable CAS Latency: 3, 4, 5 and 6
·
Programmable Burst Length: 4 and 8
·
Differential clock inputs (CK and CK)
·
Bi-directional, differential data strobes (DQS and DQS) are transmitted / received with data. Edge aligned with read data and center-aligned with write
data.
·
·
DLL aligns DQ and DQS transitions with clock
·
DQS can be disabled for single-ended data strobe operation
·
Commands entered on each positive clock edge, data and data mask are referenced to both edges of DQS
·
Data masks (DM) for write data
·
Posted CAS by programmable additive latency for better command and data bus efficiency
·
Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality.
·
Auto-Precharge operation for read and write bursts
·
Auto-Refresh, Self-Refresh and power saving Power-Down modes
·
Average Refresh Period 7.8 µs at a T
CASE
lower than 85 °C, 3.9 µs between 85 °C and 95 °C
·
Programmable self refresh rate via EMRS2 setting
·
Programmable partial array refresh via EMRS2 settings
·
DCC enabling via EMRS2 setting
·
Full and reduced Strength Data-Output Drivers
·
1K page size
·
Packages: PG-TFBGA-84
·
RoHS Compliant Products
1
)
·
All Speed grades faster than DDR400 comply with DDR400 timing specifications when run at a clock rate of 200 MHz.
1.5. U601 (LM4809MA NOPB SO-8)
General Description
The LM4809 is a dual audio power amplifier capable of delivering 105mW per channel of continuous average power into a 16Ω load with 0.1% (THD+N)
from a 5V power supply.
Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. Since the
LM4809 does not require bootstrap capacitors or snubber networks, it is optimally suited for low-power portable systems.
The unity-gain stable LM4809 can be configured by external gain-setting resistors.
The LM4809 features an externally controlled, active-low, micropower consumption shutdown mode, as well as an internal thermal shutdown protection
mechanism.
The LM4809 is a dual audio power amplifier capable of delivering 105mW per channel of continuous average power into a 16Ω load with 0.1% (THD+N)
from a 5V power supply.
Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. Since the
LM4809 does not require bootstrap capacitors or snubber networks, it is optimally suited for low-power portable systems.
The unity-gain stable LM4809 can be configured by external gain-setting resistors.
The LM4809 features an externally controlled, active-low, micropower consumption shutdown mode, as well as an internal thermal shutdown protection
mechanism.
Key Specifications
·
·
THD+N at 1kHz at 105mW continuous average power into 16Ω 0.1% (typ)
·
THD+N at 1kHz at 70mW continuous average power into 32Ω 0.1% (typ)
·
Shutdown Current 0.4µA (typ)
Features
·
·
Active-low shutdown mode
·
"Click and Pop" reduction circuitry
·
Low shutdown current
·
LLP, MSOP, and SO surface mount packaging
·
No bootstrap capacitors required
·
Unity-gain stable
Applications
·
·
Headphone Amplifier
·
Personal Computers
·
Microphone Preamplifier
·
PDA’s
Click on the first or last page to see other LC-26SB25E service manuals if exist.