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o Dynamic Vivid Skin

o Dynamic sharpened Luma/Chroma edges

o Global and local dynamic depth of field perception

o Accurate and independent color control

o Supports sRGB and xvYCC color processing

o Supports HDMI 1.3 deep color format

o Programmable 12-bit RGB gamma CLUT

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Single/dual link 8/10-bit LVDS output

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Supports panel resolution up to Full-HD (1920x1080) @ 60Hz

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Supports TH/TI format

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Supports dithering options to 6/8-bit output

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Spread spectrum output for EMI suppression

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Supports all NTSC/PAL TV Standard

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Stand-alone scaling engine

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Programmable Hue, Contract, Brightness

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Supports TTX/CC/WSS output

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Allows CVBS output of all source inputs

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Hardware Graphics Engine for responsive interactive applications

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Supports point draw, line draw, rectangle draw/fill, text draw and trapezoid draw

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BitBlt, stretch BitBlt, trapezoid BitBlt, mirror BitBlt and rotate BitBlt

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Raster Operation (ROP)

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Support Porter-Duff

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Compliant with NTSC M/N, PAL B, G/H, I, D/K, SECAM L/L' standards

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Audio/Video dual-path processor

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Stepped-gain PGA with 25 dB tuning range and 1 dB tuning resolution

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Maximum IF gain of 37 dB

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Programmable TOP to accommodate different tuner gain and SAW filter insertion loss to 

optimize noise and linearity performance

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Multi-standard processing with single SAW

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Supports silicon tuner low IF output architecture

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Digital carrier frequency offset correction: ±500KHz

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Optimized for SFN channels with pre/post-cursive echoes inside/outside the guard

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Acquisition range ±857kHz includes up to 3x: ±1/6 MHz transmitter offset

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Meets Nordig Unified 1.0.3, D-Book 5.0, EICTA E-Book/C-Book test requirement

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ITU J.83 Annex A/C, DVB-C (EN 300 429) compliant

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Supports DVB-C 0.7-7M Baud symbol rate

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±400kHz internal carrier offset recovery range

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6.8 μsecs echo cancellation at 7 Msym/s

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Supports IF, low-IF, zero-IF inputs

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Ultra-fast automatic blind UHF/VHF channel scan (constellations and symbol rate)

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Two USB 2.0 host ports

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USB architecture designed for efficient suppor of external storage devices in conjunction 

with off air broadcasting

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DRAM interface supporting two 16-bit DDR2 @ 1066MHz

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Supports PVR

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Supports Common Interface for conditional access support

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Bootable SPI interface with serial flash support

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Parallel interface for external OneNAND and NAND flash support

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Power control module with ultra low power

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MCU available in standby mode

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523-ball LFBGA package

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Operating Voltages: 1.26V (core), 1.8V (DDR2), 2.5V and 3.3V (I/O and analog)

Reset circuit using for initializing main MStar IC. Reset condition is high and normal working condition is low 

for RESET pin.

It is used for CI module supply, when Module is inserted (it means CI detect is low) This circuit is opened or 
closed by CI_POWER_CTRL port of main μController