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The DC voltages required at various parts of the chassis are provided by an SMPS transformer 
controlled by the IC MC44608, which is designed for driving, controlling and protecting switching 

transistor

  of  SMPS. The  transformer  generates  145V for Horizontal output stage, +/-14V for audio 

amplifier, 5V and 3.3V stand by voltage and 8V, 12V and 5V supplies for other different parts of the chassis. 

An optocoupler is used to control the regulation of line voltage and stand-by power consumption. There 
is a regulation circuit in secondary side. This circuit produces a control voltage according to the 
changes in 145V DC voltage, via an optocoupler (TCET1102G) to pin3 of the IC. 
During the switch on period of the transistor, energy is stored in the transformer. During the switch off 
period energy is fed to the load via secondary winding. By varying switch-on time of the power 
transistor, it 

 controls  each  portion  of  energy  transferred  to the secondary side such that the output 

voltage level remains nearly independent of load variations.  
 

10.1.General Features 
• Feature selection via special function register 
• Simultaneous reception of TTX, VPS, PDC, and WSS (line 23) 
• Supply Voltage 2.5 and 3.3 V 
• ROM version package PSDIP52-2, PMQFP64-1 
• Romless version package PMQFP100-2, PLCC84-2 
 
10.2.External Crystal and Programmable Clock Speed 
• Single external 6MHz crystal, all necessary clocks are generated internally 
• CPU clock speed selectable via special function registers. 
• Normal Mode 33.33 MHz CPU clock, Power Save mode 8.33 MHz 
 
10.3.Microcontroller Features 
• 8bit 8051 instruction set compatible CPU. 
• 33.33-MHz internal clock (max.) 
• 0.360 ms (min.) instruction cycle 
• Two 16-bit timers 
• Watchdog timer 
• Capture compare timer for infrared remote control decoding 
• Pulse width modulation unit (2 channels 14 bit, 6 channels 8 bit) 
• ADC (4 channels, 8 bit) 
• UART (rxd, txd) 
 
10.4.Memory 
• Non-multiplexed 8-bit data and 16 … 20-bit address bus (ROMless Version) 
• Memory banking up to 1Mbyte (Romless version) 
• Up to 128 Kilobyte on Chip Program ROM 
• Eight 16-bit data pointer registers (DPTR) 
• 256-bytes on-chip Processor Internal RAM (IRAM) 
• 128bytes extended stack memory. 
• Display RAM and TXT/VPS/PDC/WSS-Acquisition-Buffer directly accessible via MOVX 
• UP to 16KByte on Chip Extended RAM (XRAM) consisting of; 
- 1 Kilobyte on-chip ACQ-buffer-RAM (access via MOVX) 
- 1 Kilobyte on-chip extended-RAM (XRAM, access via MOVX) for user software 
- 3 Kilobyte Display Memory 
 
10.5.Display Features 
• ROM Character Set Supports all East and West European Languages in single device 
• Mosaic Graphic Character Set 
• Parallel Display Attributes 
• Single/Double Width/Height of Characters 
• Variable Flash Rate 
• Programmable Screen Size (25 Rows x 33...64 Columns) 
• Flexible Character Matrixes (HxV) 12 x 9...16 
• Up to 256 Dynamical Redefinable Characters in standard mode; 1024 Dynamical Redefinable 
Characters in Enhanced Mode 
• CLUT with up to 4096 colour combinations 

• Up to 16 Colours per DRCS Character 
• One out of Eight Colours for Foreground and Background Colours for 1-bit DRCS and ROM 
Characters 
• Shadowing 
• Contrast Reduction 
• Pixel by Pixel Shiftable Cursor With up to 4 Different Colours 
• Support of Progressive Scan and 100 Hz. 
• 3 X 4Bits RGB-DACs On-Chip 
• Free Programmable Pixel Clock from 10 MHz to 32MHz 
• Pixel Clock Independent from CPU Clock 
• Multinorm H/V-Display Synchronization in Master or Slave Mode 
 
10.6.Acquisition Features 
• Multi-standard Digital Data Slicer 
• Parallel Multi-norm Slicing (TTX, VPS, WSS, CC, G+) 
• Four Different Framing Codes Available 
• Data Caption only limited by available Memory 
• Programmable VBI-buffer 
• Full Channel Data Slicing Supported 
• Fully Digital Signal Processing 
• Noise Measurement and Controlled Noise Compensation 
• Attenuation Measurement and Compensation 
• Group Delay Measurement and Compensation 
• Exact Decoding of Echo Disturbed Signals 
 
10.7.Ports 
• One 8-bit I/O-port with open drain output and optional I

2

C Bus emulation support (Port0) 

• Two 8-bit multifunction I/O-ports (Port1, Port3) 
• One 4-bit port working as digital or analogue inputs for the ADC (Port2) 
• One 2-bit I/O port with secondary function (P4.2, 4.3, 4.7) 
• One 4-bit I/O-port with secondary function (P4.0, 4.1, 4.4) (Not available in P-SDIP 52) 
 

The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package. 
The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital 
audio applications. 
 

K3953M: 

Standard 
B/G, D/K, I, L/L’

 

Features 
TV IF filter with Nyquist slopes at 33,90 MHz and 38,90 MHz 
Constant group delay 
Suitable for CENELEC EN 55020 
Terminals 
Tinned CuFe alloy 
Pin configuration 
1 Input 
2 Input - ground 
3 Chip carrier - ground 
4 Output 
5 Output 

 
K3958M: 

Standard 
B/G, D/K, I, L/L’ 
Features 
TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz 
Constant group delay 
Terminal and Pin configuration are the same with 

K3953M 

K9356M: 

Standard 
B/G, D/K, I, L 
Features 
TV IF audio filter with pass band for sound carriers at 32,40 MHz (D/K, L), 32,90 MHz (I) and 33,40 MHz 
(B/G) 
Terminal and Pin configuration are the same with 

K3953M

 

 

K9656M: 

Standard 
B/G, D/K, I, L/L’ 
Features 
TV IF audio filter with two channels 
Channel 1 (L’) with one pass band for sound carriers at 40,40 MHz (L’) and 39,75 MHz (L’- NICAM) 
Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32,35 MHz and 33,40 MHz 
Terminal and Pin configuration are the same with 

K3953M

 

 

LM317T TDA1308T 
MSP3410G VDP3130Y 
TEA6415 STV9379FA 
TDA7269A LM7805/LM7808 
24C08 SDA55XX 
MC44608 TCET1102G 
TDA9885T 
 

The LM317T is an adjustable 3 terminal positive voltage regulator capable of supplying in excess of 1.5 
amps over an output range of 1.25 to 37 volts. This voltage regulator is exceptionally easy to use and 
requires only two external resistors to set the output voltage. Further, it employs internal current limiting, 
thermal shutdown and safe area compensation, making it essentially blow–out proof. The LM317 
serves a wide variety of applications including local, on card regulation. This device can also be used to 
make a programmable output regulator, or by connecting a fixed resistor between the adjustment and 
output, the LM317 can be used as a precision current regulator. 

• Output Current in Excess of 1.5 A 
• Output Adjustable between 1.2 V and 37 V 
• Internal Thermal Overload Protection 
• Internal Short Circuit Current Limiting Constant with Temperature 
• Output Transistor Safe–Area Compensation 
• Floating Operation for High Voltage Applications 
• Available in Surface Mount D

2

PAK, and Standard 3–Lead Transistor Package 

• Eliminates Stocking many Fixed Voltages 
 

The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic 
package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for 
portable digital audio applications. It gets its input from two analog audio outputs (DACA_L and 
DACA_R) of MSP 34x0G. The gain of the output is adjustable by the feedback resistor between the 
inputs and outputs. 

• 

Wide temperature range 

• 

No switch ON/OFF clicks 

• 

Excellent power supply ripple rejection 

• Low power consumption 
• Short-circuit resistant 
• High performance 
• high signal-to-noise ratio 
• High slew rate 
• Low distortion 
• Large output voltage swing. 

 

 
SYMBOL PIN 

OUTA 1 

Output 

A 

INA(neg) 

2 

Inverting input A 

INA(pos) 

3 

Non-inverting input A 

V

SS

 4 

Negative 

supply 

INB(pos) 

5 

Non-inverting input B 

INB(neg) 

6 

Inverting input B 

OUTB 7 

Output 

B 

V

DD

 8 

Positive 

supply 

 

The MSP 34x0G family of single-chip Multi standard Sound Processors covers the sound processing of 
all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound 
processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on 
a single chip. Figure shows a simplified functional block diagram of the MSP 34x0G. 

evaluated internally with subsequent switching between mono/stereo/bilingual; no I

2

C interaction is 

necessary (Automatic Sound Selection). 

 
This new generation of TV sound processing ICs now includes versions for processing the multi 
channel television sound (MTS) signal conforming to the standard recommended by the Broadcast 
Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, MICRONAS Noise 
Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM 
multiplex standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment 
procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x0G has 
optimum stereo performance without any adjustments. 
All MSP 34x0G versions are pin and software downward compatible to the MSP34x0D. The 
MSP34x0G further simplifies controlling software. Standard selection requires a single I

2

C transmission 

only. 
The MSP 34x0G has built-in automatic functions: The IC is able to detect the actual sound standard 
automatically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be