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The TDA7269A is class AB dual Audio power amplifier assembled in the Multiwatt package, specially 
designed for high quality sound application as Hi-Fi music centers and stereo TV sets. 

Wide Supply Voltage Range Up To ±20V 
Split Supply 
High Output Power 
14 + 14W @THD =10%, R

L

 

=

ȍ,V

S

= +16V 

No Pop at Turn-On/Off 
Mute (Pop Free) 
Stand-By Feature (Low I

q

) 

Short Circuit Protection To Gnd 
Thermal Overload Protection 
 

The L7800 series of three-terminal positive regulators is available in TO-220 TO-220FP TO-3 and D 2 
PAK packages and several fixed output voltages, making it useful in a wide range of applications. 
These regulators can provide local on-card regulation, eliminating the distribution problems associated 
with single point regulation. Each type employs internal current limiting, thermal shutdown and safe 
area protection, making it essentially indestructible. If adequate heat sinking is provided, they can 
deliver over 1A output current. Although designed primarily as fixed voltage regulators, these devices 
can be used with external components to obtain adjustable voltages and currents. 

Output Current Up To 1.5 A 
Output Voltages of 5; 5.2; 6; 8; 8.5; 9; 12; 15; 18; 24V 
Thermal Over load protection 
Short Circuit Protection 
Output Transition SOA Protection 
 

The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically erasable 
and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits 
each. The device is optimized for use in many industrial and commercial applications where low-power 
and low-voltage operation are essential. The AT24C01A/02/04/08/16 is available in space-saving 8-pin 
PDIP, (AT24C01A/02/04/08/16), 8-lead TSSOP (AT24C01A/02/04/08/16) and 8-lead JEDEC SOIC 
(AT24C01A/02/04/08/16) packages and is accessed via a 2-wire serial interface. In addition, the entire 
family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 
5.5V) versions. 

• Low-voltage and Standard-voltage Operation 
– 5.0 (V CC = 4.5V to 5.5V) 
– 2.7 (V CC = 2.7V to 5.5V) 
– 2.5 (V CC = 2.5V to 5.5V) 
– 1.8 (V CC = 1.8V to 5.5V) 
• Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 
• 2-wire Serial Interface 
• Schmitt Trigger, Filtered Inputs for Noise Suppression 
• Bi-directional Data Transfer Protocol 
• 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility 
• Write Protect Pin for Hardware Data Protection 

• 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes 
• Partial Page Writes are Allowed 
• Self-timed Write Cycle (10 ms max) 
• High-reliability 
– Endurance: 1 Million Write Cycles 
– Data Retention: 100 Years 
• Automotive Grade and Extended Temperature Devices Available 
• 8-lead JEDEC SOIC, 8-pin PDIP and 8-lead TSSOP Packages 

 

A0-A2 Address 

Inputs 

SDA Serial 

Data 

SCL 

Serial Clock Input 

WP Write 

Protect 

NC No 

Connect 

 

The SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as 
Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling 
(WSS) data used for PAL plus transmissions (Line 23). The device also supports Closed caption 
acquisition and decoding. The device provides an integrated general-purpose, fully 8051-compatible 
Microcontroller with television specific hardware features. Microcontroller has been enhanced to 
provide powerful features such as memory banking, data pointers, and additional interrupts etc. The on-
chip display unit for displaying Level 1.5 teletext data can also be used for customer defined on screen 
displays. Internal XRAM consists of up to 16 Kbytes. Device has an internal ROM of up to 128 KBytes. 
ROMless versions can access up to 1 MByte of external RAM and ROM. The SDA 55XX supports a 
wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX 
and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5 
TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented 
characters (DRCS). 

General 
• Feature selection via special function register 
• Simultaneous reception of TTX, VPS, PDC, and WSS (line 23) 
• Supply Voltage 2.5 and 3.3 V 
• ROM version package PSDIP52-2, PMQFP64-1 
• Romless version package PMQFP100-2, PLCC84-2 
 
External Crystal and Programmable Clock Speed 
• Single external 6MHz crystal, all necessary clocks are generated internally 
• CPU clock speed selectable via special function registers. 
• Normal Mode 33.33 MHz CPU clock, Power Save mode 8.33 MHz 
 
Microcontroller Features 
• 8bit 8051 instruction set compatible CPU. 
• 33.33-MHz internal clock (max.) 
• 0.360ms (min.) instruction cycle 
• Two 16-bit timers 
• Watchdog timer 
• Capture compare timer for infrared remote control decoding 
• Pulse width modulation unit (2 channels 14 bit, 6 channels 8 bit) 
• ADC (4 channels, 8 bit) 
• UART 
 

Memory 
• Non-multiplexed 8-bit data and 16 … 20-bit address bus (ROMless Version) 
• Memory banking up to 1Mbyte (ROMless version) 
• Up to 128 Kilobyte on Chip Program ROM 
• Eight 16-bit data pointer registers (DPTR) 
• 256-bytes on-chip Processor Internal RAM (IRAM) 
• 128bytes extended stack memory. 
• Display RAM and TXT/VPS/PDC/WSS-Acquisition-Buffer directly accessible via MOVX 
• UP to 16KByte on Chip Extended RAM (XRAM) consisting of; 
- 1 Kilobyte on-chip ACQ-buffer-RAM (access via MOVX) 
- 1 Kilobyte on-chip extended-RAM (XRAM, access via MOVX) for user software 
- 3 Kilobyte Display Memory 
 
Display Features 
• ROM Character Set Supports all East and West European Languages in single device 
• Mosaic Graphic Character Set 
• Parallel Display Attributes 
• Single/Double Width/Height of Characters 
• Variable Flash Rate 
• Programmable Screen Size (25 Rows x 33...64 Columns) 
• Flexible Character Matrixes (HxV) 12 x 9...16 
• Up to 256 Dynamical Redefinable Characters in standard mode; 1024 Dynamical Redefinable 
Characters in Enhanced Mode 
• CLUT with up to 4096 colour combinations 
• Up to 16 Colours per DRCS Character 
• One out of Eight Colours for Foreground and Background Colours for 1-bit DRCS and ROM 
Characters 
• Shadowing 
• Contrast Reduction 
• Pixel by Pixel Shiftable Cursor With up to 4 Different Colours 
• Support of Progressive Scan and 100 Hz. 
• 3 X 4Bits RGB-DACs On-Chip 
• Free Programmable Pixel Clock from 10 MHz to 32MHz 
• Pixel Clock Independent from CPU Clock 
• Multinorm H/V-Display Synchronization in Master or Slave Mode 
 
Acquisition Features 
• Multistandard Digital Data Slicer 
• Parallel Multi-norm Slicing (TTX, VPS, WSS, CC, G+) 
• Four Different Framing Codes Available 
• Data Caption only Limited by available Memory 
• Programmable VBI-buffer 
• Full Channel Data Slicing Supported 
• Fully Digital Signal Processing 
• Noise Measurement and Controlled Noise Compensation 
• Attenuation Measurement and Compensation 
• Group Delay Measurement and Compensation 
• Exact Decoding of Echo Disturbed Signals 
 
Ports 
• One 8-bit I/O-port with open drain output and optional I

2

C Bus emulation support (Port 0) 

• Two 8-bit multifunction I/O-ports (Port 1, Port 3) 
• One 4-bit port working as digital or analog inputs for the ADC (Port 2) 
• One 2-bit I/O port with secondary functions (P4.2, 4.3, 4.7) 
• One 4-bit I/O-port with secondary function (P4.0, 4.1, 4.4) (Not available in P-SDIP 52) 
 

The MC44608 is a high performance voltage mode controller designed for off–line converters. This high 
voltage circuit that integrates the start–up current source and the oscillator capacitor, requires few 

external components while offering a high flexibility and reliability. The device also features a very high 
efficiency stand–by management consisting of an effective Pulsed Mode operation. This technique 
enables the reduction of the stand–by power consumption to approximately 1W while delivering 
300mW in a 150W SMPS. 
• Integrated Start–Up Current Source 
• Lossless Off–Line Start–Up 
• Direct Off–Line Operation 
• Fast Start–Up 

• Flexibility 
• Duty Cycle Control 
• Under voltage Lockout with Hysteresis 
• On Chip Oscillator Switching Frequency 40, or 75kHz 
• Secondary Control with Few External Components 
Protections 
• Maximum Duty Cycle Limitation 
• Cycle by Cycle Current Limitation 
• Demagnetization (Zero Current Detection) Protection 
• “Over V

CC

 Protection” Against Open Loop 

• Programmable Low Inertia Over Voltage Protection Against Open Loop 
• Internal Thermal Protection 
GreenLine

TM

 Controller 

• Pulsed Mode Techniques for a Very High Efficiency Low Power Mode 
• Lossless Start-up 
• Low dV/dT for Low EMI Radiations 

1

8

7

6

5

2

3

4

(Top View)

Demag

I

sense

Control Input

V

i

GND

V

CC

Driver

44608Pxxx

AW

L

YYWW

AWL

= Manufacturing Code

YYWW = Date Code

(Top View)

13.11.4.Pin Function description 
 

1 

Demag 

The Demag pin offers 3 different functions: Zero voltage crossing detection (50mV), 24mA current 
detection and 120mA current detection. The 24mA level is used to detect the secondary 
reconfiguration status and the 120mA level to detect an Over Voltage status called Quick OVP. 

2 

ISENSE 

The Current Sense pin senses the voltage developed on the series resistor inserted in the source 
of the power MOSFET. When I sense reaches 1V, the Driver output (pin 5) is disabled. This is 
known as the Over Current Protection function. A 200mA current source is flowing out of the pin 3 
during the start–up phase and during the switching phase in case of the Pulsed Mode of operation. 
A resistor can be inserted between the sense resistor and the pin 3; thus a programmable peak 
current detection can be performed during the SMPS stand–by mode. 

3 

Control Input 

A feedback current from the secondary side of the SMPS via the opto–coupler is injected into this 
pin. A resistor can be connected between this pin and GND to allow the programming of the Burst 
duty cycle during the Stand–by mode. 

4 

Ground 

This pin is the ground of the primary side of the SMPS. 

5 

Driver 

The current and slew rate capability of this pin are suited to drive Power MOSFETs. 

6 

VCC 

This pin is the positive supply of the IC. The driver output gets disabled when the voltage becomes 
higher than 15V and the operating range is between 6.6V and 13V. An intermediate voltage level 
of 10V creates a disabling condition called Latched Off phase. 

7 

 

This pin is to provide isolation between the Vi pin 8 and the VCC pin 6. 

8 

Vi 

This pin can be directly connected to a 500V voltage source for start–up function of the IC. During 
the Start–up phase a 9 mA current source is internally delivered to the VCC pin 6 allowing a rapid 
charge of the VCC capacitor. As soon as the IC starts–up, this current source is disabled.