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Model
AR-161 (serv.man15)
Pages
16
Size
1.12 MB
Type
PDF
Document
Service Manual
Brand
Device
Copying Equipment / AR161 Service Manual-Electrical Section
File
ar-161-sm15.pdf
Date
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PIN 
No.
Signal name
IN/OUT
Description
27
MDATA10
IN/OUT
Data bus of DRAM (page memory)
28
MDATA9
IN/OUT
29
MDATA8
IN/OUT
30
MDATA7
IN/OUT
31
3.3V
Power
32
MDATA6
IN/OUT
Data bus of DRAM (page memory)
33
MDATA5
IN/OUT
34
GND
Power
35
MDATA4
IN/OUT
Data bus of DRAM (page memory)
36
MDATA3
IN/OUT
37
MDATA2
IN/OUT
38
MDATA1
IN/OUT
39
MDATA0
IN/OUT
40
/RAS0
OUT
RAS signal 0 of DRAM (page
memory)
41
/RAS1
OUT
RAS signal 1 of DRAM (page
memory)
42
/RAS2
OUT
RAS signal 2 of DRAM (page
memory)
43
/RAS64
OUT
(Not used)
44
3.3V
Power
45
/RAS16
OUT
(Not used)
46
MAD0
OUT
Address bus of DRAM (page
memory)
47
GND
Power
48
MAD1
OUT
Address bus of DRAM (page
memory)
49
MAD2
OUT
50
MAD3
OUT
51
MAD4
OUT
52
MAD5
OUT
53
MAD6
OUT
54
MAD7
OUT
55
MAD8
OUT
56
MAD9
OUT
57
3.3V
Power
58
MAD10
OUT
Address bus of DRAM (page
memory)
59
MAD11
OUT
60
GND
Power
61
/CAS0
OUT
CAS signal of DRAM (page
memory)
62
/CAS1
OUT
63
/OE
OUT
Read enable signal of DRAM
(page memory)
64
/WE
OUT
Write enable signal of DRAM (page
memory)
65
OUTD0
OUT
(Not used)
66
OUTD1
OUT
67
OUTD2
OUT
68
OUTD3
OUT
69
3.3V
Power
70
OUTD4
OUT
(Not used)
71
OUTD5
OUT
72
GND
Power
73
OUTD6
OUT
(Not used)
74
OUTD7
OUT
75
OUTD8
OUT
76
OUTD9
OUT
77
OUTD11
OUT
78
OUTD10
OUT
79
OUTD12
OUT
80
OUTD13
OUT
81
OUTD14
OUT
82
OUTD15
OUT
PIN 
No.
Signal name
IN/OUT
Description
83
/HSYNC
OUT
(Not used)
84
/PCLPRD
IN
85
/PCLREQ
OUT
86
/PCLACK
IN
87
/PCLCS
IN
88
3.3V
Power
89
GND
Power
90
5V
Power
91
GND
Power
92
/FAXPRD
IN
(Not used)
93
/FAXREQ
OUT
94
/FAXACK
IN
95
3.3V
Power
96
/FAXCS
IN
(Not used)
97
/ESPRD
IN
98
GND
Power
99
/ESREQ
OUT
(Not used)
100
/ESACK
IN
101
/ESCS
IN
102
PARAD0
IN/OUT
103
PARAD1
IN/OUT
104
PARAD2
IN/OUT
105
PARAD3
IN/OUT
106
PARAD4
IN/OUT
107
PARAD5
IN/OUT
108
5V
Power
109
PARAD6
IN/OUT
(Not used)
110
PARAD7
IN/OUT
111
GND
Power
112
/REV
OUT
(Not used)
113
INIT
IN
114
/SLCTIN
IN
115
/AUTOFD
IN
116
/STB
IN
117
/ACK
OUT
118
BUSY
OUT
119
PE
OUT
120
/FAULT
OUT
121
5V
Power
122
SLCT
OUT
(Not used)
123
/TESTPIN0
IN
High: Normal Low: Test
124
GND
Power
125
PFCLK
IN
Write clock
126
/TESTPIN1
IN
High: Normal Low: Test
127
/SYNCEN
OUT
Jitter adjustment IC trigger signal
128
SD10
IN/OUT
Data line to SRAM before are
separation
129
SD11
IN/OUT
130
SD12
IN/OUT
131
SD13
IN/OUT
132
SD14
IN/OUT
133
5V
Power
134
SD15
IN/OUT Data line to SRAM before are
separation
135
SD16
IN/OUT
136
GND
Power
137
SD17
IN/OUT Data line to SRAM before are
separation
138
SOE1
OUT
Read enable line to SRAM before
area separation
139
SWE1
OUT
Write enable line to SRAM before
area separation
140
SCS1
OUT
Chip select line to SRAM before
area separation
AR-161
AR-160/161 FM/E [13] ELECTRICAL SECTION 12/1/1998
13 – 6
PIN 
No.
Signal name
IN/OUT
Description
141
SOE0
OUT
Read enable line to SRAM before
area separation
142
SWE0
OUT
Write enable line to SRAM before
area separation
143
SCS0
OUT
Chip select line to SRAM before
area separation
144
SD00
IN/OUT Data line to SRAM before are
separation
145
SD01
IN/OUT
146
5V
Power
147
SD02
IN/OUT Data line to SRAM before are
separation
148
SD03
IN/OUT
149
GND
Power
150
SD04
IN/OUT
Data line to SRAM before are
separation
151
SD05
IN/OUT
152
SD06
IN/OUT
153
SD07
IN/OUT
154
SAD0
OUT
Address line to SRAM before area
separation
155
SAD1
OUT
156
SAD2
OUT
157
SAD3
OUT
158
SAD4
OUT
159
SAD5
OUT
160
SAD6
OUT
161
SAD7
OUT
162
GND
Power
163
SAD8
OUT
Address line to SRAM before area
separation
164
SAD9
OUT
165
SAD10
OUT
166
SAD11
OUT
167
SAD12
OUT
168
SAD13
OUT
169
/f1
OUT
CCD drive signal transfer clock
(First phase)
170
/f2
OUT
CCD drive signal transfer clock
(Second phase)
171
/SH
OUT
CCD drive signal shift pulse
172
5V
Power
173
RS
OUT
CCD drive signal reset pulse
174
SP
OUT
CCD drive signal sampling hold
pulse
175
GND
Power
176
CP
OUT
A/D conversion IC latch clock
177
BCLK
OUT
CCD shield output latch signal
178
IDIN0
IN
Image scan data (after 8bit A/D
conversion)
179
IDIN1
IN
180
IDIN2
IN
181
IDIN3
IN
182
IDIN4
IN
183
IDIN5
IN
184
IDIN6
IN
185
5V
Power
186
IDIN7
IN
Image scan data (after 8bit A/D
conversion)
187
/SDCLK
OUT
Effective image area signal
188
GND
Power
189
SFCLK
IN
CCD drive clock (48MHz)
190
TEST port 0
IN
High: Normal Low: Test
191
/SYNC
IN
Horizontal synchronization signal
(HSYNC) from LSU
192
/LD
OUT
Laser drive signal
193
/LEND
OUT
Laser APC signal
194
/VIDEOCS
OUT
Video data control
195
—
OUT
NC
PIN 
No.
Signal name
IN/OUT
Description
196
—
OUT
NC
197
3.3V
Power
198
—
OUT
NC
199
—
OUT
200
GND
Power
201
—
OUT
NC
202
—
OUT
203
—
OUT
204
—
OUT
205
—
OUT
206
—
OUT
207
—
OUT
208
—
OUT
209
—
OUT
210
3.3V
Power
211
—
OUT
NC
212
—
OUT
213
GND
Power
214
/PCLPCS
OUT
PCL option print data control
215
/FAXPCS
OUT
FAX option print data control 
216
/ESPCS
OUT
Electronic sort option print data
control 
217
—
OUT
NC
218
CV_START
OUT
Copy vendor control
219
CV_COUNT
OUT
220
CV_SIZE3
OUT
221
CV_SIZE2
OUT
222
CV_SIZE1
OUT
223
5V
Power
224
CV_SIZE0
OUT
Copy vendor control
225
CV_DPX
OUT
226
GND
Power
227
CV_CA
OUT
Copy vendor control
228
—
OUT
NC
229
TM
OUT
Toner motor drive output (+)
230
TM_
OUT
Toner motor drive output (–)
231
CPUD15
IN/OUT
CPU data bus
232
CPUD14
IN/OUT
233
CPUD13
IN/OUT
234
CPUD12
IN/OUT
235
CPUD11
IN/OUT
236
5V
Power
237
CPUD10
IN/OUT
CPU data bus
238
CPUD9
IN/OUT
239
GND
Power
240
CPUD8
IN/OUT
CPU data bus
241
CPUD7
IN/OUT
242
CPUD6
IN/OUT
243
CPUD5
IN/OUT
244
CPUD4
IN/OUT
245
CPUD3
IN/OUT
246
CPUD2
IN/OUT
247
CPUD1
IN/OUT
248
CPUD0
IN/OUT
249
3.3V
Power
250
/CPUWR
IN
CPU write signal
251
/CPURD
IN
CPU read signal
252
GND
Power
253
CPUCLK
IN
CPU system clock
254
GND
Power
255
TEST PORT1
IN
High: Normal Low: Test
256
/SCANST
IN
Scanner process start signal
AR-161
AR-160/161 FM/E [13] ELECTRICAL SECTION 12/1/1998
13 – 7
(4) I/O ASIC
a. pin/signal table
Pin No.
Pin name
Signal name
I/O
Purpose
Descriptions
1
GND
POW
2
GND
POW
3
SCK
IN
0: Level fixing input
4
AMC
IN
0: Level fixing input
5
SMC
IN
0: Level fixing input
6
UART0SIN/SIN
OPECMD
IN
Operation panel command interface
7
UART0SOUT/SOT
OPESTS
OUT
Operation panel command interface
8
UART0CTSB
/OPESRDY
IN
Operation panel command interface
9
UART0RTSB
/OPECRDY
OUT
Operation panel command interface
10
GND
POW
11
UART1SIN
OPECMD
IN
Electronic sort option command interface
12
UART1SOUT
OPESTS
OUT
Electronic sort option command interface
13
UART1CTSB
/OPESRDY
IN
Electronic sort option command interface
14
UART1RTSB
/OPECRDY
OUT
Electronic sort option command interface
15
UART2SIN
OPECMD
IN
FAX option command interface
16
VCC
POW
17
UART2SOUT
OPESTS
OUT
FAX option command interface
18
UART2CTSB
/OPESRDY
IN
FAX option command interface
19
UART2RTSB
/OPECRDY
OUT
FAX option command interface
20
GND
POW
21
VCC
POW
22
GND
POW
23
UART3SIN
OPECMD
IN
PQL option command interface
24
UART3SOUT
OPESTS
OUT
PQL option command interface
25
UART3CTSB
/OPESRDY
IN
PQL option command interface
26
UART3RTSB
/OPECRDY
OUT
PQL option command interface
27
VCC
POW
28
DSLED1
LED1
OUT
3; Beam document size sensor control
29
DSLED2
LED2
OUT
3; Beam document size sensor control
30
DSLED3
LED3
OUT
3; Beam document size sensor control
31
DSIN0
DSIN1
IN
1: Beam document size sensor detection
32
GND
POW
33
DSIN1
DSIN2A
IN
2: Beam document size sensor A detection 
34
DSIN2
DSIN2B
IN
2: Beam document size sensor B detection
35
DSIN3
DS3IN
IN
3: Beam document size sensor detection
36
PMC0POUT0
MIRMODA
OUT
Mirror motor phase A drive
H: Drive
37
VCC
POW
38
PMC0POUT1
MIRMODB
OUT
Mirror motor phase B drive
H: Drive
39
PMC0POUT2
/MIRMODA
OUT
Mirror motor phase /A drive
H: Drive
40
VCC
POW
41
GND
POW
42
GND
POW
43
PMC0POUT3
/MIRMODB
OUT
Mirror motor phase /B drive
H: Drive
44
PMC2POUT0
SFTDA
OUT
Shifter motor phase A drive
H: Drive
45
PMC2POUT1
SFTDB
OUT
Shifter motor phase B drive
H: Drive
46
PMC2POUT2
/SFTDA
OUT
Shifter motor phase /A drive
H: Drive
47
VCC
POW
48
PMC2POUT3
/SFTDB
OUT
Shifter motor phase /B drive
H: Drive
49
PMC3POUT0
LFTDA
OUT
Separator motor phase A drive
H: Drive
50
PMC3POUT1
LFTDB
OUT
Separator motor phase B drive
H: Drive
51
PMC3POUT2
/LFTDA
OUT
Separator motor phase /A drive
H: Drive
52
GND
POW
53
PMC3POUT3
/LFTDB
OUT
Separator motor phase /B drive
H: Drive
54
PMC4POUT0
DPXDA
OUT
Duplex motor phase A drive
H: Drive
55
PMC4POUT1
DPXDB
OUT
Duplex motor phase B drive
H: Drive
56
PMC4POUT2
/DPXDA
OUT
Duplex motor phase /A drive
H: Drive
57
TESTB
IN
1: Level fixing input
58
TESTB
IN
1: Level fixing input
59
GND
POW
(Pin descriptions) IN: Input pin   OUT: Output pin   BIDIR: Bi-directional pin   ODN: Open drain output pin   TR1: 3-state output pin   POW: Power pin
AR-161
AR-160/161 FM/E [13] ELECTRICAL SECTION 12/1/1998
13 – 8
Pin No.
Pin name
Signal name
I/O
Purpose
Descriptions
60
GND
POW
61
VCC
POW
62
PMC4POUT3
/DPXDB
OUT
Duplex motor phase /B drive
H: Drive
63
PWM0POUT
PFANMD
OUT
Power fan motor drive
H: Drive
64
PWM1POUT
TFANMD
OUT
Fusing fan motor drive
H: Drive
65
P0OUT8
SOPHIA
OUT
(Not used)
66
P0OUT9
/LOOPINT
OUT
Loop interruption control
L: Interruption
67
P0OUT10
—
OUT
(Not used)
68
P0OUT11
—
OUT
(Not used)
69
GND
POW
70
P0OUT12
MIRMO0
OUT
Mirror motor phase current control 0
H: Power down
71
P0OUT13
MIRMO1
OUT
Mirror motor phase current control 1
H: Power down
72
P0OUT14
PDOWN
OUT
SPF motor phase current control
H: Power down
73
P0OUT15
—
OUT
(Not used)
74
P1OUT12
SPFPSOL
OUT
SPF pickup solenoid drive
H: Drive
75
P1OUT13
SPFGSOL
OUT
SPF gate solenoid
H: Drive
76
P1OUT14
SPFRSOL
OUT
SPF release solenoid drive
H: Drive
77
VCC
POW
78
P1OUT15
SPFCLH
OUT
SPF clutch solenoid
H: Drive
79
P0IN0
PIN
IN
Paper in sensor detection
1: Paper presence
80
GND
POW
81
VCC
POW
82
P0IN1
POUT
IN
Paper out sensor detection
1: Paper presence
83
P0IN2
PDPX
IN
Duplex control sensor detection 
0: Paper presence
84
P0IN3
LFTHP
IN
Separator home position sensor detection
1: Home position
85
GND
POW
86
P0IN4
/SFTHP
IN
Shifter home position sensor detection
0: Home position 
87
P0IN5
PFULL
IN
Tray paper full sensor detection
1: Paper full
88
P0IN6
MHP
IN
Mirror home position sensor detection 
1: Home position
89
VCC
POW
90
GND
POW
91
PFCLK
PFCLK
IN
Dot count control
92
GND
POW
93
GND
POW
94
LDB
/VIDEO
IN
Dot count control
0: Effective
95
LENDB
S/H
IN
Dot count control
0: Effective
96
VCC
POW
97
P0IN7
/CV_COPY
IN
Coin vendor copy enable detection 
0: Copy enabled
98
P0IN8
/HTEMP
IN
Fusing thermistor abnormally high temperature
detection
0: Abnormally high temperature 
99
P0IN9
/THOPEN
IN
Fusing thermistor disconnection detection 
0: Wire disconnection
100
VCC
POW
101
GND
POW
102
P0IN10
CASETTE
IN
Copier cassette switch detection
1: Cassette installed
103
P0IN11
/CPEMPTY
IN
Copier cassette paper empty sensor detection 
0: Paper empty
104
GND
POW
105
P0IN12
HPEMPTY
IN
Manual feed tray paper empty sensor detection 
1: Paper empty
106
P0IN13
/DEV
IN
Developing unit installation detection 
0: Unit installed
107
P0IN14
DRUM
IN
Drum initial switch detection
1: Drum initial
108
P0IN15
/CSW
IN
Side cover switch detection 
0: Cover close 
109
P1IN0
/PMEMO
IN
Memory print operation setup jumper detection
1: Operation enabled
110
P1IN1
/CSPEED
IN
Copy speed setup jumper detection 
"1: 20ppm, 0: 16ppm"
111
P1IN2
/DPXSW
IN
Duplex print operation setup jumper detection 
1: Operation enabled
112
VCC
POW
113
P1IN3
/SFTSW
IN
Shifter operation setup jumper detection 
1: Operation enabled
114
P1IN4
/LFTSW
IN
Separator operation setup jumper detection
1: Operation enabled
115
P1IN5
/INCHSW
IN
Inch series document size sensor setup jumper
detection 
1: Operation enabled
116
P1IN6
/JPNABSW
IN
Japan AB series document size sensor setup
jumper detection 
1: Operation enabled
117
P1IN7
/EXJABSW
IN
EX AB series document size sensor setup jumper
detection
1: Operation enabled
(Pin descriptions) IN: Input pin   OUT: Output pin   BIDIR: Bi-directional pin   ODN: Open drain output pin   TR1: 3-state output pin   POW: Power pin
AR-161
AR-160/161 FM/E [13] ELECTRICAL SECTION 12/1/1998
13 – 9
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