Sharp AL-1551 (serv.man4) Service Manual ▷ View online
AL-1551 ELECTRICAL SECTION 12-16
d. Rectifying/smoothing circuit on the secondary side
The high frequency pulse generated by the invertor circuit is dropped by
transformer T1, rectified by diodes D51, D52, and D53, and smoothed by
transformer T1, rectified by diodes D51, D52, and D53, and smoothed by
capacitors C51, C52, C53, and C54.
e. Control circuit
The secondary side outputs (24V series, 5V series) are detected by the
output voltage detecting circuit, and the detected signal is fed-back
through photo coupler PC1 to the control transistor Q2 to change the ON
through photo coupler PC1 to the control transistor Q2 to change the ON
period of FET Q1 in the primary side invertor circuit, stabilizing the output
voltage.
f. Series regulator circuit
This circuit stabilizes the output and protect against an overcurrent by the
series regulator. The 12V is composed of IC51, the 5V is composed of
IC52, the 3.3V is composed of IC53.
IC52, the 3.3V is composed of IC53.
(2) FW signal
The AC input voltage is full-wave rectified by D5 and D6. When the
voltage is divided by resistors R18, R19, and R27 and decreased below
2.5V, the shunt regulator IC7 is turned OFF to turn OFF photo coupler
2.5V, the shunt regulator IC7 is turned OFF to turn OFF photo coupler
PC3, and turn ON transistor Q3. LOW level output of FW signal is
provided.
(3) Heater lamp drive circuit
(4) High voltage section
a. Invertor circuit
The 24V output of the main section is inverted by the RCC system and
the high frequency power is supplied to the secondary side of high
voltage transformer T101 and T102. The diode and the capacitor for
voltage transformer T101 and T102. The diode and the capacitor for
rectifying and smoothing are built in the secondary side of high voltage
transformer T101 and T102 to provide DC outputs of high voltage. MC is
turned ON/OFF by MC IN terminal, and TC is turned ON/OFF by TC IN
terminal.
terminal.
b. Series regulator
The GRID output of DV BIAS is applied from the MC output and dropped
by the series regulator.
by the series regulator.
DV BIAS is turned ON/OFF by BIAS terminal, and the GRID voltage is
switched by GRID L terminal.
c. Dividing circuit
BD OUT takes out a voltage from T102 and divides it with the resistor
and outputs it.
* !"#$%&
AL-1551 ELECTRICAL SECTION 12-17
11.CL invertor PWB (circuit)
A. Circuit description
The Two transistors connected in series to the transformer are switched on/off by the control signal (CL-) from the MCU. By this switching operation, the
signals are converted into switching pulses and a high frequency power is supplied to the CL (Xenon lamp) by the transformer.
12.CCD PWB operational description
The CCD PWB is provided with the CCD (Charge-Coupled Device), the differential amplifier which amplifies CCD signals, and the AD convertor which
converts the amplified signals into digital signals.
The DC power and the pulse supply pins necessary for operating the CCD image sensor are the power source (CD pin), GND (SS pin), shift pulse (SH
pin), transfer pulse (ø1 pin), (ø2 pin), reset pulse (/RS pin), clamp pulse (/CP pin), and sampling (/SP pin).
Photo data are stored in the light receiving element at the center of the CCD by the SH signal. Even number pixel data are sent to one of the two shift
registers which are positioned at both ends of the light receiving element, and odd number pixel data are sent to the other shift register. The time
registers which are positioned at both ends of the light receiving element, and odd number pixel data are sent to the other shift register. The time
interval between inputting two SH signals is called the photo accumulation time.
The signals are transfered to the register, then to the shift register sequentially by transfer pulsesø1 and ø2 and to the floating capacitor section where
electric signals are voltage-converted. Electric charges from the even number pixel shift register and the odd number pixel shift register are flowed to
electric signals are voltage-converted. Electric charges from the even number pixel shift register and the odd number pixel shift register are flowed to
the floating capacitor section alternatively.
The /RS signal is the reset signal of the CCD output signal. The CCD output is expressed as electric charges equivalently accumulated in the capacitor.
Therefore, to take the CCD output data one pixel by one pixel, one output data must be cleared after it is outputted. The /RS signal is used for that
operation.The /SP pulse signal is the peak hold signal of the signal voltage.
The output signal from the CCD is amplified by about 4.7 times greater in the differential amplifier circuit in the CCD PWB.
Differential amplification is made for the signal output (OS) and the compensation output (DOS).
The amplified CCD signal output is sent to the clamp circuit. In the clamp circuit, the black level is clamped to 2V at the BCLK signal timing by the
analog switch. The clamped voltage is maintained for one line by the coupling capacitor. The clamped analog signal is impedance-converted and
analog switch. The clamped voltage is maintained for one line by the coupling capacitor. The clamped analog signal is impedance-converted and
inputted to the AD convertor.
The analog signal inputted to the AD convertor is converted into 8bit digital data and passed to the PCU PWB.
The machine employs the TCD1501C as the image sensor. The TCD1501C is the reduction type high sensitivity CCD linear sensor of one-output
The machine employs the TCD1501C as the image sensor. The TCD1501C is the reduction type high sensitivity CCD linear sensor of one-output
system. 5000 pixels of 7um x 7um are arranged in line to allow scanning of A3 document at 400dpi (16 lines/mm).
Invertor circuit and transformer
Output 1.5kV (effective voltage)
CL (Xenon lamp)
CL- (CNT)
Input +24V
CCD analog shift register 1
CCD analog shift register 2
Photo diode
12V
Output
Photo diode
Accumulation electrode
Shift electrode
To Shift register
Photo energy
+ !"#$%&
AL-1551 ELECTRICAL SECTION 12-18
13.Operation section
A. Outline
The operation circuit is composed of the key matrix circuit and the display matrix circuit.
B. Key matrix circuit
The CPU in the MCU sends select signals SELIN1 - 3 to the selector in the operation circuit. The signals detects ON/OFF of the key and are sent to the
CPU as KIN1 - 2.
CPU as KIN1 - 2.
C. Display circuit section
The display is controlled by inputting the data signal and the clock signal from the CPU and the latch signal from the ASIC to the LED driver in the
operation circuit.
operation circuit.
CPU
Selector
IC902,903
IC902,903
+5V
Key
Operation circuit
MCU
+5V
+5V
Operation circuit
MCU
CPU
ASIC
Display
LED
LED
LED driver
IC901
OP-CLK
OP-DATA
OP-LATCH
, !"#$%&
AL-1551 CIRCUIT DIAGRAM 13-1
[13]CIRCUIT DIAGRAM
A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
MCU 1. CPU SECTION (OC/SPF/RSPF/Duplex Models)
C351
18p
C352
18p
X101
AT-51 19.6608MHz
C381
0.1u
C380
22000p
R334
9.1KJ
R213
33KJ
C430
1000p
R333
1KJ
C367
1000p
R277
1KJ
R284
1KJ
C350
1000p
C349
1000p
R103
Rx 1/4W
R255
3.3KJ
C322
0.1u
R259
68J
C315
0.1u
C323 0.1u
C108
22u 16V
C310
0.1u
IC106
M51953
VCC
1
NC
2
GND
3
CD
4
OUT
5
C265
22000p
R264
10KJ
C264
22000p
IC204D
74VHC08
12
13
11
R265
10KJ
C318
0.1u
C309
0.1u
IC211E
74HC14
11
10
C428
0.1u
IC211F
74HC14
13
12
C295
0.1u
C250
47P
C258
0.1u
C274
0.1u
C332
47P
R263
47J
R303
1KJ
R280
330J
C283
100p
BR124
47J
8 7 6 5
1 2 3 4
BR123 47J
8 7 6 5
1 2 3 4
C273
47P
BR126
47J
8 7 6 5
1 2 3 4
BR132
47J
8
7
6
5
1
2
3
4
BR140
47J8
7
6
5
1
2
3
4
BR138
47J8
7
6
5
1
2
3
4
D122
DAN202U
3
2
1
R282
10KJ
R283
10KJ
D120
DAP202U
3
2
1
R311
10KJ
C214
47P
C213
18p
D107
1SS133
D106
1SS133
NF102
NFM839
NF101
NFM839
R235
47J
C285
47P
C286
47P
C287
47P
C429
47P
R339
1KJ
R260
47J
R271 47J
C279
100p
C280
100p
C281
100p
C346
100p
C294
100p
C282
100p
C284
100p
C296
100p
BR135
47J
8
7
6
5
1
2
3
4
BR110
20KJ
BR112
20KJ
BR11520KJ
BR11820KJ
R270
47J
R256
20KJ
BR146 20KJ
BR147 20KJ
R289
47J
R290
47J
BR148
20KJ
BR145
20KJ
D130
1SS133
C338
100p
C333
100p
R295
1KJ
C247
47P
C249
47P
C364
1000p
D126
DAN202U
3
2
1
D124
DAP202U
3
2
1
C324
100p
C345
100p
C304
100p
BR127 20KJ
R269
20KJ
R274
20KJ
R275
20KJ
R245
20KJ
R281
20KJ
D203
DA204K
1
2
BR122
20KJ
BR128 20KJ
BR142
20KJ
BR121
20KJ
BR125 47J
8 7 6 5
1 2 3 4
C259
0.1u
L101
ZJSR5101-223
R310
10KJ
R302
7.5KJ
R296
4.7KJ
R360 20KJ
IC107
UT61256JC-12
A14
1
A12
2
A7
3
A6
4
A5
5
A4
6
A3
7
A2
8
A1
9
A0
10
I/O1
11
I/O2
12
I/O3
13
GND
14
VDD
28
/WE
27
A13
26
A9
24
A8
25
A11
23
/OE
22
A10
21
/CE
20
I/O8
19
I/O7
18
I/O6
17
I/O5
16
I/O4
15
C342
47P
IC104
UT61256JC-12
A14
1
A12
2
A7
3
A6
4
A5
5
A4
6
A3
7
A2
8
A1
9
A0
10
I/O1
11
I/O2
12
I/O3
13
GND
14
VDD
28
/WE
27
A13
26
A9
24
A8
25
A11
23
/OE
22
A10
21
/CE
20
I/O8
19
I/O7
18
I/O6
17
I/O5
16
I/O4
15
C344 100p
IC112
M24C02WBN6
SDA
5
SCL
6
/WC
7
A0
1
VCC
8
A2
3
VSS
4
A1
2
C107
0.1uM
C337
100p
C343
47P
IC105
MX27C2048
A0
21
A1
22
A2
23
A3
24
A4
25
A5
26
A6
27
A7
28
A8
29
A9
31
A10
32
A11
33
A12
34
A13
35
A14
36
A15
37
CE
2
OE
20
PGM
39
VPP
1
D0
19
D1
18
D2
17
D3
16
D4
15
D5
14
D6
13
D7
12
D8
10
D9
9
D10
8
D11
7
D12
6
D13
5
D14
4
D15
3
A16
38
C336 100p
C348 100p
C248
47P
JP204 (4M MASK ROM)
C272
47P
R361
20KJ
CN128
For EXT-CONNECTOR
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
IC108
H8S/2350
AVcc
103
Vref
104
P40/AN0
105
P41/AN1
106
P42/AN2
107
P43/AN3
108
P44/AN4
109
P45/AN5
110
P46/AN6/DA0
111
P47/AN7/DA1
112
AVss
113
Vss
114
P17/PO15/TIOCB2/TCLKD
115
P16/PO14/TIOCA2
116
P15/PO13/TIOCB1/TCLKC
117
P14/PO12/TIOCA1
118
P13/PO11/TIOCD0/TCLKB
119
P12/PO10/TIOCC0/TCLKA
120
P11/PO9/TIOCB0/DACK1-
121
P10/PO8/TIOCA0/DACK0-
122
MD0
123
MD1
124
MD2
125
PG0/CAS-
126
PG1/CS3-
127
PG2/CS2-
128
Vss
65
P60/DREQ0-/CS4-
66
Vss
67
Vss
68
P61/TEND0-/CS5-
69
P62/DREQ1-
70
P63/TEND1-
71
P27/PO7/TIOCB5
72
P26/PO6/TIOCA5
73
P25/PO5/TIOCB4
74
P24/PO4/TIOCA4
75
P23/PO3/TIOCD3
76
P22/PO2/TIOCC3
77
P21/PO1/TIOCB3
78
P20/PO0/TIOCA3
79
WDTOVF-
80
RES-
81
NMI
82
STBY-
83
Vcc
84
XTAL
85
EXTAL
86
Vss
87
PF7/
88
Vcc
89
PF6/AS-
90
PF5/RD-
91
PF4/HWR-
92
PF3/LWR-
93
PF2/LCAS-/WAIT-/BREQO-
94
PF1/BACK-
95
PF0/BREQ-
96
P50
97
P51
98
Vss
99
Vss
100
P52
101
P53/ADTRG-
102
Vcc
39
PG3/CS1-
1
PE0/D0
40
PG4/CS0-
2
PE1/D1
41
Vss
3
PE2/D2
42
Vss
4
PE3/D3
43
Vcc
5
Vss
44
PC0/A0
6
PE4/D4
45
PC1/A1
7
PE5/D5
46
PC2/A2
8
PE6/D6
47
PC3/A3
9
PE7/D7
48
Vss
10
PD0/D8
49
PC4/A4
11
PD1/D9
50
PC5/A5
12
PD2/D10
51
PC6/A6
13
PD3/D11
52
PC7/A7
14
Vss
53
PB0/A8
15
PD4/D12
54
PB1/A9
16
PD5/D13
55
PB2/A10
17
PD6/D14
56
PB3/A11
18
PD7/D15
57
Vss
19
Vcc
58
PB4/A12
20
P30/TxD0 59
PB5/A13
21
P31/TxD1 60
PB6/A14
22
P32/RxD0 61
PB7/A15
23
P33/RxD1 62
PA0/A16
24
P34/SCK0 63
PA1/A17
25
P35/SCK1 64
PA2/A18
26
PA3/A19
27
Vss
28
PA4/A20/IRQ4-
29
PA5/A21/IRQ5-
30
PA6/A22/IRQ6-
31
PA7/A23/IRQ7-
32
P67/CS7-/IRQ3-
33
P66/CS6-/IRQ2-
34
Vss
35
Vss
36
P65/IRQ1-
37
P64/IRQ0-
38
H8S/2350
BR174
20kJ
8
7
6
5
1
2
3
4
C106
10u 16V
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
A16 A17
A5 A6
A11
A5 A6
A13
A9
A14
A14
A13
A6
A9
A7 A8
A12
A10
A9
A8
A7
A7
A6
A12
A14
A5
A13
A15
A10
A15
A15
A8
A7
A10 A11
A11
A5
A4
A1
A3
A3
A3
A4
A1
A3
A4
A2
A2
A4
A1
A1
A2
A2
D4
D2
D3
D5
D13
D7
D12
D0 D1
D6
A12
D9 D10
D8
D11
A15
A3
A7
D3
D5
D10
D13
A1
D2
A8
A6
A14
A13
A2
D4
A4
D1
A12
D6
A11
A5
A10
A9
D8
D7
D12
D9
D11
D0
A16 A17
D3
D2
D4
D13
D6
D12
D7
D5
D1
D0
D11
D8 D9 D10
D14 D15
D14
D14
D14
D15
D15
D15
VPP D15 D13 D11 D9 GND D6 D4 D2 D0 A1 A3 A5 A7 A9 A10 A12 A14 A16 A18
/CE D14 D12 D10 D8 D7 D5 D3 D1 /OE A2 A4 A6 A8 GND A11 A13 A15 A17 VCC
5V
A5V
5V
5V
5V
5V
5V
5V
A5V
5V
5V
24V
5V
5V
5V
5V
5V
5V
5V
5V
SDA
FW
KIN1
KIN2
/CS2
SELIN1 SELIN2 SELIN3
A5
A1
/RD
A2
A4
A3
/CS1
A7
A6
DRST
/LWR
CPUCLK
/RESET
/RST
/CS1 /CS0
/SCANSP
SIN1
SCL
PMCLK
/RD
MRMT3
DMT3
/ASICINT
SIN3
/LWR
MRMT1
/CPUSYNC
HL
(OP-CLK)
/PRSTART
DAH
RRS
DMT1
DMT2
TMCLK
/TMEN
SIN2
RTH
/HWR
MRMT2
(MHPS)
/PWOFF
PR
MRMT0
/SCANST
DAL
(OP-DATA)
D12
D8
D1
D14 D15
D11
D2
D5
D13
D9 D10
D6
D4
D0
D7
D3
PSW
(SPPD)
/CS0
/HWR
DMT0
AN-GND
AN-GND
(6-C4)
(4-D4) (4-D4) (3-C1) (3-C1) (3-C1) (3-C1)
(5-C1)
(4-D4) (3-B3) (3-B4)
(2-E3) (2-E3) (2-E4)
(2-D2)
(1-A2) (1-A2)
(6-E2) (6-E2)
(4-D4)
(4-D3) (2-C4) (2-C4) (2-C4) (1-A2,5-A2) (1-A1) (1-A2,5-A2)
(4-D4)
(5-A1)
(3-A4)
(5-A1) (5-B1) (5-B1)
(5-B1)
(5-B1)
(5-C1)
(6-E2)
(4-D2)
(4-A3)
(4-A3)
(6-B4)
(6-B4)
(5-B1)
(5-B1)
(5-B1)
(5-B1)
(5-B1)
(5-B1)
(5-B1)
(1-D3)
(1-D3)
(1-B3)
(1-D3)
(6-A4)
(5-B1)
(2-B4)
(5-C1)
(1-B3)
(5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2) (5-A2)
(6-C4)
(4-C1)
(2-B1)
MOUNTED ON OC MODEL ONLY
MOUNTED ON OC/SPF MODEL ONLY
EXT-ROM CONNECTOR(NOT USE)
!"#
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