Sharp PN-V602 (serv.man7) Service Manual ▷ View online
CHAPTER 8. HARDWARE DESCRIPTIONS
PN-V602 HARDWARE DESCRIPTIONS
8 – 17
■ LED-TCON PWB
CN1202
Thermistor
(Max. 6 piece)
(Max. 6 piece)
8
TH4
Analog input 4 for
detecting sensor volt-
age
age
9
GND
GND
10
TH5
Analog input 5 for
detecting sensor volt-
age
age
11
GND
GND
12
TH6
Analog input 6 for
detecting sensor volt-
age
age
CN1301
Remote control-
Remote control-
ler receiver unit
(*)Only the inter-
nal side terminal
nal side terminal
1
GND
GND
2
BUS
Data input/ output
3
VCC
5V power
(4),(5)
NC
---
(6)
PULL-UP
5V pull-up
(7)
PLUGIN
Detecting the stereo
pin's plug-in and pull-
out
CN1302
Microprocessor
debug
debug
1
VCC
3.3V power
2
MODE
Debug firmware
rewriting input
3
RESET
Reset input
4
VSS
GND
CN1401
LED-TCON
(Control signal,
(Control signal,
UART, etc)
1
GND
GND
2
nLED_
PORT1
Not used
3
nRST_
FP_EN
LED-TCON FPGA
main unit reset
main unit reset
4
nEXT_
RST
LED-TCON PWB
reset
reset
5
nLED_
ERR
LED-TCON error
interrupt
interrupt
6
nTCON_
RDY
LED-TCON ready sig-
nal
nal
7
nLED_
ON
Backlight ON/OFF
control
control
8
nPOW_
ON
LED power control
signal
signal
9
GND
GND
10
IRIS_
SDA
I2C data signal for
LED-TCON
11
IRIS_
SCL
I2C clock signal for
LED-TCON
12
GND
GND
13
TXD_
LED
For LED-TCON pro-
gram update
14
RXD_
LED
For LED-TCON pro-
gram update
15
nPNL_
PWR_ON
12V power switch sig-
nal for LCD-TCON
16
APL_
OUT-
SCALE
PWM signal for set-
ting the LED maxi-
mum lighting ratio
CN No.
Pin No.
Symbol
Function
CN1401
LED-TCON
(Control signal,
(Control signal,
UART, etc)
17
APL_
OFFSET
PWM signal for set-
ting the LED minimum
lighting ratio
lighting ratio
18
GND
GND
CN No.
Pin No.
Symbol
Function
CN1
LCD-TCON
power
power
1, 2
LCD_12V +12V power supply
3, 4
GND
GND
CN2
For IRIS debug
For IRIS debug
1
SDA
I2C data signal for
IRIS debug (open)
IRIS debug (open)
2
SCL
I2C clock signal for
IRIS debug (open)
IRIS debug (open)
3
REGSEL
Register I/F select
signal
signal
4
TXD
UART send data sig-
nal for IRIS debug
nal for IRIS debug
5
RXD
UART receive data
signal for IRIS debug
signal for IRIS debug
6
NC (No
Via Hole)
Open
7
GND
GND
CN3
LCD-TCON PWB
1 - 4
VLCD
Open (Not used)
5 - 9
GND
GND
10
U/D
Not used
11
SCL
I2C clock signal
12
SDA
I2C data signal
13
GND
GND
14
TX4+
LVDS CH4 even dif-
ferential data output
(+)
(+)
15
TX4-
LVDS CH4 even dif-
ferential data output
ferential data output
(-)
16
GND
GND
17
TX3+
LVDS CH3 even dif-
ferential data output
ferential data output
(+)
18
TX3-
LVDS CH3 even dif-
ferential data output
(-)
19
GND
GND
20
TXCLK+
LVDS even clock out-
put (+)
put (+)
21
TXCLK-
LVDS even clock out-
put (-)
put (-)
22
GND
GND
23
TX2+
LVDS CH2 even dif-
ferential data output
(+)
(+)
24
TX2-
LVDS CH2 even dif-
ferential data output
ferential data output
(-)
CN No.
Pin No.
Symbol
Function
CHAPTER 8. HARDWARE DESCRIPTIONS
PN-V602 HARDWARE DESCRIPTIONS
8 – 18
CN3
LCD-TCON PWB
25
GND
GND
26
TX1+
LVDS CH1 even dif-
ferential data output
(+)
27
TX1-
LVDS CH1 even dif-
ferential data output
(-)
(-)
28
GND
GND
29
TX0+
LVDS CH0 even dif-
ferential data output
(+)
(+)
30
TX0-
LVDS CH0 even dif-
ferential data output
ferential data output
(-)
31
GND
GND
32
HZ_SEL
50/60 fps select
33
LVDS_
SEL
Select LVDS data
order
34 - 37
GND
GND
38 - 41
VLCD
Open (Not used)
CN4
Serial Flash writ-
Serial Flash writ-
ing
1
SCK
SPI clock signal
2
SDO
Serial input signal
3
CS
Chip select signal
4
SDI
Serial output signal
5
WP
write protect signal
6
NC
(No Via
Hole)
7
RESET
Reset signal
8
GND
GND
CN
System power
1, 2
+12V
+12V power supply
3
+5V
Open (Not used)
4
LED_
POW_
ON1
LED power ON
signal1
signal1
5
LED_
POW_
ON2
LED power ON
signal2
6, 7
GND
GND
CN6
IF-PWB
1
GND
GND
2
A0-
LVDS CH0 even dif-
ferential data input (-)
ferential data input (-)
3
A0+
LVDS CH0 even dif-
ferential data input (+)
ferential data input (+)
4
A1-
LVDS CH1 even dif-
ferential data input (-)
ferential data input (-)
5
A1+
LVDS CH1 even dif-
ferential data input (+)
ferential data input (+)
6
A2-
LVDS CH2 even dif-
ferential data input (-)
ferential data input (-)
7
A2+
LVDS CH2 even dif-
ferential data input (+)
ferential data input (+)
8
GND
GND
9
ACK-
LVDS even clock
input (-)
CN No.
Pin No.
Symbol
Function
CN6
IF-PWB
10
ACK+
LVDS even clock
input (+)
11
A3-
LVDS CH3 even dif-
ferential data input (-)
12
A3+
LVDS CH3 even dif-
ferential data input (+)
13
A4-
LVDS CH4 even dif-
ferential data input (-)
14
A4+
LVDS CH4 even dif-
ferential data input (+)
15
GND
GND
16
B0-
LVDS CH0 odd differ-
ential data input (-)
17
B0+
LVDS CH0 odd differ-
ential data input (+)
18
B1-
LVDS CH1 odd differ-
ential data input (-)
19
B1+
LVDS CH1 odd differ-
ential data input (+)
20
B2-
LVDS CH2 odd differ-
ential data input (-)
21
B2+
LVDS CH2 odd differ-
ential data input (+)
22
GND
GND
23
BCK-
LVDS odd clock input
(-)
(-)
24
BCK+
LVDS odd clock input
(+)
(+)
25
B3-
LVDS CH3 odd differ-
ential data input (-)
26
B3+
LVDS CH3 odd differ-
ential data input (+)
27
B4-
LVDS CH4 odd differ-
ential data input (-)
28
B4+
LVDS CH4 odd differ-
ential data input (+)
29
GND
GND
30
LCD_
PORT1
Open (Not used)
31
LCD_
SDA
I2C data signal
32
LCD_
SCL
I2C clock signal
33
DET_
POW
LCD I2C switch con-
trol signal
34
LCD_
PORT2
Open (Not used)
35
ROMSEL
0
Open (Not used)
36
nVCOM_
WP
LVDS_SEL signal
37
GSP
Open (Not used)
38
LCD_
PORT3
Open (Not used)
39
nPE
HZ_SEL signal
CN No.
Pin No.
Symbol
Function
CHAPTER 8. HARDWARE DESCRIPTIONS
PN-V602 HARDWARE DESCRIPTIONS
8 – 19
CN6
IF-PWB
40
LCD_
PORT4
Open (Not used)
41
nROM_
WP
U/D signal (Not used)
CN7
IF-PWB
1
GND
GND
2
APL_
OFFSET
OFFSET (R/G/B)
signal (PWM signal
for setting the LED
minimum lighting
minimum lighting
ratio) for APL
3
APL_
OUT-
SCALE
OUTSCALE (R/G/B)
signal (PWM signal
for setting the LED
maximum lighting
maximum lighting
ratio) for APL
4
nPNL_
PWR_ON
LCD-TCON PWB
power ON signal
5
RXD_MB
UART receive data
signal
6
TXD_MB
UART send data sig-
nal
7
GND
GND
8
SCL_MB
I2C clock signal
(open)
(open)
9
SDA_MB
I2C data signal (open)
10
GND
GND
11
nPOW_
ON
LED power ON signal
12
nLED_
ON
LED driver output
enable signal
enable signal
13
nTCON_
RDY
LED_TCON PWB
ready signal
ready signal
14
nLED_
ERR
LED_TCON error sig-
nal
nal
15
nEXT_
RST
External Reset signal
16
nRST_
FP_EN
FPGA reset enable
signal
signal
17
nLED_
PORT1
Sub micon flash
rewriting foe signal
rewriting foe signal
18
GND
GND
CN8
LED-Driver PWB
1 - 4
N.C.
5, 6
LED_
DR_VIN
+12V power supply
7
GND
GND
8, 9
VCC3.3V
+3.3V power supply
10
nDCDC_
EN
DCDC enable signal
11
VCC_
LED
Open
12
GATE2
SPI IF GATE2 signal
13
GATE1
SPI IF GATE1 signal
14
GATE0
SPI IF GATE0 signal
15
GND
GND
16
CSA2
SPI IF CS2 signal
CN No.
Pin No.
Symbol
Function
CN8
LED-Driver PWB
17
CSA1
SPI IF CS1 signal
18
CSA0
SPI IF CS0 signal
19
EN
iWatt Enable signal
20
GND
GND
21
VSYNC_
1
iWatt Vertical SYNC
signal 1
22
VSYNC_
0
iWatt Vertical SYNC
signal 0
23
SCK_1
SPI CLK1 signal
24
SCK_0
SPI CLK0 signal
25
GND
GND
26
MOSI_1
SPI data output signal
1
27
MOSI_0
SPI data output signal
0
28
GND
GND
29
MISO_1
SPI data input signal
1
1
30
MISO_0
SPI data input signal
0
0
CN9
LED power
LED power
1
ADJ_Ach
Open (DAC output
Ach for LED power
Ach for LED power
adjustment: For
reserved power
source)
source)
2
ADJ_Bch
Open (DAC output
Bch for LED power
Bch for LED power
adjustment: For
reserved power
source)
3
ADJ_Cch
Open (DAC output
Cch for LED power
adjustment: For
adjustment: For
reserved power
source)
4
GND
GND
CN10
EEPROM writing
1
GND
GND
2
SCL
I2C clock signal
3
SDA
I2C data signal
4
NC
(No Via
Hole)
5
NC
6
WP
Write protect signal
7
A0_C
Open
8
A0_M
Slave address bits [3]
for EEPROM writing
9
VCC
+3.3V power supply
CN11
FPGA config
ROM writing
1
TCK
Clock signal for FPGA
writing
2
NC
(No Via
Hole)
3
TDO
Output data signal for
FPGA writing
CN No.
Pin No.
Symbol
Function
CHAPTER 8. HARDWARE DESCRIPTIONS
PN-V602 HARDWARE DESCRIPTIONS
8 – 20
■ LED driver PWB
CN11
FPGA config
ROM writing
ROM writing
4
VCC
+2.5V power supply
5
TMS
Mode signal for FPGA
writing
6
TDI
Input data signal for
FPGA writing
7
GND
GND
CN12
I2C debug
I2C debug
1
SDA_
mmc
I2C data signal (open)
2
SCL_
mmc
I2C clock signal
(open)
(open)
3
NC
(No Via
Hole)
4
GND
GND
CN13
Sub microproces-
Sub microproces-
sor writing
1
GND
GND
2
RESET_
OUT
Reset input signal
3
RxD
Command/data send/
receive terminal
4
VDD
+3.3V power supply
5
FLMD0
Mode signal
6
RESET_
IN
Reset output signal
7
NC
(No Via
Hole)
8
CLK_IN
Clock output signal
CN14
UART debug
1
RXD
UART receive data
signal
2
TXD
UART send data sig-
nal
3
NC
(No Via
Hole)
4
GND
GND
CN15
LED power
1
ADJ_
Ach1
Open (DAC output
Ach for LED power
adjustment: LED
adjustment: LED
power 1)
2
ADJ_
Bch1
Open (DAC output
Bch for LED power
adjustment: LED
power 1)
power 1)
3
ADJ_
Cch1
Open (DAC output
Cch for LED power
Cch for LED power
adjustment: LED
power 1)
4
GND
GND
5
ADJ_
Ach2
Open (DAC output
Ach for LED power
adjustment: LED
power 2)
power 2)
6
ADJ_
Bch2
Open (DAC output
Bch for LED power
Bch for LED power
adjustment: LED
power 2)
CN No.
Pin No.
Symbol
Function
CN15
LED power
7
ADJ_
Cch2
Open (DAC output
Cch for LED power
adjustment: LED
adjustment: LED
power 2)
8
GND
GND
9
ADJ_
Ach3
Open (DAC output
Ach for LED power
Ach for LED power
adjustment: LED
power 3)
10
ADJ_
Bch3
Open (DAC output
Bch for LED power
adjustment: LED
adjustment: LED
power 3)
11
ADJ_
Cch3
Open (DAC output
Cch for LED power
adjustment: LED
power 3)
power 3)
12
GND
GND
CN No.
Pin No.
Symbol
Function
CN1
LED PWB
1
LED1-6
LED1-* Cathode side
2
LED1-7
3
LED1-8
4
NC
5, 6
boost1-1
LED1 Anode side
7, 8
boost1-2
LED2 Anode side
9
NC
10
LED1-5
LED1-* Cathode side
11
LED1-4
12
LED1-3
13
LED1-2
14
LED1-1
15 - 21
NC
22
LED2-8
LED2-* Cathode side
23
LED2-7
24
LED2-6
25
LED2-5
26
LED2-4
27
LED2-3
28
LED2-2
29
LED2-1
30
LED6-8
LED6-* Cathode side
31
LED6-7
32
LED6-6
33
LED6-5
34
LED6-4
35
LED6-3
36
LED6-2
37
LED6-1
38
NC
39, 40
boost1-6
LED6 Anode side
CN No.
Pin No.
Symbol
Function
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