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Model
XE-A202
Pages
27
Size
11.83 MB
Type
PDF
Document
Service Manual
Brand
Device
ECR / Service Manual
File
xe-a202.pdf
Date

Sharp XE-A202 Service Manual ▷ View online

XE-A202V
HARDWARE DESCRIPTION
– 8 –
3. CLOCK GENERATOR
1) CPU
Two oscillators are connected to the CPU.
The basic clock X2 is supplied from a 12MHz oscillator.
If the CPU was not operating properly, the signal does not appear on
this line in most cases.
The sub-clock X1 generates 32.768KHz which is primarily used to
update the internal RTC (real time clock).
During the standby mode, it keeps oscillating to update the clock and
monitoring the power recovery.
4. RESET CIRCUIT
(1) When the mode switch is placed in the “SRV” position, the reset sig-
nal is sent to the CPU to reset the hardware.
(2) When VDD 
t
 2.8V, a reset signal is outputted from the reset IC.  (S-
80928ANMP)
5. P-OFF CIRCUIT
53
A17
A17
Out
Address bus :17
54
A16
A16
Out
Address bus :16
55
A15
A15
Out
Address bus :15
56
A14
A14
Out
Address bus :14
57
A13
A13
Out
Address bus :13
58
A12
A12
Out
Address bus :12
59
A11
A11
Out
Address bus :11
60
A10
A10
Out
Address bus :10
61
A9
A9
Out
Address bus :9
62
VCC
VDD
In
VDD
63
A8
A8
Out
Address bus :8
64
VSS
VSS
In
VSS
65
A7
A7
Out
Address bus :7
66
A6
A6
Out
Address bus :6
67
A5
A5
Out
Address bus :5
68
A4
A4
Out
Address bus :4
69
A3
A3
Out
Address bus :3
70
A2
A2
Out
Address bus :2
71
A1
A1
Out
Address bus :1
72
A0
A0
Out
Address bus :0
73
P17
ENA2
Out
Paper feed motor :ENA2
74
P16
ENA1
Out
Paper feed motor :ENA1
75
P15
IN2
Out
Paper feed motor :IN2
76
P14
IN1
Out
Paper feed motor :IN1
77
P13
P13
Out
Key/Display
78
P12
P12
Out
Key/Display
79
P11
P11
Out
Key/Display
80
P10
P10
Out
Key/Display
81
D7
D7
InOut
Data bus :7
82
D6
D6
InOut
Data bus :6
83
D5
D5
InOut
Data bus :5
84
D4
D4
InOut
Data bus :4
85
D3
D3
InOut
Data bus :3
86
D2
D2
InOut
Data bus :2
87
D1
D1
InOut
Data bus :1
88
D0
D0
InOut
Data bus :0
89
AN7
STB1
Out
Printer head strobe
90
AN6
LATCH
Out
Printer data latch
91
AN5
P105
Out
Printer head voltage ON
92
AN4
P104
Out
CG ROM Bank
93
AN3
P103
In
VBAT
94
AN2
Vref
In
NU Vret
95
AN1
P101
In
P r i n t e r   h e a d   v o l t a g e
check
96
AVSS
VSS
In
VSS
97
AN0
TH
In
Print head temperature check
98
VREF
VDD
In
VDD
99
AVCC
VDD
In
VDD
100
SIN4
P97
In
Key IN
Pin 
No.
SYMBOL
SIGNAL
NAME
In/
Out
Function
11
10
27P
C
CPU
XIN
       X1
32.768KHz
13
18P
C
15
XOUT
XCOUT
XCIN
R
330
12MHz
33
IC7
FS781
3.3K
220pF
12MHz
CPU
R
/RESET
C
MODE SWITCH
SRV' position
VDD
11
R
C
VDD
IC
S-80928ANMP
R
VCC
VLED
R15
2.7K
R16
9.1KG
R20
2.7K
/POFF
C15
0.1uF
  5
  6
7
8
4
IC4B
BA10393
P-OFF
ZD4
MTZJ5.1B
R19
56K
  3
  2
1
8
4
IC4A
BA10393
R17
0
R18
3.9K
C14
1uF/50V
XE-A202V
HARDWARE DESCRIPTION
– 9 –
The P-OFF signal detects two signals by two comparators and sent to
the CPU.
V0 (24V) signal: If the power voltage V0 (24V) falls bellow the specified
level, the P-OFF signal is driver to LOW by the com-
parator ICAA.
VLED signal:
If the LED/Logic power voltage VLED falls below the
specified level, the P-OFF signal is driven to LOW by
the comparator IC4B.
6. MEMORY CIRCUIT
1) Address map
2) RAM control
7. PRINTER CONTROL CIRCUIT
1) Paper feed motor circuit
Stepping motor control
The 2-phase, bi-polar stepping motor is driven at a constant voltage by
LB1838M (made by SANYO).
1 step:  0.087mm
1 dot:  2 steps
CPU port
Drive step
2) Print circuit
Thermal head configuration 
As shown in the equivalent circuit in the figure, thermal head consists of
heating elements and head drivers which drives and controls those
heating elements.
The serial print data input through the DATA IN (D1) is transferred to
the shift register synchronizing with the CLOCK (CP) and stored in the
latch register by the LATCH (LA) signal.
The head conduction signals (print commands 1 ~ 6) turn the gate on to
conduct the heating element corresponding to the print data.
Segment latch address
00000h
00400h
05400h
06000h
08000h
40000h
28000h
C0000h
FFFFFh
CPU internal RAM
20kbytes
External S-RAM : 128kbytes
(128kbytes area)
CPU internal ROM
256kbytes
/CS2 area
08000h - 27FFFh
/CS3 area
06000h - 07FFFh
CPU
S-RAM
128K byte
IC
A0-A16
D0-7
A0-A16
A0-A16
D0-7
I/O0-7
/CS2
/CS2
/CS1
/RD
/RD
/WR
/WE
/WR
/OE
Power supply circuit
or
Dry battery
VDD
VCC
VDD
VCC
VCC
CS2
0.1M
11
10K
10K
150pF
10K
No.
CPU port
Signal used
76
P14
IN1
75
P15
IN2
74
P16
ENA1
73
P17
ENA2
Driver IC input
(CPU output)
Motor drive signal
STEP
IN1
IN2
ENA1
ENA2
A
(OUT1)
B
(OUT3)
/A
(OUT2)
/B
(OUT4)
1
L
L
H
H
H
H
L
L
2
H
L
H
H
L
H
H
L
3
H
H
H
H
L
L
H
H
4
L
H
H
H
H
L
L
H
CPU
IC13
VH
/A
A
B
/B
VCC
LB1838M
MOTOR
10uF/50V
P14
P15
P16
P17
XE-A202V
HARDWARE DESCRIPTION
– 10 –
Thermal head block daigram
Thermal head strobe terminals
8. PAPER TAKE UP MOTOR DRIVE CIRCUIT
When the MOTOR signal from the CPU is HIGH, Q1 is turned on to
operate the motor.
9. DRAWER DRIVE CIRCUIT
When the DR1 signal from the CPU is HIGH, Q9 is turned on to operate
the solenoid.
10. BUZZER DRIVE CIRCUIT
When the pulse signal (about 4KHz) is generated from the CPU, the
buzzer sounds.
11. KEYBOARD CIRCUIT
Four P10-13 signals from the CPU are converted into 16 strobe signals by two 74HC138 for use in various functions.
STB No.
Dot No.
 Number of dots
1
1 ~ 144
144
2
145 ~ 288
144
STB1
11
VP
GND
9,10,14,15
STB2
13
LAT
7
CLK
16
DAT
17
VCC
12
Latch register
Shift register
5,6,18,19
Dot #1
Dot #288
Connector
CPU
TA4IN/U
MOTOR
Q13
R101
CN5
MOTOR
VH
C79
(21pin)
25D2212
1K
N.U.
M
Q9
R102
C80
FB2
DR1
CPU
/RTS0
(38pin)
FB2, FB3: Jumper Wire
1K
DIA
IN4002
CN6
FB3
0.1u
V0
F6
T400mA/250V
2SD2212
CPU
TA4OUT/U
22pin
470
R86
BZ
BZ
CPU
P10-13
P92-97
Key
Matrix
Head up
sensor
HC138
P10-13
P10-13
/S8-9
/S0-7
/S0-9
P92-97
Mode
Switch
/S0-7
/S0-9
P91
Paper
feed key
/S1
Paper end
sensor
/S3
/S4
RS232
/CI
signal
/S9
P91
Front
display
74HC374
a,b,c,d,e,f,g,dp
/CS3
Pop-up
display
G1',G2',
G3'G4',G5',
G6',G7
/S0 - 9
A',B',C',D',E',F',G',DP'
D0-7
D0-7
/CS3
P90
HC138
XE-A202V
HARDWARE DESCRIPTION
– 11 –
1) Keyboard
Scan signal:
10 /S0-9 signals 
Return signal:
6 P92-97 signals 
The keys are read by the key matrix following the above signals. 
2) Mode switch 
Scan signal:
8 /S0-7 signals 
Return signal:
1 P90 signal 
The positions are read by the above signals. 
3) Paper feed key 
Scan signal:
1 /S1 signal 
Return signal:
1 P91 signal 
The paper feed key is read by the above signals.
4) Head up sensor 
Scan signal:
1 /S3 signal 
Return signal:
1 P91 signal 
The Head up sensor state is read by the above signals.
5) Paper end sensor
Scan signal:
1 /S4 signal
Return signal:
1 P91 signal
The paper end sensor state is read by the above signals.
6) RS232/CI signal detection
Scan signal:
1 /S9 signal
Return signal:
1 P91 signal
The RS232/CI signal is detected by the above signals.
7) Display
Scan signal:
10 /S0-9 signals
The above 10 scan signals are used as the following digit signals.
Digit signal:
Segment signal :
Segment signals: a, b, c, d, e, f, g, and DP are output
by the IC:74HC374, using the data bus signal:D0-7
from the CPU as an input signal and the chip select
signal:/CS3 as a latch signal.
12. RS232 CIRCUIT
The signals from the CPU are converted by the HIN211 into the RS232 level to input and output them.
Scan
signal
/S0
/S1
/S2
/S3
/S4
/S5
/S6
/S7
Mode
switch
position
(SRV)
PGM
p
OPX/Z
REG
MGR
X1/Z1
X2/Z2
Head up sensor
Head up detected
Head up not detected
P91
Low
High
Receipt near end sensor
End detected
End not detected
P91
Low
High
RS232 /CI signal
/CI signal detected
/CI signal not detected
P91
Low
High
Scan signal
/S0
/S1
/S2
/S3
/S4
/S5
/S6
/S7
/S8
/S9
Digit signal:
Front
G1’
G2’
G3’
G4’
G5’
G6’
G7’
G8’
G9’
G10’
Digit signal:
Pop-up
G1’
G2’
G3’
G4’
G5’
G6’
G7’
CPU
HIN211
1
D-SUB 9pin connector
2
3
4
5
6
7
8
9
CD
RD
SD
ER
GND
DR
RS
CS
CI
R1IN
R2IN
T3OUT
T2OUT
R4IN
R5IN
T1OUT
R3IN
R1OUT
R2OUT
T3IN
R4OUT
T2IN
T1IN
R5OUT
R3OUT
P75
P66
P77
P67
P74
P64
P91
P76
CD
RD
SD
ER
DR
RS
CI
/S9
CS
D16
Q14
IC14
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