Sharp UP-800 (serv.man25) Service Manual ▷ View online
UP-800F/810F (V)
CIRCUIT DIAGRAM
9 – 11
Sub PWB CN(MAIN-Sub)
Sub PWB CN(INVERT
OR)
INVERTER
CKDC POR
T
1 Vin 8V-12V
2 EN High Active
3 Vadj max3.0V
4 GND
FPGA GPIO
2
7
FGPA
DRAWER
modified 07,05,11
1-2 SHO
R
T
INV_V
ADJ
INV_V
ADJ
INVPON
IO_WE1#
IO_A15
CS2-1
CS2-2
IO_D2
IO_D10
IO_RD#
IO_A16
IO_D3
IO_D1
1
IO_RD/WR#
IO_A17
IO_D4
IO_D14
IO_D15
IO_D12
IO_D13
IO_A19
IO_A20
IO_A21
IO_A18
CS2-1#
CS2-2#
IO_A14
IO_D5
IO_A2
IO_A3
IO_A4
IO_A1
IO_D6
IO_WE0#
IO_A6
IO_A7
IO_A8
IO_A5
IO_WE1#
IO_D7
IO_A10
IO_A1
1
IO_A12
IO_A9
IO_D0
IO_D8
IO_A13
IO_D1
IO_D9
CKDC_P01
CKDC_P03
CKDC_P00
CKDC_P02
INVPON
CS2-1#
CS2-2#
IO_A14
IO_A4
IO_A1
1
IO_A2
IO_A8
IO_A10
IO_A16
IO_A18
IO_A13
IO_A20
IO_A17
IO_A6
IO_A15
IO_A3
IO_A9
IO_A7
IO_A19
IO_A12
IO_A1
IO_A5
IO_RD/WR#
IO_WE1#
IO_A21
IO_D1
IO_D8
IO_D6
IO_D7
IO_D0
IO_D2
IO_D4
IO_D5
IO_D9
IO_D15
IO_D14
IO_D13
IO_D3
IO_D1
1
IO_D10
IO_D12
IO_WE0#
CKDC_P03
CKDC_P02
CKDC_P01
CKDC_P00
INVPON
FPGA_DR
WSNS
DR
WSNS
12
V
DACK1
FPGAINT#
CS4#
CPU_PLA
TCH#
CPU_HT
E
M
P
CPU_PSO
CPU_PCLK
IO_RD#
PCS#
FPGACS#
EFTCS#
SDCS#
SDRXD
SDTXD
SDCLK
SDDTCT
#
SDWP#
SDPOWER#
CKDC_STH
CKDC_SCK
CKDC_HTS
CKDC_ST
OP#
CKDC_SHEN#
IO_A[1:21]
POFF#
VCPWC
A0
IO_WE1#
IO_WE0#
MCRINT
3
RES
E
T
#
FPGA_OE
#
FPGA_WE#
FPGA_CE#
FLASH_RESE
T
#
BYTE#
3.3VL
3.3V
3.3VC
DCK
IO_D[0:15]
3.3VB
CPU_VPRNT
5V
3.3V
5V
12
V
5V
INVGND
3.3VB
3.3VB
3.3VB
3.3V
MAIN_GND
3.3V
3.3VL
3.3VC
3.3VB
3.3V
R25
10K
J1
53493-1078(mole
x)
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
97
99
96
98
100
C247
0.1uF
2
1
R26
10
K
SP1
0
SHOR
T
PIN & SOCKET
1
3
2
R387
10
K
CN20B
AAA-DDR-081-K02(lotes)
149
138
137
126
125
104
103
90
88
87
76
75
64
63
52
51
40
39
28
27
16
15
4
3
1
2
9
10
21
22
33
34
45
46
57
58
69
70
81
82
92
93
94
11
3
11
4
131
132
143
144
155
156
167
168
179
180
191
192
197
38
150
159
161
162
173
174
185
186
36
157
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
R12
10
K
R21
1
0
K
R3
(4.7K)
C192
0.1uF
C248
1000pF
2
1
C16
0.1uF
R23
10K
C14
100pF
R13
10
K
R57
10
R17
10K
C18
1000pF
R14
10
K
C245
1000pF
2
1
R1
1
10
K
R8
(10K
)
R2
(10K
)
C246
1000pF
2
1
C243
0.1uF
2
1
+
-
IC4B
B
A
1
0358
5
6
7
8
4
+
C10
47uF/16V
1
2
C17
100pF
J2
53047-0410(MOLEX
)
1
2
3
4
+
C8
47uF/16V
1
2
R27
10
K
R10
0
R18
10
K
R5
(10K
)
R20
0
R388
10
K
C1
1
0.1uF
R6
(10K
)
+
-
IC4A
B
A
1
0358
3
2
1
8
4
R22
10
K
R7
(10K
)
R19
20
K
+
C13
100uF/16V
1
2
R9
(10
K
)
C9
0.1uF
CN20A
AAA-DDR-081-K02(lotes)
5
7
13
17
6
8
14
18
19
23
29
31
20
24
30
32
41
43
49
53
42
44
50
54
55
59
65
67
56
60
66
68
127
129
135
139
128
130
136
140
141
145
151
153
142
146
152
154
163
165
171
175
164
166
172
176
177
181
187
189
178
182
188
190
11
2
111
11
0
109
108
107
106
105
102
101
11
5
100
99
97
35
37
71
73
79
83
72
74
80
84
12
26
48
62
134
148
170
184
78
96
95
85
86
89
91
160
158
11
7
11
6
98
194
196
198
193
195
11
8
120
11
9
121
122
123
124
200
11
25
47
61
133
147
169
183
199
77
DQ00
DQ01
DQ02
DQ03
DQ04
DQ05
DQ06
DQ07
DQ08
DQ09
DQ10
DQ1
1
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A1
1
A12
RFU
CK0
CK0#
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
CKE0
CKE1
RFU
RFU/RESET
CK2
CK2
CK1
CK1#
BA0
BA1
RFU
SA0
SA1
SA2
SDA
SDL
RAS#
CAS#
WE#
S0#
S1#
RFU/A13
RFU
RFU
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
VddID
DQS8
C244
0.1uF
2
1
R16
0
R15
(1
0
0K)
R24
10
K
C12
0.1uF
FB2
CIB32P600NE
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
2/18
CONNECT (CPU/SUB-PWB)
UP-800F/810F (V)
CIRCUIT DIAGRAM
9 – 12
#2
#11
#15 (#3)
#13
#4
WP
#3
#6
7Pin : GND
#7
G:6pin
14Pin : 3.3V
S
SD Card
Pin Layout
D:2,3,4,5pin
#5
CDS
#8
#10
#9
S:1pin
COMMON
#16 (#4)
CPU
Sub PWB SDCARD
#14
GND
#12
GND
#1
SD_CLK
SD_T
X
D
SDPOWER#
SD_RXD
SDPOWER#
SD_CS
SDWP#
SDDTCT#
SDWP#
SDDTCT#
SDCLK
3
SDPOWER#
3
3
SDT
X
D
3
SDPOWER#
3
3
SDPOWER#
3
3
SDCS#
3
SDRXD
3
SDDTCT#
SDWP#
3
3.3V
17
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
R32
10K
R36
100K
C19
1uF
R29
51
R38
3
3
IC5B
74L
V125APW
5
6
14
4
7
C21
10pF
CN5
ALPS SCDA4A0200
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CS
DI
VSS
VDD
SCLK
VSS2
DO
RSV
RSV
CD
COM
WP
GND
GND
3
4
R39
3
3
R30
100K
IC5D
74L
V125APW
12
11
14
13
7
C23
10pF
IC5C
74L
V125APW
9
8
14
10
10
7
R37
100K
R34
100K
IC5A
74L
V125APW
2
3
14
1
7
+
C20 1uF/50V
1
2
C25
0.1uF
C24
10pF
R28
10K
R35
100K
Q1
HA
T1089C
6
2
1
3
4
5
C22
10pF
R31
10K
R33
100
K
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
3/18
SD-CARD
UP-800F/810F (V)
CIRCUIT DIAGRAM
9 – 13
JTAG
Conn
ector i2.5V j
3-2Low
1-2High
FPGA Host & ROM i/f
Serial i/f (3/3)
to MCR CN
to JTAG CN
FPGA mode
FPGA Reset
Serial i/f (2/3)
TO CPU PWB
TO CPU PWB
2-3 SHORT SERI
A
L M
A
STER
1-2 SHORT BPI
& ADDRESS D
E
C
L
. M
O
D
E
SERIAL
FLASH MEMOR
Y&JT
AG CON : NOT MOUNT
1-2 SHOR
T
TDO
TM
S
IO_A21
IO_A20
IO_A19
IO_A18
IO_A17
IO_A16
IO_A15
IO_A14
IO_A13
IO_A12
IO_A1
1
IO_A10
IO_A9
IO_A8
IO_A7
IO_A6
IO_A5
IO_A4
IO_A3
IO_A2
IO_A1
TM
S
INIT_B
TM
S
TCK
INIT_B
IO_D0
DONE
TDO
IO_A21
IO_A20
IO_A19
IO_A18
IO_A17
FPGA_M1
FPGA_M0
FPGA_M2
IO_D6
IO_D1
IO_D0
IO_D7
IO_D5
IO_D3
IO_D2
IO_D15
IO_D4
KRQ#
LANINT#
FPGA_M2
FPGA_M1
FPGA_M0
IO_D15
CCLK
TDI
TCK
FPGA_RCP3#
FPGA_RCP2#
FPGA_RCP1#
FPGA_CLS3#
FPGA_CLS2#
FPGA_CLS1#
FPGA_RDD3#
FPGA_RDD2#
IO_A[1:21]
BYTE#
MS-FLASH_TDI
DONE
RESET#
FPGA_Ri3
FPGA_Ri2
FPGA_Ri1
FPGA_Ri4
FPGA_Ri5
FPGA_RCVDT3#
FPGA_RCVDT2#
FPGA_RCVDT1#
FPGA_RCVDT4#
FPGA_RCVDT5#
IO_D[0:15]
FPGA_OE#
FPGA_WE#
FPGA_CE#
KRQ#
LANINT#
FPGACS#
IO_RD#
IO_WE0#
FPGAINT#
A0
CKDC_SHEN#
2.5V
1.2V
3.3V
MCRINT
3
PROG_B
3.3V
2.5V
2.5V
1.2V
3.3V
3.3V
2.5V
1.2V
3.3V
2.5V
3.3V
3.3V
2.5V
3.3V
1.2V
3.3V
2.5V
1.2V
3.3V
2.5V
2.5V
3.3V
3.3V
C6
100pF
C33
0.1uF
R46
10K
IC6B
SN74L
V00APW
4
5
6
R60
0
R274
1
k
R53
0
C5
0.1uF
U1-2
XC3S25
0
E
-P
Q
2
0
8
54
55
56
57
58
60
61
63
74
75
76
77
78
80
81
82
83
84
86
87
90
93
94
96
97
99
100
101
102
103
104
53
59
62
64
65
66
67
68
69
70
71
72
73
79
85
88
89
91
92
95
98
CS5#
CSO_B
INIT_B
WR#
RD#
BUSY
CSI_B
RESET#
D7
D6
D5
D4
D3
RDWR_B
M2
D2
D1
M1
M0
D0
FIRQ#
A23
A22
A21
A20
A19
A18
EXINT4#
A17
CCLK
DONE
GND
VCCO
RI5
RI4
RI3
VCCAUX
VCCINT
RI2
RI1
GND
N.U.(INPUT)
N.U.(INPUT)
VCCO
GND
GND
VCCO
N.U.( I/O )
N.U.(INPUT)
VCCAUX
GND
N.U.( I/O )
R133
100
IC6A
SN74L
V00APW
1
2
3
14
7
U2
(XCF02S(TS
S
O
P
))
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
D0
(NC)
CLK
TDI
TMS
TCK
CF#
OE/RESET#
(NC)
CE#
GND
(NC)
CEO#
(NC)
(NC)
(NC)
TDO
VCCINT
VCCO
VCCJ
U1-1
XC3S25
0
E
-P
Q
2
0
8
106
107
108
109
11
0
11
2
11
3
11
5
11
6
11
9
120
122
123
124
126
127
128
129
130
132
133
134
135
136
137
138
139
140
142
144
145
146
147
148
150
151
152
153
154
155
105
111
11
4
11
7
11
8
121
125
131
141
143
149
156
A16
A15
A14
A13
EXINT3#
EXINT2#
EXINT1#
RCVDT5#
RCVDT4#
A12
A1
1
RCVDT3#
RCVDT2#
RCVDT1#
A10
A9
A8
A7
CLS3
A6
A5
A4
A3
RCP3
A2
A1
RDD3
A0
CLS2
RCP2
RDD2
MCRINT_N#
MCRINT
CLS1
HDC
LDC0
LDC1
LDC2
RCP1
TMS
GND
VCCAUX
VCCO
VCCINT
FPGA_A0
GND
VCCO
GND
GND
VCCO
VCCAUX
GND
R42
1
0
K
C29
0.1uF
R50
4
.7K
SP2
1-2 SHOR
T
1
3
2
R40
1
0
K
SP1
SHOR
T
PIN & SOCKET
1
3
2
C195
100pF
R41
1
0
K
(8
7831-14(M
O
LEX
))
CN6
14
12
10
8
6
4
2
13
11
9
7
5
3
1
NC
NC
TDI
TDO
TCK
TMS
VREF
GND
GND
GND
GND(CUT)
GND
GND
GND
C30
0.1uF
R51
4
.7K
R58
4
.7K
R55
0
D40
1SR159-200
1
2
R44
10K
C27
0.1uF
R49
10K
R48
10K
R59
4
.7K
C35
0.1uF
C31
10uF/10V
R45
10K
C32
0.1uF
C34
0.1uF
R47
3
3
R56
330
R43
1
0
K
R54
0
C28
10uF/10V
R52
0
C26
0.1uF
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
4/18
FPGA-1 (R
OM,HOST
-I/F)
UP-800F/810F (V)
CIRCUIT DIAGRAM
9 – 14
to JTAG CN
GPIO & Serial i/f
FPGA
to MCR i/f CN
Serial i/f (3/3)
cf. FPGA-section2
Serial i/f
(2/3)
cf. FPGA-section1
Serial i/f
(1/3)
DTC123EKA
3
1
2 BE
C
FPGA_SIN1
RMOT
OFF
JMOTCUP
RMOTCUP
PSENSON
FPGA_SIN2
FPGA_SIN3
FPGA_SIN4
FPGA_SIN5
GPIO14
GPIO15
GPIO16
GPIO28
GPIO30
GPIO29
GPIO31
GPIO32
GPIO14
GPIO15
GPIO16
GPIO28
JPES#
RPES#
STRB1#
STRB2#
STRB3#
STRB4#
ACUT1
ACUT2
JAS/MSTEP1
JDS/MSTEP2
RAS/MSTEP3
RDS/MSTEP4
JMOTCUP
RMOTCUP
VHCOM
PSENSON
INVPON
JMOT
OFF
RMOT
OFF
GPIO32
GPIO31
GPIO29
GPIO30
JMOT
OFF
JPES#
RPES#
STRB1#
STRB2#
STRB3#
STRB4#
TCK
MS-FLASH_TDI
TDI
FPGA_RDD1#
DCK
FPGA_DTR1
FPGA_SIN1
FPGA_SOUT1
FPGA_DSR1
FPGA_CTS1
FPGA_DCD1
FPGA_R
TS1
FPGA_DTR2
FPGA_SIN2
FPGA_SOUT2
FPGA_DSR2
FPGA_CTS2
FPGA_DCD2
FPGA_R
TS2
FPGA_DTR3
FPGA_SIN3
FPGA_SOUT3
FPGA_DSR3
FPGA_CTS3
FPGA_DCD3
FPGA_R
TS3
FPGA_DTR4
FPGA_SIN4
FPGA_SOUT4
FPGA_DSR4
FPGA_CTS4
FPGA_DCD4
FPGA_R
TS4
FPGA_DTR5
FPGA_SIN5
FPGA_SOUT5
FPGA_DSR5
FPGA_CTS5
FPGA_DCD5
FPGA_R
TS5
FPGA_RCVDT4#
FPGA_RCVDT5#
FPGA_RCVDT1#
FPGA_RCVDT2#
FPGA_RCVDT3#
CKDC_SRES#
DRA
W
ER1
DRA
W
ER2
JAS/MSTEP1
JDS/MSTEP2
RAS/MSTEP3
RDS/MSTEP4
PHUPS
ACUTSW
FPGA_DR
W
SNS
VHCOM
ACUT1
ACUT2
INVPON
FLASH_RESET#
3.3V
3.3V
1.2V
2.5V
PROG_B
2.5V
1.2V
3.3V
2.5V
2.5V
1.2V
3.3V
3.3V
1.2V
3.3V
2.5V
1.2V
3.3V
2.5V
3.3V
3.3V
3.3V
3.3V
R82
1
0
K
C42
0.1uF
R86
1
0
K
R101
10
K
R105
(10K)
R74
4.7K
R80
1
0
K
Q3
DTC123EKA
2
1
3
R92
10
K
IC6C
SN74L
V00APW
9
10
8
C40
0.1uF
C7
100pF
R106
10
K
R107
10K
R273
0(UP-810F)
R73
4.7K
C41
0.1uF
R69
0
R79
1
0
K
U1-4
XC3S25
0
E
-P
Q
2
0
8
157
158
159
161
162
163
164
165
167
168
169
171
172
174
175
177
178
179
180
181
183
184
185
186
187
189
190
192
193
194
196
197
199
200
202
203
204
205
206
207
160
166
170
173
176
182
188
191
195
198
201
208
TDO
TCK
RDD1
DCD5
RT
S
5
CTS5
DSR5
SIN5
DTR5
SOUT5
CTS4
RT
S
4
DCD4
DSR4
SIN4
CLK
DTR4
SOUT4
DCD3
RT
S
3
DSR3
SIN3
DTR3
SOUT3
DCD2
RT
S
2
CTS2
DTR2
DSR2
SIN2
SOUT2
DCD1
RT
S
1
CTS1
DTR1
DSR1
SIN1
SOUT1
HSW
A
P
TDI
CTS3
VCCAUX
VCCINT
GND
VCCO
GND
GND
VCCO
VCCAUX
GND
VCCO
GND
R99
10
K
R77
0
R104
10
K
R67
10K
Q2
DTC123EKA
2
1
3
R66
10K
R75
(4.7K)
R85
1
0
K
R81
1
0
K
R94
10
K
R68
10K
R83
1
0
K
R71
10K
R272
0(UP-800F)
R100
10
K
R270
0(UP-820N)
R97
1
0
K
R89
10
K
C39
0.1uF
U1-3
XC3S25
0
E
-P
Q
2
0
8
1
2
3
4
5
8
9
11
12
15
16
18
19
22
23
24
25
28
29
30
31
33
34
35
36
39
40
41
42
47
48
49
50
6
7
10
13
14
17
20
21
26
27
32
37
38
43
44
45
46
51
52
PROG_B
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO1
1
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
N.U.(INPUT)
VCCAUX
GND
VCCINT
N.U.(INPUT)
GND
N.U.(INPUT)
VCCO
N.U.(INPUT)
GND
N.U.(INPUT)
GND
VCCO
N.U.(INPUT)
VCCAUX
N.U.( I/O )
VCCO
N.U.(INPUT)
GND
R95
10
K
C37
0.1uF
R84
1
0
K
R90
1
0
K
R93
1
0
K
R63
10K
R91
1
0
K
R271
0(UP-820F)
C36
0.1uF
R96
(10K)
C15
100pF
R103
10
K
R76
0
C38
10uF/10V
R72
0
R88
1
0
K
R98
10K
R102
10
K
R65
10K
R78
0
IC6D
SN74L
V00APW
12
13
11
R64
10K
R87
1
0
K
R70
10K
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
5/18
FPGA-2 (GPIO
,SERIAL-I/F)
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