Sharp UP-800 (serv.man19) Service Manual ▷ View online
UP-820N/820F (V)
CIRCUIT DIAGRAM
10 – 17
INVERTER
Sub PWB to KEY
IF
CKDC3V
or 7616-6002PL(3M)
modified 07,05,11
modified 07,05,11
modified 07,05,11
CKDC3_P63
CKDC3_SC
CKDC3_RESET#
CKDC3_P33
CKDC3_SDP
RESET3V
CKDC3_X2
CKDC3_P60
BUZZ
CKDC3_SD
CKDC3_P13
CKDC_KR1
CKDC3_X2
CKDC_KR3
CKDC3_FLMD0
CKDC3_P16
CKDC3_RESET#
CKDC3_P62
CKDC3_SE
CKDC_KR0
CKDC3_P33
CKDC3_SA
CKDC_P01
CKDC_KR2
CKDC3_ST2
CKDC3_P61
KEX
0
CKDC3_P1
1
CKDC3_SF
CKDC3_FLMD0
CKDC3_X1
CKDC3_SB
CKDC3_P14
CKDC_P02
CKDC_P03
KEX
1
CKDC3_P12
CKDC3_SG
CKDC3_P15
CKDC3_X1
CKDC_P00
CKDC3_P10
CKDC3_ST1
CKDC3_ST0
CKDC3_ST3
CKDC3_HTS
CKDC3_SCK
CKDC3_STH
CKDC3_KRQ#
CKDC3_ST
OP#
CKDC3_SHEN#
CKDC3_SRES#
CKDC3_P14
CKDC3_P13
CKDCDB_TXD
CKDCDB_RXD
CKDC3_SDP
CKDC3_SG
CKDC3_SF
CKDC3_SE
CKDC3_SD
CKDC3_SC
CKDC3_SB
CKDC3_SA
CKDC5_RESET
RESET3V
RESET3V
CKDC5_SF
CKDC_KR1#
CKDC5_SD
CKDC_KR0#
ST
1
CKDC_KR3#
CKDC_P00
ST
2
CKDC5_SB
CKDC5_SDP
CKDC_P03
ST
0
KEX
1
CKDC5_SA
CKDC_P01
CKDC_KR2#
KEX
0
CKDC_P02
CKDC5_SE
ST
3
CKDC5_SG
CFSR#
CKDC5_SC
POFF#
CKDC3_SCK
CKDC3_STH
CKDC3_HTS
CKDC3_KRQ#
CKDC3_ST
OP#
CKDC3_SHEN#
CKDC3_SRES#
5V
3.3V
CKDC5_SDP
CKDC5_SG
CKDC5_SF
CKDC5_SE
CKDC5_SD
CKDC5_SC
CKDC5_SB
CKDC5_SA
MODR#
CKDC5_RESET
3.3VB
BUZZ
3.3V
3.3V
3.3V
3.3VB
3.3VB
3.3V
5V
5V
3.3VB
3.3V
3.3V
J4
HIF3FC-16P
A-2.54DS(HIROSE)
2
4
6
8
10
12
14
16
1
3
5
7
9
11
13
15
R208
(10K)
R159
47
K
R203
0
R198
10
K
R186
(10K
)
R176
0
+
C97
10uF/50V
1
2
R162
(10K
)
IC1
1
74HCT541APW
1
2
3
4
5
6
7
9
10
8
20
19
18
17
15
16
14
13
12
11
OE1#
A1
A2
A3
A4
A5
A6
A8
GND
A7
VCC
OE2#
Y1
Y2
Y4
Y3
Y5
Y6
Y7
Y8
R178
0
IC10
UPD78KF0521GB-UET
-A
LQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
41
42
43
44
45
46
47
48
49
50
51
52
P140
P120
P41
P40
RESET#
XT2
XT1
FLMD0
X1
X2
REGC
VSS
VDD
P60
P61
P62
P63
P33
P77
P76
P75
P74
P73
P72
P71
P70
P32
P31
P30
P17
P16
P15
P14
P13
P12/SO10
P1
1/SI10
P10/SCK10#
AV
R
E
F
AV
S
S
P27
P26
P25
P24
P23
P22
P21
P20
P26
P25
P24
P23
P22
P21
P20
P130
P03
P02
P01
P00
P02
P01
P00
C91
1uF
R188
47K
R204
47
K
R187
0
C99
1000pF
R181
0
C89
470pF
R180
0
R185
(10K
)
R167
47
K
R169
47K
R207
1K
R164
47K
C90
100pF
R197
(10K)
SW2
SW SLIDE
1
2
3
R196
0
RP1
1
0x4
3
2
1
4
5
6
7
8
R177
0
C200
(100pF)
R147
1K
R194
10
K
C94
1uF
C81
0.1uF
R170
(1M
)
C80
100pF
R193
0
R192
1
0
K
R184
(10K
)
R182
0
R172
10K
R210
(0)
R174
0
TP
2
C92
15pF
R189
47
K
R200
0
C95
0.1uF
R152
(10K
)
R21
1
1K
R195
10
K
R209
(10K
)
R205
(1K)
X4
32.768kHz
1
2
R201
0
R179
0
C93
18pF
R191
10
K
R190
47K
+
C96
(10uF/50V)
C98
0.1uF
R161
(10K
)
R165
47
K
R175
0
R158
47
K
R202
0
R199
10
K
R168
47
K
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
8/18
CKDC-2
UP-820N/820F (V)
CIRCUIT DIAGRAM
10 – 18
RS232 c
h3-4
Intersil ICL 3241
<RS232 ch4>
Intersil ICL 3241
<RS232 ch3>
FPGA
FPGA
RS1_SIN
RS1_RI#
RS1_R
TS#
RS1_DCD#
RS1_CTS#
RS2_DTR#
RS2_SIN
RS2_DSR#
RS2_SOUT
RS2_CTS#
RS2_DCD#
RS2_R
TS#
RS2_RI#
RS1_DTR#
RS1_DTR#
RS1_CTS#
RS1_RI#
RS1_DSR#
RS1_SIN
RS1_DSR#
RS1_SOUT
RS1_R
TS#
RS1_DCD#
RS1_SOUT
RS2_DSR#
RS2_DCD#
RS2_RI#
RS2_DTR#
RS2_SOUT
RS2_SIN
RS2_CTS#
RS2_R
TS#
FPGA_SIN1
FPGA_CTS2
FPGA_DCD2
FPGA_R
TS2
FPGA_R
TS1
FPGA_RI1
FPGA_RI2
FPGA_DCD1
FPGA_CTS1
FPGA_SOUT1
FPGA_DTR1
FPGA_DSR2
FPGA_DTR2
FPGA_DSR1
FPGA_SIN2
FPGA_SOUT2
3.3V
5V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
5V
GND-FRAME
GND-FRAME
+
C101 10uF/50V
1
2
R228
33
R225
3
3
FB4
(CIB32P600NE)
C1
18
100pF
R230
33
C1
15
0.1uF
CN9
RJ45
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
FGND
FGND
CN10
RJ45
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
FGND
FGND
C109
100pF
R229
3
3
SP6
SHOR
T
PIN & SOCKET
1
3
2
C1
10
100pF
C
111
0.1uF
C105
0.1uF
SP8
SHOR
T
PIN ONL
Y
1
3
2
C1
13
0.1uF
C106
100pF
R224
3
3
R227
33
C107
100pF
IC14
ICL3241ECA-1
28
24
1
2
14
13
12
21
19
18
17
16
15
23
25
26
27
3
9
10
11
20
4
5
6
7
8
22
C1+
C1-
C2+
C2-
T1in
T2in
T3in
R1outB
R1out
R2out
R3out
R4out
R5out
EN#
C
C
V
D
N
G
V+
V-
T1out
T2out
T3out
R2outB
R1in
R2in
R3in
R4in
R5in
SHDN#
C120
100pF
C100
0.1uF
+
C1
12
10uF/50V
1
2
C108
100pF
R223
3
3
FB5
(CIB32P600NE)
R226
(0)
C1
19
100pF
SP7
SHOR
T
PIN & SOCKET
1
3
2
IC15
ICL3241ECA-1
28
24
1
2
14
13
12
21
19
18
17
16
15
23
25
26
27
3
9
10
11
20
4
5
6
7
8
22
C1+
C1-
C2+
C2-
T1in
T2in
T3in
R1outB
R1out
R2out
R3out
R4out
R5out
EN#
C
C
V
D
N
G
V+
V-
T1out
T2out
T3out
R2outB
R1in
R2in
R3in
R4in
R5in
SHDN#
C102
0.1uF
C104
0.1uF
SP5
SHOR
T
PIN ONL
Y
1
3
2
R222
33
F1
T500mA/250V
C103
0.1uF
C1
17
100pF
R221
3
3
C121
100pF
C1
14
0.1uF
R220
(0)
R231
33
C1
16
0.1uF
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
9/18
RS232C DRIVER(CH3-CH4,RJ45)
UP-820N/820F (V)
CIRCUIT DIAGRAM
10 – 19
Intersil ICL 3241
RS232 c
h1-2
<RS232 ch1>
FPGA
<RS232 ch2>
FPGA
Intersil ICL 3241
EFTC#
RS3_DTR#
RS3_SIN
RS3_CTS#
RS3_R
TS#
RS3_RI#
RS3_DCD#
RS3_DSR#
RS3_SOUT
RS4_CTS#
RS4_SOUT
RS4_DCD#
RS4_SIN
RS4_DTR#
RS4_DSR#
RS4_R
TS#
RS4_RI#
FPGA_DSR4
FPGA_CTS4
FPGA_SIN4
FPGA_RI4
FPGA_DCD4
EFT_R
TS#
EFT_DTR#
EFT_SOUT
FPGA_SOUT4
FPGA_DTR4
FPGA_R
TS4
EFT_CTS#
EFT_SIN
EFT_DSR#
EFT_RI#
EFT_DCD#
FPGA_RI3
FPGA_SIN3
FPGA_SOUT3
FPGA_CTS3
FPGA_R
TS3
FPGA_DTR3
FPGA_DSR3
FPGA_DCD3
5V
3.3V
EFTC#
EFT_VCC
3.3V
3.3V
3.3V
3.3V
5V
EFT_VCC
5V
3.3V
3.3V
3.3V
GND-FRAME
GND-FRAME
C131
100pF
C130
100pF
C133
0.1uF
R235
3
3
R232
3
3
IC16
ICL3241ECA-1
28
24
1
2
14
13
12
21
19
18
17
16
15
23
25
26
27
3
9
10
11
20
4
5
6
7
8
22
C1+
C1-
C2+
C2-
T1in
T2in
T3in
R1outB
R1out
R2out
R3out
R4out
R5out
EN#
C
C
V
D
N
G
V+
V-
T1out
T2out
T3out
R2outB
R1in
R2in
R3in
R4in
R5in
SHDN#
R244
0
C140
100pF
R238
33
+
C123 10uF/50V
1
2
C124
0.1uF
C127
0.1uF
C122
0.1uF
R246
10K
C142
100pF
R248
10K
+
C134
10uF/50V
1
2
F2
T500mA/250V
C135
0.1uF
R247
0
C128
100pF
R62
0
R237
33
C132
100pF
R233
33
C129
100pF
IC17
ICL3241ECA-1
28
24
1
2
14
13
12
21
19
18
17
16
15
23
25
26
27
3
9
10
11
20
4
5
6
7
8
22
C1+
C1-
C2+
C2-
T1in
T2in
T3in
R1outB
R1out
R2out
R3out
R4out
R5out
EN#
C
C
V
D
N
G
V+
V-
T1out
T2out
T3out
R2outB
R1in
R2in
R3in
R4in
R5in
SHDN#
R250
0
IC18
SN74L
V157A
P
W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SELECT
1A
1B
1Y
2A
2B
2Y
GND
3Y
3B
3A
4Y
4B
4A
STROBE
VCC
C141
100pF
R234
3
3
C139
100pF
R240
33
SP9
SHOR
T
PIN & SOCKET
1
3
2
C136
0.1uF
CN13
RS232C CN(D-SUB 9Pin)
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
10
11
R251
4
7
K
R241
33
R249
0
C126
0.1uF
C125
0.1uF
C143
100pF
R243
0
C137
0.1uF
CN12
RS232C CN(D-SUB 9Pin)
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
10
11
R239
3
3
R242
0
R245
10
K
R236
3
3
C138
0.1uF
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
10/18
RS232C DRIVER(CH1-CH2)
UP-820N/820F (V)
CIRCUIT DIAGRAM
10 – 20
RS232 ch5(for 20DP)
Intersil ICL 3241
<RS232 ch5>
for 20DP
RJ45 for 20DP
FPGA
RT
S
5
DCD5
RI5
RS5_DTR#
CTS5
SIN5
RS5_SOUT
RS5_DSR#
DSR5
FPGA_DSR5
FPGA_DCD5
FPGA_CTS5
FPGA_DTR5
FPGA_SIN5
FPGA_SOUT5
FPGA_RI5
FPGA_R
TS5
3.3V
5V
3.3V
3.3V
3.3V
5V
GND-FRAME
IC19
ICL3241ECA-1
28
24
1
2
14
13
12
21
19
18
17
16
15
23
25
26
27
3
9
10
11
20
4
5
6
7
8
22
C1+
C1-
C2+
C2-
T1in
T2in
T3in
R1outB
R1out
R2out
R3out
R4out
R5out
EN#
C
C
V
D
N
G
V+
V-
T1out
T2out
T3out
R2outB
R1in
R2in
R3in
R4in
R5in
SHDN#
FB6
CIB32P600NE
R256
10K
F1
1
T1A/250V
C148
0.1uF
R255
10K
C144
0.1uF
+
C145 10uF/50V
1
2
C149
0.1uF
C150
1000pF
J5
RJ45
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
FGND
FGND
C146
0.1uF
TP
1
1
C147
0.1uF
R253
10K
R252
100
R254
10K
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
11/18
20DP I/F
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