Sharp XL-E80E (serv.man2) Service Manual ▷ View online
XL-E80E
8 – 3
IC601 VHINJM14558-1: Pre. Amp. (NJM14558)
V
INPUT
+ INPUT
V
OUTPUT
+
1
A
+
+
-
-
B
(Top View)
A OUTPUT
A-INPUT
A+INPUT
V
V
B OUTPUT
B-INPUT
B+INPUT
2
3
4
8
7
6
5
+
-
Figure 4 BLOCK DIAGRAM OF IC
XL-E80E
8 – 4
IC701 RH-iXA013SJZZ: System Microcomputer (IXA013SJ)
(RST
)
P27
(RMOUT
,TM0IO
)
P
10
(TM1IO
)
P
11
(TM2IO
)
P12
(TM3IO
)
P
13
(TM4IO
)
P
14
P15
(IRQ0
)
P20
(SENS,IRQ1
)
P21
(IRQ2
)
P22
(IRQ3
)
P23
(IRQ4
)
P24
P25
(SBO2
)
P
30
(SBI2
)
P
31
(SBT2
)
P32
P50
P51
P52
P53
P54
(DGT17
)
P67
(DGT16
)
P66
(DGT15
)
P65
(DGT14
)
P64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82 81
80
79
78
77
76
(TXD,SBO0 ) P00
(RXD,SBI0 ) P01
(SBT0 ) P02
(SBO1 ) P03
(SBI1 ) P04
(SBT1 ) P05
(BUZZER ) P06
VDD
OSC2
OSC1
OSC1
VSS
XI
XO
MMOD
VREF-
(AN0 ) PA0
(AN1 ) PA1
(AN2 ) PA2
(AN3 ) PA3
(AN4 ) PA4
(AN5 ) PA5
(AN6 ) PA6
(AN7 ) PA7
(AN1 ) PA1
(AN2 ) PA2
(AN3 ) PA3
(AN4 ) PA4
(AN5 ) PA5
(AN6 ) PA6
(AN7 ) PA7
VREF+
P07
P95 (
SEG18)
P96 (
SEG17)
P97 (
SEG16)
P80 (
SEG15)
P81 (
SEG14)
P82 (
SEG13)
P83 (
SEG12)
P84 (
SEG11)
P85 (
SEG10)
P86 (
SEG9)
P87 (
SEG8)
P70 (
SEG7/DGT0)
P71 (
SEG6/DGT1)
P72 (
SEG5/DGT2)
P73 (
SEG4/DGT3)
P74 (
SEG3/DGT4)
P75 (
SEG2/DGT5)
P76 (
SEG1/DGT6)
P77 (
SEG0/DGT7)
P40 (
DGT8)
P41 (
DGT9)
P60 (
DGT10)
P61 (
DGT11)
P62 (
DGT12)
P63 (
DGT13)
VPP
PD0
(
SEG42)
PD1
(
SEG41)
PD2
(
SEG40)
PD3
(
SEG39)
PD4
(
SEG38)
PD5
(
SEG37)
PD6
(
SEG36)
PD7
(
SEG35)
PB0
(
SEG34)
PB1
(
SEG33)
PB2
(
SEG32)
PB3
(
SEG31)
PB4
(
SEG30)
PB5
(
SEG29)
PB6
(
SEG28)
PB7
(
SEG27)
PC0
(
SEG26)
PC1
(
SEG25)
PC2
(
SEG24)
P90
(
SEG23)
P91
(
SEG22)
P92
(
SEG21)
P93
(
SEG20)
P94
(
SEG19)
M N 1 0 1 C 2 3 D / 3 5 D
CPU
MN101C00
FL
PORT
0
PORT
8
PORT
9
PORT
B
PORT
C
PORT
D
P
ORT
7
PORT
6
PORT
3
P
ORT
2
PORT
1
SUB CLOCK
OSCILLATOR
8bit TIMER0
8bit TIMER1
8bit TIMER2
8bit TIMER3
8bit TIMER4
8bit TIMER4
TIME BASE TIMER5
SERIAL INTERFACE1
SERIAL INTERFACE2
WATCH DOG TIMER
DATA AUTO TRANSMISSION
A/D CONVERTER
OUTSIDE INTERRUPT
PORT 4
PORT A
PORT 5
SERIAL INTERFACE0
SYSTEM CLOCK
OSCILLATOR
ROM
64Kbyte
RAM
2Kbyte
TXD,SBO0,P00
RXD,SBI0,P01
SBT0,P02
SBO1,P03
SBI1,P04
SBT1,P05
BUZZER,P06
RMOUT,TM0IO,P10
TM1IO,P11
TM2IO,P12
TM3IO,P13
TM4IO,P14
SBO2,P30
SBI2,P31
SBT2,P32
P07
IRQ0,P20
SENS,IRQ1,P21
IRQ2,P22
IRQ3,P23
IRQ4,P24
RST,P27
P15
P25
OSC1
OSC2
XI
XO
VSS VDD
RST MMOD
P50 P51 P52 P53 P54
P60,DGT10
P61,DGT11
P62,DGT12
P63,DGT13
P64,DGT14
P65,DGT15
P66,DGT16
P67,DGT17
P70,SEG7/DGT0
P71,SEG6/DGT1
P72,SEG5/DGT2
P73,SEG4/DGT3
P74,SEG3/DGT4
P75,SEG2/DGT5
P76,SEG1/DGT6
P77,SEG0/DGT7
P80,SEG15
P81,SEG14
P82,SEG13
P83,SEG12
P84,SEG11
P85,SEG10
P86,SEG9
P87,SEG8
P90,SEG23
P91,SEG22
P92,SEG21
P93,SEG20
P94,SEG19
P95,SEG18
P96,SEG17
P97,SEG16
PB0,SEG34
PB1,SEG33
PB2,SEG32
PB3,SEG31
PB4,SEG30
PB5,SEG29
PB6,SEG28
PB7,SEG27
PB7,SEG27
PC0,SEG26
PC1,SEG25
PC2,SEG24
PD0,SEG42
PD1,SEG41
PD2,SEG40
PD3,SEG39
PD4,SEG38
PD5,SEG37
PD6,SEG36
PD7,SEG35
P40,DGT8 P41,DGT9
AN0,PA0
AN1,PA1
AN2,PA2
AN3,PA3
AN4,PA4
AN5,PA5
AN6,PA6
AN7,PA7
VREF-
VREF+
Figure 5 BLOCK DIAGRAM OF IC
XL-E80E
8 – 5
IC801 VHIMN6627933C: CD Digital Signal Processor (MN6627933C) (1/2)
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
NOTE: Signals with * are switched to other signals by microcomputer command.
DRAM pins differ in specifications depending on the type and capacity.
Pin No.
Terminal Name
I/O
Function
1
D11
I/O
DRAM data signal input/output 11
2
D10
I/O
DRAM data signal input/output 10
3
D9
I/O
DRAM data signal input/output 9
4
D8
I/O
DRAM data signal input/output 8
5
UDQM
O
SDRAM upper byte data mask signal output
6
SDRCK
O
SDRAM clock signal output
7*
A11
O
DRAM address signal output 11
8
A9
O
DRAM address signal output 9
9
A8
O
DRAM address signal output 8
10
A7
O
DRAM address signal output 7
11
A6
O
DRAM address signal output 6
12
A5
O
DRAM address signal output 5
13
A4
O
DRAM address signal output 4
14
LDQM
O
SDRAM lower byte data mask signal output
15
NWE
O
DRAM write enable signal output
16
NCAS
O
DRAM CAS control signal output
17
NRAS
O
DRAM RAS control signal output
18
NCS
O
SDRAM chip select signal output
19
A3
O
DRAM address signal output 3
20
A2
O
DRAM address signal output 2
21
A1
O
DRAM address signal output 1
22
A0
O
DRAM address signal output 0
23
DRVDD1
I
DRAM interface I/O power supply 1
24
DVSS1
I
Digital circuit GND 1
25
A10
O
DRAM address signal output 10
26*
*BA1
O
SDRAM bank select signal output 1
27
*BA0
O
SDRAM bank select signal output 0
28
DVDD1
I
Internal digital circuit power supply 1
29
SPOUT
O
Spindle drive signal output (absolute value)
30*
*SPPOL
O
Spindle drive signal output (polarized)
31
TRVP
O
Traverse drive signal output (positive)
32*
*TRVM
O
Traverse drive signal output (negative)
33*
*TRVP2
O
Traverse drive signal output 2 (positive)
34*
*TRVM2
O
Traverse drive signal output 2 (negative)
35
TRP
O
Tracking drive signal output (positive)
36*
*TRM
O
Tracking drive signal output (negative)
37
FOP
O
Focus drive signal output (positive)
38*
*FOM
O
Focus drive signal output (negative)
39
IOVDD1
I
Digital I/O power supply 1
40
TBAL
O
Tracking balance adjustment signal output
41
FBAL
O
Focus balance adjustment signal output
42
FE
I
Focus error signal input
43
TE
I
Tracking error signal input
44
ADPVCC
I
Voltage input for monitoring power supply
45
RFENV
I
RF envelope signal input
46
LDON
O
Laser ON signal output
47
NRFDET
I
RF detection signal input
48
OFT
I
Off-track signal input
49
BDO
I
Drop-out signal input
50
AVDD
I
Analog circuit power supply 1
51
IREF
I
Analog reference current input
52
ARF
I
RF signal input
53
DSLF
O
DSL loop filter pin
54
PWMSEL
I
PWM output mode switch input. L: direct H: ternary
55
PLLF
O
PLL loop filter pin (phase comparison output)
56
PLLFO
O
PLL loop filter pin (speed comparison output)
57
AVSS
I
Analog circuit GND 1
XL-E80E
8 – 6
IC801 VHIMN6627933C: CD Digital Signal Processor (MN6627933C) (2/2)
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
NOTE: Signals with * are switched to other signals by microcomputer command.
DRAM pins differ in specifications depending on the type and capacity.
NOTE: When sharing the PCB with MN6627932, connect pins as follows:
No. 62 pin (N.C. pin) = L (fixed), No. 54 pin (N.C. pin): LOVDD2, No. 65 pin (N.C. pin): LOVSS2
Refer to the MN6627932 specifications for the product details.
Pin No.
Terminal Name
I/O
Function
58
LOOUTL
O
Left channel audio signal output for line-out output
59
LOVSS1
I
Line-out output GND
60
LOOUTR
O
Right channel audio signal output for line-out output
61
LOVDD1
I
Line-out output power supply
62*
N.C.
—
63*
TMON
O
Test monitor output 1
64
N.C.
—
65
N.C.
—
66*
TMON2
O
Test monitor output 2
67
DVDD3
I
Digital circuit power supply 3
68
DVSS2
I
Digital circuit GND 2
69*
*EXT0
I/O
Extended input/output port 0
70*
*EXT1
I/O
Extended input/output port 1
71*
*EXT2
I/O
Extended input/output port 2
72
MCLK
I
Microcomputer command clock signal input
73
MDATA
I
Microcomputer command data signal input
74
MLD
I
Microcomputer command load signal input
75
*STAT
O
Status signal output
76
*BLKCK
O
Sub code block clock signal output
77*
*SMCK
O
4.2336/8.4672 MHz clock signal output
78*
*PMCK
O
88.2 kHz clock signal output
79
*TX
O
Digital audio interface signal output
80
*FLAG
O
Flag signal output
81
NRST
I
LSI reset signal input
82
NTEST
I
Test mode setting input
83
DVSS3
I
Digital circuit GND 3
84
X1
I
Crystal oscillation circuit input
85
X2
O
Crystal oscillation circuit output
86
IOVDD2
I
Digital I/O power supply 2
87
DVDD2
I
Internal digital circuit power supply 2
88
D2
I/O
DRAM data signal input/output 2
89
D1
I/O
DRAM data signal input/output 1
90
D0
I/O
DRAM data signal input/output 0
91
D3
I/O
DRAM data signal input/output 3
92
D4
I/O
DRAM data signal input/output 4
93
D5
I/O
DRAM data signal input/output 5
94
D6
I/O
DRAM data signal input/output 6
95
D7
I/O
DRAM data signal input/output 7
96
D15
I/O
DRAM data signal input/output 15
97
D14
I/O
DRAM data signal input/output 14
98
DRVDD2
I
DRAM interface I/O power supply 2
99
D13
I/O
DRAM data signal input/output 13
100
D12
I/O
DRAM data signal input/output 12
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