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– 41 –

Is +6.2V applied to the pins 21 and 22 (VCC) of IC804 ?

Is sawtooh wave output to the pin 28 (FOO) of IC801 ?

IC801 is faulty.

No

Yes

Yes

Is sawtooth wave obtained between pins 26 and 27 of IC804 ?

No

No

Check the PWB pattern
between pin 7 of IC804
and pin 60 (CD STB) of
IC701.

Is +5V applied to the pin 7
(MUTE) of IC804 ?

Check the PWB pattern between pin 28 (FOO) of IC801 and pins
24 and 25 of IC804.  If OK.  IC804 is faulty.

Check the PWB pattern between pin 5 of CNS605 and IC804.

No

Is sawtooth wave obtained between pins 3 and 4 of CNW801/
CNS801 ?  (as shown above)

Yes

Check the PWB pattern between CNW801/CNS801 and IC804.

No

CNW801/CNS801 connection failure or optical pickup failure.

Yes

Is above wave obtained between pins 9 and 10 of IC804 ?

Is following wave output to the pin 11,12 of IC804 when the CD
TEST MODE "STEP 3" is changed to " STEP 4" ?

No

Yes

Check the procedure in "HF ERROR".
If OK.  IC801 is faulty.

Check the PWB pattern between pin 24,25 of IC801 and pins 9
and 10 of IC804.  If OK.  IC804 is faulty.

No

Is above wave obtained between pins 5 and 6 of CNW801/
CNS801 ?

Yes

Check the PWB pattern between CNW801/CNS801 and IC804.

No

CNW801/CNS801 connection failure or optical pickup failure.

Yes

VO2

Yes

1.5~2.5sec

1.5~2.5sec

– 42 –

Yes

Yes

Is output (tracking error signal) obtained at the pins 33 (TE)
and 37 (TRCRS) of IC801 the CD TEST MODE "STEP 4" is
changed to "STEP 5"?

Is output (HF signal) obtained at the pin 44 (ARF) of IC801
when the CD TEST MODE "STEP 4" is changed to "STEP 5"?

Is output (HF signal) obtained at the pin 38 (/RFDET) of IC801
when the CD TEST MODE "STEP 4" is changed to "STEP 5"?

No

No

No sound from both L and R-ch?

Yes

Check the PWB pattern between pin 33 (TE) of IC801 and pin 19
of IC804.
Check the periphery of IC804 and CNW801/CNS801.
If OK.  Optical pickup failure.

Check the periphery of IC801.
Check the PWB pattern pin38 (/RFDET) of IC801.
If OK.  IC802 is faulty.

No

Yes

Normal.

Check the interval between the pins 73 or 75 of IC801 and the pins
1 or 3 IC601.

No

Yes

Is signal of pins 73 and 75 of IC801 output?

No

Check the peripheral parts of IC801. If OK, IC801 is faulty.

The main PWB is faulty.

Check the periphery of IC802.
Check the PWB pattern between
pin 20 (TEOUT) of IC802 and pins
33 and 37 of IC801.
Is it normal ?

Is output obtained at the pins 2 and
5 of CNS802

Optical pickup failure.

IC801 is faulty.

Check the periphery of IC801.
Check the PWB pattern pin 44 (ARF) of IC801.
If OK.  IC802 is faulty

Is output obtained at the pins 1 and
3, 4 of CNS802.

Optical pickup failure.

Is the following wave output to the pin 10 (VIN2) of IC804
when the CD TEST MODE "STEP 4" or  "STEP 5"?

Check the periphery pins 52~53 of IC801.
If OK.  IC801 failure.

No

No

No

Yes

Yes

No

Yes

Yes

test mode "step 4"

test mode "step 5"

TE

TRCRS

test mode "step 4"

test mode "step 5"

ARF

test mode "step 4"

test mode "step 5"

/RFDET

test mode "step 4"

test mode "step 5"

VO2

– 43 –

Yes

Is following sled feed signal input the pin 3 (VIN1) of IC804
when FF/REW key is pressed after the CD TEST MODE
"STEP 1" is seted?

Is sled feed voltage applied between both terminals of sled
motor?

No

C801 is faulty.

Check the CNW803/CNS803.

No

Yes

Check the CD mechanism (periphery of sled motor).
If the sled motor does not run when DC2.0V is applied to
both terminals of sled motor, the sled motor is faulty.

Yes

Is following sled signal output the pin 3 (VIN1) of IC804 during
playback?

Normal.

No

IC801 is faulty.

Does the sled motor run in FF/REW state when the SERVO
TEST MODE "STEP1" is set?

Is the following wave output to the pin 27 (TRO) of IC801
during track search in normal playback?

Is the following wave output to the pins 20(TEOUT) of IC802
during track search in normal playback?

Yes

Yes

No

Check as stated in item "SLED MOTOR OPERATION FAILURE".

No

IC801 failure.

No

Check the PWB pattern between pin 27 (TRO) of IC801 and pin
19 of IC804.
Check the PWB pattern between pins 17 and 18 of IC804 and
Optical pickup.
If OK.  Optical pickup failure.

Yes

Is the above wave output to the pins 33 (TE) of IC801 during
track search in normal playback?

No

Check the PWB pattern between pin 20 (TEOUT) of IC802 and pin
33  of IC801.  If OK. IC802 failure.

Normal.

Yes

Yes

Is following sled feed signal output the pins 1 and 2 of IC804
when FF/REW key is pressed after the CD TEST MODE
"STEP 1" is seted?

IC804 is faulty.

No

Is the following wave output to the pin 38 (/RFDET) of IC801
during track search in normal playback?

No

Check the PWB pattern pin 38 (/RFDET) of IC801 and pin 8 (ARF)
and pin15 (NRFDET) of IC802 .  If OK. IC802 failure.

Yes

TRO

TEOUT

TE

FF

REW

VIN1

VIN1

/RFDET

FF

REW

SL 

±

– 44 –

1

DI

Serial data and clock input pin for control.

2

CE

Chip enable pin. Data written into an internal latch in a timing of [H] -> [L]. Each analog switch is activated.
Data transfer enabled at [H] level.

3

VSS

Ground pin.

4

TEST

Electronic volume control pin. To be set to the VSS potential.

5

LOUT

Volume + equalizer output pin.

6

LBASS2

Bass-band filter comprising capacitor and resistor connection pin.

7

LBASS1

Bass-band filter comprising capacitor and resistor connection pin.

8

LTRE

Capacitor connection pin comprising treble band filter.

9

LIN

Volume + equalizer input pin.

10

LSEL0

Input selector output pin.

11

L4

Input signal pin.

12-14

L3-L1

Input signal pin.

15*

NC

No CONNECT pin. To be open or connected to VSS.

16*

NC

No CONNECT pin. To be open or connected to VSS.

17-19

R1-R3

Input signal pin.

20

R4

Input signal pin.

21

RSEL0

Input selector output pin.

22

RIN

Volume + equalizer input pin.

23

RTRE

Capacitor connection pin comprising treble band filter.

24

RBASS1

Bass-band filter comprising capacitor and resistor connection pin.

25

RBASS2

Bass-band filter comprising capacitor and resistor connection pin.

26

ROUT

Volume + equalizer output pin.

27*

NC

No CONNECT pin. To be open or connected to VSS.

28

Vref

0.5 x VDD voltage generation block for analog ground. Capacitor of several 10

µ

F to be connected between

Vref and AWSS (VSS) as a counter measure against power ripple.

29

VDD

Supply pin.

30

CL

Serial data and clock input pin for control.

In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

5

27

28

30

29

1

2

3

4

LVref

RVref

CCB

INTERFACE

CONTROL

CIRCUIT

LOGIC

CIRCUIT

CONTROL

CIRCUIT

ROUT

RBASS1

RBASS2

RTRE

RIN RSEL0

L1

L2

L3

L4

R1

R2

R3

R4

LOUT

LBASS2 LBASS1

LTRE

LIN

LSEL0

VSS

CE

DI

CL

VDD

NC

Vref

NC

NC

TEST