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Model
XL-1100 (serv.man10)
Pages
16
Size
181.97 KB
Type
PDF
Document
Service Manual
Brand
Device
Audio / System / Part 6 - Troubleshooting, and Function IC table (45-60)
File
xl-1100-sm10.pdf
Date

Sharp XL-1100 (serv.man10) Service Manual ▷ View online

– 53 –
XL-1000H/1100H
1-4
COM3-COM0
Output
LCD common output terminal.
5-7
VLC3-VLC1
LCD power supply terminal.
8
VDD
Input
Microcomputer power supply +5V.
9
OSC2
Output
Oscillator ground terminal for main clock.  f=8MHz
10
OSC1
Input
Oscillator ground terminal for main clock.  f=8MHz
11
VSS
Microcomputer power supply GND.
12
XI
Input
Oscillator ground  terminal for sub clock.  f=32.768kHz
13
XO
Output
Oscillator ground  terminal for sub clock.  f=32.768kHz
14
MMOD
Input
Memory mode selection terminal.
15
VREF–
Power supply GND for AD converter.
16
KEY0 AN0/PA0
Input
CD lid status detection input.
17
KEY1 AN0/PA1
Input
Operation button input, Max-8 buttons.
18
KEY2 AN0/PA2
Input
Operation button input, Max-8 buttons.
19
KEY3 AN0/PA3
Input
MODEL/TUNER destination input.
20
KEY4 AN0/PA4
Input
Current detection of CD lid control motor.
Used to decide the CD lid drive error to control it.
21*
KEY5 AN0/PA5
Input
CD servo auto adjustment mode selection input.
22*
KEY6 AN0/PA6
Input
Tape mechanism operating status detection input.
Decides the F.P/CAM-SW status with A/D value.
23*
KEY7 AN7/PA7
Input
Tuner signal meter (S meter) voltage input terminal.
24
VREF+
Input
Power supply for A/D converter +5V.
25
TXD SBO0/P00
Output
Data output terminal to TUNER PLL IC.
26
RXD SBI0/P01
Input
Data input from TUNER PLL IC
27
SBT0/P02
Output
Synchronous clock output with TUNER PLL IC
28
SBO1/P03
Output
Enable output of TUNER PLL IC. "L" = OFF  "H" = ON
29*
SBI1/P04
Output
Tape mechanism solenoid drive control output.
30*
SBT1/P05
Output
Tape mechanism motor drive control output.
31*
DK/BZER P06
Output
Recording/playback selection output of tape circuit.
"H" = Recording mode,  "L" = Playback mode
32
RST/P27
Input
Reset signal input
33*
RMOUT P10
Input
CLOCK/TIMER/SLEEP button input.
34*
P11
Input
Tape run/END detection input.  Decided as tape run if pulse is input.
35*
TM2IO P12
Output
Recording bias oscillation circuit control output.
"H" = Bias oscillation,  "L" = oscillation stop.
36*
TM3IO P13
Output
Recording bias oscillation frequency selection control output.
37
TM4IO P14
Input
Power (POWER) button input detection.
38
IRQ0 P20
Input
Switches to the HALT mode when changing to . "L" at power failure detection input.
39
SENS IRQ1/P21
Input
Remote control signal input.
40
IRQ2 P22
Input
Synchronous clock input with RDS IC.
41*
IRQ3 P23
Input
Jog dial UP pulse input.
42*
IRQ4 P24
Input
Jog dial DOWN pulse input.
43*
P30
Output
SURROUND control output.
44
P31
Output
POWER IC STAND-BY terminal CONTROL.
45
P32
Output
Power mute output. "H" = MUTE ON  "L" = MUTE OFF
46
LED0 WE/P50
Output
CD servo power supply circuit control output.  "H" = CD power ON  "L" = CD power OFF
47
LED1 RE/P51
Output
Main TRANS RELAY CONTROL.  "H" = ON  "L" = OFF
48
LED2 CS/P52
Input
Data input from RDS IC.
49
LDE3/S51 A16/P53
Input
Radio stereo broadcast reception detection input.  "L" = During stereo broadcast reception
50
LED4/S50 A17/P54
Input
Broadcast reception status detection input. "L" = During broadcasting signal reception
51
SEG49 P60/A0
Output
LCD backlight control signal output. "H" = Backlight ON,  "L" = Backlight OFF
52*
SEG48 P61/A1
Output
53
SEG47 P62/A2
Output
LED illumination control of electric JOG dial.  "H" = ON  "L" = OFF
Pin No.
Function
Terminal Name Input/Output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
IC701  RH-iX0037SJZZ: System Microcomputer/FL driver (IX0037SJ) (1/2)
XL-1000H/1100H
– 54 –
Function
Terminal Name Input/Output
54
SEG46 P63/A3
Output
Electric JOG dial UP.
55*
SEG45 P64/A4
Output
Electric JOG dial DOWN.
56
SEG44 P65/A5
Output
Electric CD lid OPEN.
57
SEG43 P66/A6
Output
Electric CD lid CLOSE.
58
SEG42 P67/A7
Input
CD pickup position detection SW input.  "L" = Innerst periphery
59
SEG41 P70/A8
Output
Reset signal output for TC9462F
60
SEG40 P71/A9
Output
ON/OFF output terminal of CD servo control IC.  "H" = Servo ON  "L" = Servo stand-by
61-64
SEG39 P72/A10- Input/Output
Data input/output terminal for TC9462F control.
SEG36 P75/A13
65
SEG35 P76/A14
Output
Data synchronous clock output for TC9462F.
66
SEG34 P77/A15
Output
Chip enable terminal for TC9462F.  "L" = BUS terminal active
67
SEG33 P87/D7
Output
LCD segment output.
68
SEG32 P86/D6
Output
LCD segment output.
69-74
SEG31 P85/D5-
Output
LCD segment output
SEG26 P80/D0
75-100
SEG25-SEG0
Output
LCD segment output
Pin No.
IC701  RH-iX0037SJZZ: System Microcomputer/FL driver (IX0037SJ) (2/2)
IC701  RH-iX0037SJZZ: System Microcomputer/FL driver (IX0037SJ)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
O
O
O
O
O
I
I
O
I
I
I
I
I
I
I
I
I
O
I
O
O
O
O
O
I
I
I
O
O
I
I
I
I
I
I
O
O
O
O
O
O
O
I
S
S
S
S
S
S
S
S
S
O
O
I/O
I/O
I/O
I/O
O
O
I
O
O
O
O
O
O
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
COM3
COM2
COM1
COM0
VLC3
VLC2
VLC1
VDD
OSC2
OSC1
VSS
XI
XO
MMOD
VREF–
CLID_SW
KEY1
KEY2
MODEL
CLID_PRO
NC
NC
NC
VREF+
DI
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
CCE
BUCK
BUS3
BUS2
BUS1
BUS0
CD_STB
CD_RES
PU-IN
CLID_DW
CLID_UP
NC
DIMMER
LIGHT
NC
B-LIGHT
DO
CL
CE
NC
NC
NC
RESET
NC
NC
NC
NC
POWER
SYS_STOP
REMOCON
CLE
NC
NC
SURR
P-STB
P-MUTE
CD+B
P-CONT
DATA
STEREO
SD
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
Figure 54 BLOCK DIAGRAM OF IC
– 55 –
XL-1000H/1100H
IC801  VHiTA2109F/-1:Servo Pre Amp. (TA2109F)
1
VCC
Power voltage terminal
2
FNI
Input
Main beam amp input terminal
3
FPI
Input
Main beam amp input terminal
4
TPI
Input
Sub-beam amp input terminal
5
TNI
Input
Sub-beam amp input terminal
6
MDI
Input
Monitor photodiode amp input terminal
7
LDO
Output
Laser diode amp output terminal
8
SEL
Input
Laser diode control signal input and APC circuit ON/OFF signal input terminal
9
TEB
Input
Tracking error balance adjustment signal input terminal
To be controlled by 3-value PWM signal. (PWM carrier = 88.2 kHz)
10
2VRO
Output
Standard voltage (2VR) output terminal. When Vcc = 5V, 2VR = 4.2V.
11
TEN
Input
Tracking error signal generation amp reversed phase input terminal
12
TEO
Output
Tracking error signal generation amp output terminal
13
SBAD
Output
Sub-beam addition signal output terminal
14
FEO
Output
Focus error signal generation amp output terminal
15
FEN
Input
Focus error signal generation amp reversed phase input terminal
16
VRO
Output
Standard voltage (VR) output terminal. When Vcc = 5V, VR = 2.1V.
17
RFRP
Output
Track count signal generation amp output terminal
18
RFIS
Input
RFRP detection circuit input terminal
19
RFGO
Output
RF signal output terminal
20
RFGC
Input
RF amplitude adjustment control signal input terminal
The amplitude of RF signal can be controlled by using the 3-value PWM signal (PWM
carrier = 88.2 kHz) which is output from the RFGC terminal of TC9432F.
21
AGCI
Input
RF signal amplitude adjustment amp input terminal
22
RFO
Output
RF signal generation amp output terminal
23
GND
GND terminal
24
RFN
Input
RF reversed phase input terminal
Terminal Name
Pin No.
Input/Output
Function
IC801  VHiTA2109F/-1:Servo Pre Amp. (TA2109F)
15k
15k
50k
10k
7.96k
10k
21k
21k
12k
12k
20k
20k
23.5k
12k
1.53k
20k
3.3k
180k
60k
60k
20k
20k
20k
180k
180k
180k
13k
2.12k
680k
1k
47k
1.74k
24k
30k
24k
21k
29k
10k
7.67k
30k
10k
10k
20k
3.3k
20pF
20pF
40pF
20pF
40pF
36pF
10pF
PEAK
BOTTOM
re = 130
SW
3
SW
2
SW
1
65
µ
A
50
µ
A
20
µ
A
2
3
4
5
1
7
8
9
6
12
13
14
15
11
17
18
19
10
16
22
23
24
21
20
VCC
FNI
FPI
TPI
TNI
MDI
LDO
SEL
TEB
2VRO
TEN
TEO
RFN
GND
RFO
AGCI
RFGC
RFGO
RFIS
RFRP
VRO
FEN
FEO
SBAD
3 STATE
DET.
I . I
I . I
SEL
L
HiZ
H
SW1
SW2
LDC
SW3
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
LDC
Figure 55 BLOCK DIAGRAM OF IC
XL-1000H/1100H
– 56 –
IC802 VHiTC9462F/-1: Servo/Signal Control (TC9462F) (1/3)
1*
TEST0
Input
Test mode terminal. To be opened usually.
2*
/HSO
Output
Playback speed mode flag output terminal.
3*
/UHSO
Output
4*
EMPH
Output
Sub-code Q data emphasis flag output terminal. "H": Emphasis ON  "L": Emphasis OFF
The output polarity can be inverted by command.
5*
LRCK
Output
Channel clock (44.1 kHz) output terminal.  "L": L channel  "H": R channel
The output polarity can be inverted by command.
6
VSS
Digital ground terminal.
7*
BCK
Output
Bit clock (1.4122 MHz) output terminal.
8*
AOUT
Output
Audio data output terminal.
9
DOUT
Output
Digital out output terminal.
10*
MBOV
Output
Buffer memory over signal output terminal. "H": Over
11*
IPF
Output
Correction flag output terminal.
"H": When AOUT output is correction-disabled symbol in case of C2 correction output.
12*
SBOK
Output
Sub-code Q data CRCC judgment result output terminal. "H": When judgment result is OK.
13*
CLCK
Input/Output
Sub-code P-W data read clock output/input terminal. Selectable with command bit.
14
VDD
Input
Digital + power terminal.
15
VSS
Digital ground terminal.
16*
DATA
Output
Sub-code P-W data output terminal.
17*
SFSY
Output
Playback system frame sync signal output terminal.
18*
SBSY
Output
Sub-code block sync output terminal. "H": On S1 position when the sub-code sync is detected.
19*
SPCK
Output
Processor status signal read clock (176.4 kHz) output terminal.
20*
SPDA
Output
Processor status signal output terminal.
21*
COFS
Output
Correction system frame clock (7.35 kHz) output terminal.
22*
MONIT
Output
LSI internal signal monitor terminal.
It is possible to monitor the DSP internal flag and PLL system clock with the microcomputer
command. Terminal for serial output of text data according to command .
23
VDD
Input
Digital + power terminal.
24
TESIO0
Input
Test input/output terminal. To be fixed to "L" usually.
Terminal to input the text data read clock according to command.
25
P2VREF
2VREF terminal for PLL system.
26*
HSSW
Output
VREF voltage in case of x2 speed/x4 speed.
27*
ZDET
Output
1-bit DAC zero detection flag output terminal.
28
PDO
Output
Terminal to output the phase difference between EFM signal and PLCK signal.
29*
TMAXS
Output
TMAX detection result output terminal. To be selected with command bit TMPS.
30
TMAX
Output
TMAX detection result output terminal. To be selected with command bit TMPS.
31
LPFN
Input
Low-pass filter amp inverted input terminal.
32
LPFO
Output
Low-pass filter amp output terminal.
33
PVREF
Input
VREF terminal for PLL system.
34
VCOREF
Input
VCO center frequency standard level terminal. To be fixed to PVref usually.
35
VCOF
Output
VCO filter terminal.
36
AVSS
Analog system ground terminal.
37
SLCO
Output
Data slice level generation DAC output terminal.
38
RFI
Input
RF signal input terminal.
Pin No.
Port Name
Function
Input/Output
H
H
x1 speed playback
H
L
x2 speed playback
L
H
x4 speed playback
L
L
/UHSO
/HSO
Playback speed
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Longer than specific period
"P2VREF"
Shorter than specific period
"VSS"
Within specific period
"HIZ"
TMAX detection result
TMAX output
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