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– 89 –

P90/SEG16
P91/SEG17
P92/SEG18
P93/SEG19
P94/SEG20
P95/SEG21
P96/SEG22
P97/SEG23
P30/SEG24
P31/SEG25
P32/SEG26
P33/SEG27
P34/SEG28
P35/SEG29
P36/SEG30
P37/SEG31

P00/SEG32/DIG0
P01/SEG33/DIG1
P02/SEG34/DIG2
P03/SEG35/DIG3
P04/SEG36/DIG4
P05/SEG37/DIG5
P06/SEG38/DIG6
P07/SEG39/DIG7
P10/SEG40/DIG8
P11/SEG41/DIG9

P12/DIG10
P13/DIG11
P14/DIG12
P15/DIG13

SEG17

80

SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
DIG13
DIG12
DIG11
DIG10
DIG9
DIG8
DIG7
DIG6
DIG5
DIG4

P76/AN6

P77/AN7

P75/AN5
P74/AN4
P73/AN3
P72/AN2
P71/AN1
P70/AN0
PB3
PB2/DA
P57/SRDY3/AN15
P56/SCLK3/AN14
P55/SOUT3/AN13
P54/SIN3/AN12
P53/SRDY2/AN11
P52/SCLK2/AN10
P51/SOUT2/AN9
P50/SIN2/AN8
P67/SRDY1/CS/SCLK12
P66/SCLK11
P65/SOUT1
P64/SIN1
P63/CNTR1
P62/CNTR0
P61/PWM
P60
P47/T3OUT
P46/T1OUT
P45/INT1/ZCR
P44/INT4

KEY1
KEY2
KEY3

P_DOWN

TUNER_SM

PROTECT

SPAN

POWER

H. P_SW

CD_OP/CL_SENS

MD_LOAD_SW

MD_ST

MD_SERACH

MD_RESET

MD_D_STB

MD_D_SCK
MD_KDATA

MD_DATA

CD_BUS3
CD_BUS2
CD_BUS1
CD_BUS0

CD_BUSK

CD_CCE

AVSS

VREF

VEE

PA0/SEG0

PA1/SEG1

PA2/SEG2

PA3/SEG3

PA4/SEG4

PA5/SEG5

VCC

PA6/SEG6

PA7/SEG7

P80/SEG8

P81/SEG9

P82/SEG10

P83/SEG11

P84/SEG12

P85/SEG13

P86/SEG14

P87/SEG15

AVSS

VREF

VEE

SEG1

SEG2

SEG3

SEG4

SEG5

SEG6

VCC

SEG7

SEG8

SEG9

SEG10

SEG11

SEG12

SEG13

SEG14

SEG15

SEG16

P17/DIG15

P16/DIG14

P20/DIG16

P21/DIG17

P22/DIG18

P23/DIG19

P24

P25

P26

P27

VSS

XOUT

XIN

PB0/XCOUT

PB1/XCIN

RESET

P40/INT0

P41

P42/INT2

P43/INT3

DIG2

DIG3

DIG1

TIMER LED

CD RESET

IC LCK1

DR CL IN

DR OP IN

CD PU IN

IC LCK2

VSS

X OUT

X IN

IC DO

IC CE

RESET

SYS STOP

IC DI

REMOCON IN

IC CLK

79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61

100

99

98

97

96

95

94

93

92

91

90

89

88

87

86

85

84

83

82

81

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

60
59
58
57
56
55
54
53
52
51

1
2
3
4
5
6
7
8
9

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

– 90 –

1

VCC

—

3.3V power supply terminal

2

FNI

Input

Main beam amp input terminal

3

FPI

Input

Main beam amp input terminal

4

TPI

Input

Sub-beam amp input terminal

5

TNI

Input

Sub-beam amp input terminal

6

MDI

Input

Monitor photodiode amplifier input terminal

7

LDO

Output

Laser diode amp output terminal

8

SEL

Input

APC circuit ON/OFF signal, LDO terminal control input terminal and bottom/peak
detection frequency switching terminal

9

TEBC

Input

Tracking error balance adjustment signal input terminal
• TEBC input voltage

10

TEN

Input

Tracking error signal generation amp antiphase input terminal

11

TEO

Output

Tracking error signal generation amp output terminal

12

RFDC

Output

RF signal peak detection output terminal

13

GVSW

Input

AGC, FE, TE amp gain switching terminal

14

VRO

Output

Reference voltage (VRO) output terminal • VCC=3.3V: VRO=1/2 VCC

15

FEO

Output

Focus error signal generation amp output terminal

16

FEN

Input

Focus error signal generation amp antiphase input terminal

17

RFRP

Output

Signal generation amp output terminal for track count

18

RFRPIN

Input

Signal generation amp input terminal for track count

19

RFGO

Output

RF signal amplitude adjustment amp output terminal

20

RFGC

Input

RF amplitude adjustment control signal input terminal • RFGC input voltage

21

AGCIN

Input

RF signal amplitude adjustment amp input terminal

22

RFO

Output

RF signal generation amp output terminal

23

RFN

Input

RF signal generation amp input terminal

24

GND

—

GND terminal

GND

OFF

Connection to VCC via 1k

Ω

Hi-z

ON

Control signal output

VCC

ON

Control signal output

SEL

APC circuit

LDO

GND

CD-RW

Hi-z

CD-DA

VCC

CD-CA

GVSW

Mode

80k

20k

15p

240k

80k

20k

40p

40p

180k

180k

60k

60k

3k

3k

20k

20k

20k

40k

40k

10p

15p

13

GVSW

18

RFRP IN

19

RFGO

RFGC

20

21

AGCIN

22

RFO

23

RFN

24

GND

12

RFDC

11

TEO

10

TEN

9

TEB

8

SEL

7

LDO

6

MDI

5

TNI

4

TPI

3

FPI

2

FNI

1

VCC

20k

20k

15k

2k

14k

1k

50k

2k

1.3V

20k

12k

12k

20k

40k

50k

15k

30k

20k

240k

10p

14

VRO

15

FED

16

FEN

17

RFRP

BOTTOM

PEAK

PEAK

x0.5

x2

K

x0.5

x2

1

50

µ

20

µ

60

µ

PIN

SEL

(APC_SW)

TEB

(TE_BAL)

RFGC

(AGC_Gain)

GVSW

(CD/RW)

V

CTRL

V

CC

HiZ

GND

APC ON

APC ON

APC OFF

(LDO=H)

-50%

0%

+50%

+12dB

+6dB

0dB

DA

(0dB)

DA

(0dB)

RW

(+12dB)

– 91 –

1*

VO3-

CH3 (-) output

2*

VO3+

CH3 (+) output

3

VO5-

CH5 (-) output. Inversion against input

4

VO5+

CH5 (+) output. Non-inversion against input

5

VO4-

CH4 (-) output. Inversion against input

6

VO4+

CH4 (+) output. Non-inversion against input

7

P-GND

Power system GND (CH3, 4, 5)

8

S-GND

Signal system GND

9

VREF

Reference voltage input

10

IN-MUTE

BTL AMP (CH1, 2, 4, 5) and 3.3V, 5VREG output. ON/OFF (“H”: Output ON, “L”: Output OFF)

11*

0-RESET

Reset output (open collector)

12

VIN4

CH4 input

13

VIN5

CH5 input

14

VIN3+

CH3 input +

15

VIN3-

CH3 input –

16*

5VERG

5V power output

17

VIN6-

CH6 input –

18

VIN6+

CH6 input +

19

VIN2

CH2 input

20

VIN1

CH1 input

21

S-VCC

Signal system VCC

22

3.3VREG

3.3V power output

23

P-VCC

Power system power supply

24

P-GND2

Power system GND (CH1, 2, 6)

25

V01-

CH1 (-) output. Inversion against input

26

V01+

CH1 (+) output. Non-inversion against input

27

V02-

CH2 (-) output. Inversion against input

28

V01+

CH2 (+) output. Non-inversion against input

29

V06-

CH6 (-) output

20

V06+

CH6 (+) output

In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.

VO3–

VO3+

VO5–

VO5+

VO4–

VO4+

P-GND1

S-GND

VREF

IN-MUTE

0-RESET

VIN4

VIN5

VIN3+

VIN3–

VIN6–

5VREG

VIN6+

VIN2

VIN1

S-VCC(IN)

3.3VREG

(OUT)

P-VCC(IN)

P-GND2

VO1–

VO1+

VO2–

VO2+

VO6–

VO6+

X3/8

X3/8

X3/8

X3/8

22k

22k

22k

22k

200

200

200

200

MUTE

RESET

3.3VREG

5VREG

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

+

+

–

–

+

–

+

–

+

–

Level 
shift

Level 
shift

X2

X2

X2

X2

Level shift

Level shift

Level shift

Level shift

Power GND

Signal GND

Standard

voltage

In less than 

VREF 0.7V, 

RESET output L

BTL-AMP OFF

Power VCC

Signal

VCC

Power GND

Heating 

protection circuit

(Thermal shutdown)

– 92 –

In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
(*): Normally the output pin. Used as an I/O pin in test mode, which is not available to user applications.

1

VREF

Output

Reference voltage output (Vdda/2)

2

MPXIN

Input

Baseband (multiplexed0 signal input

3

VDDA

Input

Analog power supply (+5V)

4

VSSA

—

Analog ground

5

FLOUT

Output

Subcarrier output (fulter output)

6

CIN

Input

Subcarrier input (comparator input)

7

T1

Input

Test input (This pin must always be connected to ground.)

8

T2

Input

Test input (standby control)
0: Normal operation

1: standby state (crystal oscillator stopped)

9*

T3 (RDCL)

Input/Output (*)

Test I/O (RDS clock output)

10*

T4 (RDDA)

Input/Output (*)

Test I/O (RDS data output)

11*

T5 (RSFT)

Input/Output (*)

Test I/O (soft-decision control data output)

12

XOUT

Output

Crystal oscillator output (4.332/8.664 MHz)

13

XIN

Input

Crystal oscillator input (external reference signal input)

14

VDDD

Input

Digital power supply (+5V)

15

VSSD

—

Digital ground

16*

T6

Input/Output (*)

Test I/O (error status, regenerated carrier, TP, error block count outputs)

(ERROR/57K/TP/BE1)

17*

T7

Input/Output (*)

Test I/O (error correction status, SK detection, TA, error block count outputs)

(CORREC/ARI-ID/TA/BE0)

18*

SYNC

Input/Output (*)

Block synchronization detection output

19*

RDS-ID

Output

RDS detection output

20

DO

Output

Data output

21

CL

Input

Clock input

22

DI

Input

Data input

    Serial data interface (CCB)

23

CE

Input

Chip enable

24

SYR

Input

Synchronization and RAM address reset (active high)

VREF

FLOUT

CIN

Vddd

Vssd

RDS-ID

SYNC

SYR

XOUT

XIN

DO

CL

DI

CE

T1

T2

T3 to T7

MPXIN

Vssa

Vdda

REFERENCE

VOLTAGE

ANTIALIASING

FILTER

57kHz

BPF

(SCF)

VREF

SMOOTHING

FILTER

+

_

PLL

(57kHz)

CLOCK

RECOVERY

(1187.5Hz)

DATA

DECODER

SYNC/EC CONTROLLER

SYNC

DETECT-2

SYNC

DETECT-1

ERROR CORRECTION

(SOFT DECISION)

CLK(4.332MHz)

OSC/DIVIDER

RAM

(24 BLOCK DATA)

MEMORY CONTROL

CCB

TEST

3

1

5

6

4

2

20

21
22

23

13

12

24

18

19

15

14

7

8

9~11,

16,17