DOWNLOAD Sharp DK-KP85H (serv.man2) Service Manual ↓ Size: 7.22 MB | Pages: 64 in PDF or view online for FREE

Model
DK-KP85H (serv.man2)
Pages
64
Size
7.22 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio / System
File
dk-kp85h-sm2.pdf
Date
PREV: Sharp DK-KP85H User Manual / Operation Manual

Sharp DK-KP85H (serv.man2) Service Manual ▷ View online

DK-KP85PH
5 – 5
IC600 VHiOTK5268/-1 : OPTEK SOC IC (3/5)
Note : 
I - Input, 
O - Output
NAME
Hardware 
PORT_TYPE
Pull-Up
Pin
No.
I/O
Group
Type
    Outline 
Feature
P
R
E
W
O
P
L
L
P
_
S
S
V
A
AVSS_PLL
P
R
E
W
O
P
L
L
P
_
D
D
V
A
AVDD_PLL
I
K
C
O
L
C
I
Z
H
M
4
2
I
P
PI24MHZ
O
K
C
O
L
C
O
Z
H
M
4
2
O
P
PO24MHZ
A3
O
EMI
IO
A3/GPIO1[20]
A2
O
EMI
IO
A2/GPIO1[19]
A1
O
EMI
IO
A1/GPIO1[18]
A0
O
EMI
IO
A0/GPIO1[17]
PVDD_1V3
POWER
P
PVDD_1V3
P
R
E
W
O
P
D
D
V
D
P
PDVDD
O
I
I
M
E
O
0
1
A
A10/APGPIO1[27]
BA1
O
EMI
IO
BA1/GPIO1[31]
O
I
I
M
E
O
0
A
B
BA0/GPIO1[30]
O
I
I
M
E
O
S
C
_
M
A
R
D
S
SDRAM_CS/GPIO1[13]
O
I
I
M
E
O
S
A
R
_
M
A
R
D
S
SDRAM_RAS/GPIO2[3]
O
I
I
M
E
O
S
A
C
_
M
A
R
D
S
SDRAM_CAS/GPIO2[2]
O
I
I
M
E
O
E
W
_
M
A
R
D
S
SDRAM_WE/GPIO1[15]
O
I
I
M
E
O
M
Q
D
L
_
M
A
R
D
S
SDRAM_LDQM/GPIO2[0]
O
I
I
M
E
O
/I
0
D
D0/GPIO2[4]
O
I
I
M
E
O
/I
1
D
D1/GPIO2[5]
O
I
I
M
E
O
/I
2
D
D2/GPIO2[6]
O
I
I
M
E
O
/I
3
D
D3/GPIO2[7]
O
I
I
M
E
O
/I
4
D
D4/GPIO2[8]
O
I
I
M
E
O
/I
5
D
D5/GPIO2[9]
P
R
E
W
O
P
D
D
V
D
P
PDVDD
O
I
I
M
E
O
/I
6
D
D6/GPIO2[10]
O
I
I
M
E
O
/I
7
D
D7/GPIO2[11]
O
I
I
M
E
O
/I
8
D
D8/GPIO2[12]
O
I
I
M
E
O
/I
9
D
D9/GPIO2[13]
O
I
I
M
E
O
/I
0
1
D
D10/GPIO2[14]
O
I
I
M
E
O
/I
1
1
D
D11/GPIO2[15]
O
I
I
M
E
O
/I
2
1
D
D12/GPIO2[16]
O
I
I
M
E
O
/I
3
1
D
D13/GPIO2[17]
O
I
I
M
E
O
/I
4
1
D
D14/GPIO2[18]
O
I
I
M
E
O
/I
5
1
D
D15/GPIO2[19]
P
R
E
W
O
P
D
D
V
D
P
PDVDD
107
SDRAM 3-STATE DATA BUS
108
IO POWER INPUT
104
SDRAM 3-STATE DATA BUS
105
SDRAM 3-STATE DATA BUS
106
SDRAM 3-STATE DATA BUS
101
SDRAM 3-STATE DATA BUS
102
SDRAM 3-STATE DATA BUS
103
SDRAM 3-STATE DATA BUS
98
SDRAM 3-STATE DATA BUS
99
SDRAM 3-STATE DATA BUS
100
SDRAM 3-STATE DATA BUS
95
SDRAM 3-STATE DATA BUS
96
SDRAM 3-STATE DATA BUS
97
IO POWER INPUT
92
SDRAM 3-STATE DATA BUS
93
SDRAM 3-STATE DATA BUS
94
SDRAM 3-STATE DATA BUS
89
SDRAM WRITE ENABLE
90
SDRAM DQ MASK
91
SDRAM 3-STATE DATA BUS
86
SDRAM CHIP SELECT
87
SDRAM ROW ADRESS STROBE
88
SDRAM COLUMN ADRESS STROBE
83
SDRAM ADRESS
84
SDRAM BANK ADRESS
85
SDRAM BANK ADRESS
80
SDRAM ADRESS
81
CORE POWER
82
IO POWER INPUT
77
SDRAM ADRESS
78
SDRAM ADRESS
79
SDRAM ADRESS
74
PLL POWER
75
SYSTEM CLOCK
76
SYSTEM CLOCK
73
PLL GROUND
DK-KP85PH
5 – 6
IC600 VHiOTK5268/-1 : OPTEK SOC IC (4/5)
Note : 
I - Input, 
O - Output
NAME
Hardware 
PORT_TYPE
Pull-Up
Pin
No.
I/O
Group
Type
    Outline 
Feature
P
R
E
W
O
P
S
S
V
D
P
PDVSS
O
I
I
M
E
O
M
Q
D
U
_
M
A
R
D
S
SDRAM_UDQM/GPIO2[1]
O
I
I
M
E
O
K
L
C
_
M
A
R
D
S
SDRAM_CLK
O
I
I
M
E
O
E
K
L
C
CLKE/GPIO1[11]
A11
O
EMI
IO
A11/GPIO1[28]
O
I
I
M
E
O
9
A
A9/GPIO1[26]
O
I
I
M
E
O
8
A
A8/GPIO1[25]
O
I
I
M
E
O
7
A
A7/GPIO1[24]
O
I
I
M
E
O
6
A
A6/GPIO1[23]
O
I
I
M
E
O
5
A
A5/GPIO1[22]
O
I
I
M
E
O
4
A
A4/GPIO1[21]
O
I
O
I
D
U
A
I
C
N
M
W
P
]
1
2
[
2
I
P
G
/
N
_
M
W
P
_
1
H
C
O
I
O
I
D
U
A
I
C
N
M
W
P
]
0
2
[
2
I
P
G
/
P
_
M
W
P
_
1
H
C
P
R
E
W
O
P
3
V
1
_
D
D
V
P
PVDD_1V3
P
R
E
W
O
P
D
D
V
D
P
PDVDD
O
I
O
I
D
U
A
I
2
D
E
L
_
T
B
M
W
P
]
3
2
[
2
I
P
G
/
N
_
M
W
P
_
2
H
C
O
I
O
I
D
U
A
I
1
D
E
L
_
T
B
M
W
P
]
2
2
[
2
I
P
G
/
P
_
M
W
P
_
2
H
C
O
I
O
I
D
U
A
I
N
E
P
O
_
D
C
M
W
P
]
9
2
[
2
I
P
G
/
N
_
M
W
P
_
5
H
C
O
I
O
I
D
U
A
I
E
S
O
L
C
_
D
C
M
W
P
]
8
2
[
2
I
P
G
/
P
_
M
W
P
_
5
H
C
O
I
O
I
D
U
A
I
T
E
D
_
E
T
U
M
_
T
B
M
W
P
]
5
2
[
2
I
P
G
/
N
_
M
W
P
_
3
H
C
O
I
O
I
D
U
A
I
Y
E
K
_
R
E
W
O
P
M
W
P
]
4
2
[
2
I
P
G
/
P
_
M
W
P
_
3
H
C
O
I
O
I
D
U
A
I
W
S
_
P
/
H
M
W
P
]
7
2
[
2
I
P
G
/
N
_
M
W
P
_
4
H
C
O
I
O
I
D
U
A
I
R
E
W
O
P
_
C
C
A
M
W
P
]
6
2
[
2
I
P
G
/
P
_
M
W
P
_
4
H
C
only for software engineer debug monitor
O
SSP
IO
GPIO0[11]/UART2_TX
O
I
P
S
S
O
C
N
U
F
_
D
C
GPIO0[10]/UART2_RX
LIMIT
O
GPIO
IO
PWM_ERR/GPIO0[4]
I
G
O
L
A
N
A
I
L
_
X
U
A
/
L
_
M
F
LIN
I
G
O
L
A
N
A
I
L
_
T
B
LAUX
P
R
E
W
O
P
D
N
G
A
AGND
P
R
E
W
O
P
D
D
V
A
AVDD
I
G
O
L
A
N
A
I
R
_
T
B
RAUX
I
G
O
L
A
N
A
I
R
_
X
U
A
/
R
_
M
F
RIN
I
G
O
L
A
N
A
I
S
A
I
B
_
C
I
M
MIC_BIAS
P
R
E
W
O
P
D
I
M
V
VMID
O
G
O
L
A
N
A
O
T
U
O
_
L
_
P
H
HP_L_OUT
O
G
O
L
A
N
A
O
T
U
O
_
R
_
P
H
HP_R_OUT
143
AUDIO
144
AUDIO
140
AUDIO FM Right/Audio In Right
141
MIC BIAS
142
GROUND
137
ANALOG GROUND
138
ANALOG POWER
139
AUDIO BT Right
134
CURRENT LIMITTER CONTROL
135
AUDIO FM Left/Audio In Left 
136
AUDIO BT Left
131
IPOD DOCK DETECTION FROM APPLE 
DEVICE
132
DEBUG MONITOR
133
CD FUNCTION CONTROL
128
BT MUTE DETECTION FROM BT MODULE
129
INTERRUPT TO WAKE UNIT FROM 
STANDBY MODE
130
HEADPHONE IN DETECTION
L: HP IN
125
BLUETOOTH STATUS DETECTION
126
DOOR OPEN COMPLETE DETECTION
127
DOOR CLOSE COMPLETE DETECTION
122
CORE POWER
123
IO POWER INPUT
124
BLUETOOTH STATUS DETECTION
119
SDRAM ADRESS
120
FIX TO L
121
FIX TO L
116
SDRAM ADRESS
117
SDRAM ADRESS
118
SDRAM ADRESS
113
SDRAM ADRESS
114
SDRAM ADRESS
115
SDRAM ADRESS
110
SDRAM DQ MASK
111
SDRAM CLOCK
112
SDRAM CLOCK ENABLE
109
DIGITAL GROUND
DK-KP85PH
5 – 7
IC600 VHiOTK5268/-1 : OPTEK SOC IC (5/5)
FIGURE: 5-2
DK-KP85PH
5 – 8
IC603 RH-iXA376AW00 : 16M BYTE SPI FLASH IC (1/1)
 
N
O
I
T
C
N
U
F
 
O
/
I
 
E
M
A
N
 
N
I
P
 
.
O
N
 
N
I
P
1 /CS
I Chip 
Select Input 
2 DO 
(IO1) 
I/O 
Data Output (Data Input Output 1)*
1
3 
/WP (IO2)
I/O 
Write Protect Input ( Data Input Output 2)*
2
4 GND 
 
Ground 
5 DI 
(IO0) 
I/O 
Data Input (Data Input Output 0)*
1
6 CLK 
I 
Serial Clock Input 
7 /HOLD 
(IO3)
I/O Hold 
Input (Data Input Output 3)*
2
8 VCC 
 
Power 
Supply 
Figure: 5-3
*1 IO0 and IO1 are used for Dual and Quad instructions 
*2 IO0 – IO3 are used for Quad instructions 
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