Sharp DK-KP85H (serv.man2) Service Manual ▷ View online
DK-KP85PH
5 – 1
CHAPTER 5. MAJOR PART DRAWING
[1] Function Table Of IC
IC1 VHIBU9543KV-1 : CD DSP IC (1/2)
Description of Terminals Note : I - Input, O - Output
Terminal
No.
Terminal name
Analog /
Digital
I/O
Description of terminals
Equivalent
circuit
1
AVDD1
Analog
-
Analog power terminal
-
2
AC
Analog
I
A + C voltage input terminal from pickup
1
3
BD
Analog
I
B + D voltage input terminal from pickup
1
4
VBIAS
Analog
O
Bias level (VDD/2) output terminal
2
5
AGND1
Analog
-
Analog GND terminal
-
6
E
Analog
I
E voltage input terminal from pickup
3
7
F
Analog
I
F voltage input terminal from pickup
3
8
PD
Analog
I
APC photo detector input terminal
4
9
LD
Analog
O
APC laser drive output terminal
4
10
ASY
Analog
I
C-fitted terminal for comparator slice for asymmetric correc-
tion
tion
5
11
PCO
Analog
O
PLL PCO output terminal
6
12
FCO
Analog
O
PLL FCO-DAC output terminal
6
13
FDOUT
Analog
I/O
Focus drive output terminal
7
14
TDOUT
Analog
I/O
Tracking drive output terminal
7
15
SDOUT
Analog
I/O
Sled drive output terminal
7
16
CLVOUT
Analog
I/O
CLV drive output terminal
7
17
RCLK
Digital
I/O
Reference clock output terminal for SDRAM
8
18
MCK
Digital
I
Sub Q and command transfer clock input terminal
11
19
DIN/DOUT
Digital
I/O
Command input and status and sub Q output terminal
8
20
R/W
Digital
I
Command read/write signal input terminal
11
21
BUSY
Digital
O
Busy signal output terminal
9
22
SUBSYQ
Digital
I/O
Sub code synchronous signal output terminal
8
23
SUBDATA
Digital
I/O
Sub code data signal output terminal
8
24
SUBCK
Digital
I/O
Sub code bit clock input terminal
10
25
WFCK
Digital
I/O
Disc frame synchronous signal output terminal
8
26
VDD_CORE
Digital
-
Internal digital power terminal
-
27
DGND
Digital
-
Digital GND terminal
-
28
CLK
Digital
I/O
Output terminal for various clocks
8
29
CLK88
Digital
O
Clock output terminal for driver IC
9
30
RESETB
Digital
I
System reset terminal (“L”
→ reset condition)
12
31
XBUFO
Digital
O
X’tal 16.9344MHz buffer output terminal
8
32
DGND
Digital
-
Digital GND terminal
-
33
DVDD
Digital
-
I/O Digital power terminal
-
34
DOUTA
Digital
I/O
Audio serial data output terminal
8
35
LRCK
Digital
I/O
Audio LR signal output terminal
8
36
DCK
Digital
I/O
Audio serial bit clock output terminal
8
37
VDD_CORE
Digital
-
Internal digital power terminal
-
38
DFDIN
Digital
I/O
Audio serial data input terminal
10
39
DFLRCK
Digital
I/O
Audio LR signal input terminal
10
40
DFDCK
Digital
I/O
Audio serial bit clock input terminal
10
41
DFSCKI
Digital
I/O
Audio system clock(384fs) input terminal
10
42
DGND
Digital
-
Digital GND terminal
-
43
FLAG0
Digital
O
Various flag output terminal
9
44
FLAG1
Digital
O
Various flag output terminal
9
45
FLAG2
Digital
O
Various flag output terminal
9
46
FLAG3
Digital
O
Various flag output terminal
9
47
DVDD
Digital
-
I/O Digital power terminal
-
48
XI
Digital
I
X'tal 16.9344MHz connecting (input) terminal
14
49
XO
Digital
O
X'tal 16.9344MHz connecting terminal
14
50
DGND
Digital
-
Digital GND terminal
-
51
TEST_IN
Digital
I
Test signal input terminal
13
52
TEST_OUT
Digital
O
Test signal output terminal
9
53
DVDD2
Digital
-
I/O Digital power terminal
-
(1/2)
DK-KP85PH
5 – 2
54
AGND2
Analog
-
Audio system analog GND terminal
-
55
LDACO
Analog
O
Audio Lch output terminal
16
56
VCDAC
Analog
O
Audio system reference voltage output terminal
16
57
RDACO
Analog
O
Audio Rch output terminal
16
58
AVDD2
Analog
-
Audio system analog power terminal
-
59
AD_MONI0
Digital
I/O
Test signal input/monitor signal output terminal
15
60
AD_MONI1
Digital
I/O
Test signal input/monitor signal output terminal
15
61
ANA_MONI0
Analog
I/O
Analog test signal input/monitor signal output terminal
15
62
ANA_MONI1
Analog
I/O
Analog test signal input/monitor signal output terminal
15
63
RFI
Analog
I
RF output capacity combined data re-input terminal
17
64
EQO
Analog
O
After-RF-equalizer output terminal
18
Description of Terminals Note : I - Input, O - Output
Terminal
No.
Terminal name
Analog /
Digital
I/O
Description of terminals
Equivalent
circuit
1
17
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
8
19
20
21
22
2
3
24
25
26
27
2
8
29
3
0
3
1
3
2
64
6
3
62
61
60
59
5
8
57
56
55
54
5
3
52
51
50
49
48
47
46
44
43
42
41
40
39
38
37
36
35
34
33
45
AC
BD
VBIAS
E
F
PD
LD
ASY
AVDD1
FCO
FDOUT
TDOUT
SDOUT
CL
K
88
VD
D
_
C
O
R
E
EQ
O
RF
I
A
GND2
R
D
AC
O
V
C
DA
C
LD
A
C
O
XI
CLVOUT
1bit DAC
RF Signal Gen.
Digital
Signal
Processor
16K
SRAM
Command
Interface
Digital
Servo
Signal
Processor
S
ervo
S
ign
a
l Gen.
APC
PLL
AGND1
PCO
RE
S
ETB
DVDD
XO
D
GND
A
VDD2
CLK
Gen.
Gen.
S
UB
S
YQ
MC
K
DI
N/
D
O
U
T
BU
S
Y
S
UB
C
K
R/
W
WF
CK
S
UB
DA
T
A
DOUTA
LRCK
DCK
XB
UF
O
DV
DD
DG
ND
CL
K
DVDD
DG
ND
A
NA_
M
ONI
1
A
NA_
M
ONI
0
AD
_
M
ON
I1
AD
_
M
ON
I0
D
VDD
DFDIN
DFLRCK
DFDCK
VDD_CORE
DFSCKI
TE
S
T
_
OU
T
TE
S
T_
IN
Audio
Data
Rearranger
FLAG2
FLAG1
FLAG0
DGND
FLAG3
x8 Over
Sampling
Digital
Filter
Digital
Servo
Filter
Figure 5-1
IC1 VHIBU9543KV-1 : CD DSP IC (2/2)
(2/2)
DK-KP85PH
5 – 3
IC600 VHiOTK5268/-1 : OPTEK SOC IC (1/5)
Note :
I - Input,
O - Output
NAME
Hardware
PORT_TYPE
Pull-Up
O
I
P
S
S
O
A
T
A
D
_
L
F
GPIO1[3]/SPI_MOSI
GPIO1[3]/SPI_MOSI
O
I
P
S
S
O
S
C
_
L
F
GPIO1[5]/SPI_CS0
GPIO1[5]/SPI_CS0
O
I
P
S
S
O
K
C
S
_
L
F
GPIO1[2]/SPI_CLK
GPIO1[2]/SPI_CLK
O
I
P
S
S
O
N
D
R
W
P
_
P
M
A
GPIO1[6]/SPI_CS1
GPIO1[6]/SPI_CS1
O
I
P
S
S
O
T
S
R
_
L
F
GPIO1[4]/SPI_MISO
GPIO1[4]/SPI_MISO
O
I
O
I
P
G
I
N
I
_
X
R
IR/GPIO0[2]
IR/GPIO0[2]
O
I
O
I
P
G
O
Y
A
L
E
R
_
C
A
GPIO0[7]/SPDIF_OUT
GPIO0[7]/SPDIF_OUT
O
I
O
I
P
G
O
C
N
PWM1_OUT/GPIO1[10]/MODE2
PWM1_OUT/GPIO1[10]/MODE2
O
I
O
I
P
G
O
-
T
O
M
_
y
a
r
T
PWM0_OUT/GPIO1[9]/MODE1
PWM0_OUT/GPIO1[9]/MODE1
I
K
C
O
L
C
I
Z
H
K
2
3
I
P
PI32KHZ
PI32KHZ
O
K
C
O
L
C
O
Z
H
K
2
3
O
P
PO32KHZ
PO32KHZ
O
I
P
S
S
O
+
L
O
V
_
T
B
GPIO1[0]/UART0_TX/MODE0
GPIO1[0]/UART0_TX/MODE0
O
I
P
S
S
O
-
L
O
V
_
T
B
GPIO1[1]/UART0_RX
GPIO1[1]/UART0_RX
O
I
S
II
I
A
T
A
D
_
D
C
GPIO0[3]/I2S_IN_D5
GPIO0[3]/I2S_IN_D5
O
I
S
II
I
K
C
R
L
_
D
C
GPIO0[21]/I2S_0_LRCK
CD_BCLK
GPIO0[21]/I2S_0_LRCK
CD_BCLK
I
IIS
IO
GPIO0[20]/I2S_0_BCLK
PDVDD
PDVDD
POWER
P
PDVDD
P
R
E
W
O
P
3
V
1
_
D
D
V
P
PVDD_1V3
CD_EF
PVDD_1V3
CD_EF
O
GPIO
IO
GPIO0[24]/CD_EF
O
I
S
II
O
1
L
E
S
_
A
N
A
GPIO0[28]/I2S_IN_D2/MI2S_OUT_D2
GPIO0[28]/I2S_IN_D2/MI2S_OUT_D2
O
I
S
II
O
L
T
C
_
R
E
W
O
P
_
D
O
P
I
GPIO0[23]/I2S_IN_D1/MI2S_OUT_D1
GPIO0[23]/I2S_IN_D1/MI2S_OUT_D1
O
I
S
II
O
T
E
S
E
R
_
E
S
GPIO0[25]/I2S_IN_D4/I2S1_DOUT
GPIO0[25]/I2S_IN_D4/I2S1_DOUT
O
I
S
II
O
K
C
R
L
_
P
M
A
S
GPIO0[31]/MI2S_LRCK
GPIO0[31]/MI2S_LRCK
O
I
S
II
O
/I
K
L
C
B
_
P
M
A
S
GPIO0[30]/MI2S_BCLK
GPIO0[30]/MI2S_BCLK
O
I
S
II
O
K
L
C
M
_
P
M
A
S
GPIO0[1]/MCLK2
GPIO0[1]/MCLK2
O
I
P
S
S
O
N
E
_
R
E
W
O
P
_
B
S
U
GPIO0[9]/UART1_TX
GPIO0[9]/UART1_TX
O
I
S
II
O
W
/
R
=
G
L
F
C
_
E
S
GPIO0[29]/I2S_IN_D3/MI2S_OUT_D3
GPIO0[29]/I2S_IN_D3/MI2S_OUT_D3
O
I
S
II
O
A
D
S
_
E
S
GPIO0[27]/I2S1_LRCK
SE_SCL
GPIO0[27]/I2S1_LRCK
SE_SCL
O
IIS
IO
GPIO0[26]/I2S1_BCLK
DOOR LED
DOOR LED
O
IIS
IO
GPIO0[0]/MLCK1
I
T
E
S
E
R
I
T
E
S
E
R
CHIP_RESET
CHIP_RESET
O
I
O
I
P
G
O
C
N
JTDO/ROTARY_0B/GPI1[29]
JTDO/ROTARY_0B/GPI1[29]
O
I
O
I
P
G
O
C
N
JTDI/ROTARY_0A/GPI1[12]
JTDI/ROTARY_0A/GPI1[12]
O
I
O
I
P
G
I
T
C
E
T
O
R
P
_
S
Y
S
JTCK/ROTARY_1B/SPDIF_IN3/GPI2[31]
JTCK/ROTARY_1B/SPDIF_IN3/GPI2[31]
O
I
O
I
P
G
I
T
L
U
A
F
JTMS/ROTARY_1A/SPDIF_IN2/GPI2[30]
JTMS/ROTARY_1A/SPDIF_IN2/GPI2[30]
O
I
O
I
P
G
O
T
S
R
_
P
M
A
GPIO0[6]/SPDIF_IN_0
GPIO0[6]/SPDIF_IN_0
35
FAULT ERROR DETECTION
36
AMP RESET CONTROL
32
FIX TO L
33
FIX TO L
34
SYSTEM PROTECT DETECTION
29
CD SERVO CONTROL
30
DOOR LED CONTROL
31
SYSTEM RESET
26
CURRENT LIMITTER IC SELECTOR
27
CD SERVO CONTROL
28
CD SERVO CONTROL
23
SW CFLG R/W
24
CD DATA
25
CD CLOCK
20
ANALOG INPUT SELECTOR
21
IPOD_POWER_CTL
22
AUDIO
17
IO POWER INPUT
18
CORE POWER
19
CD_EF
14
AUDIO
15
AUDIO
16
AUDIO
11
STANDBY CLOCK
12
CONTROL BT_MODULE FF
13
CONTROL BT_MODULE FB
8
only pull up to unsw_3v3
9
Tray MOT-
10
STANDBY CLOCK
5
FL DRIVER DATA
6
REMOTE CONTROL SENSOR INPUT
7
CONTROL MAIN POWER SUPPLY
2
FL DRIVER CHIP SELECT
3
FL DRIVER CLOCK
4
AMP POWERDOWN CONTROL
L:POWER DOWN
Pin
No.
I/O
Group
Type
Outline
Feature
1
FL DRIVER DATA
DK-KP85PH
5 – 4
IC600 VHiOTK5268/-1: OPTEK SOC IC (2/5)
Note :
I - Input,
O - Output
NAME
Hardware
PORT_TYPE
Pull-Up
Pin
No.
I/O
Group
Type
Outline
Feature
P
R
E
W
O
P
S
S
V
P
PVSS
PVSS
O
I
I
M
E
O
/I
0
D
_
H
S
A
L
F
A21/SPI_DATA0
A21/SPI_DATA0
O
I
I
M
E
O
K
L
C
_
H
S
A
L
F
A20/SPI_CLK
A20/SPI_CLK
O
I
I
M
E
O
/I
3
D
_
H
S
A
L
F
A24/SPI_DATA3
A24/SPI_DATA3
O
I
I
M
E
O
S
C
_
I
P
S
A19/SPI_CS
A19/SPI_CS
O
I
I
M
E
O
/I
1
D
_
H
S
A
L
F
A22/SPI_DATA1
A22/SPI_DATA1
O
I
I
M
E
O
/I
2
D
_
H
S
A
L
F
A23/SPI_DATA2
A23/SPI_DATA2
P
R
E
W
O
P
D
D
V
D
P
PDVDD
PDVDD
O
I
P
S
S
O
T
E
S
E
R
_
R
E
N
U
T
GPIO0[15]/SD_DATA1
GPIO0[15]/SD_DATA1
O
I
P
S
S
O
D
E
L
_
E
U
L
B
_
T
B
GPIO0[14]/SD_DATA0
GPIO0[14]/SD_DATA0
O
I
P
S
S
O
C
N
GPIO0[12]/SD_CLK
GPIO0[12]/SD_CLK
O
I
P
S
S
O
Y
A
L
P
_
T
B
GPIO0[13]/SD_CMD
GPIO0[13]/SD_CMD
O
I
P
S
S
O
L
T
C
_
D
E
L
_
R
E
M
I
T
GPIO0[18]/SD_DETECT
GPIO0[18]/SD_DETECT
O
I
P
S
S
O
T
M
S
X
GPIO0[17]/SD_DATA3
GPIO0[17]/SD_DATA3
O
I
P
S
S
O
S
_
L
E
S
D
_
A
GPIO0[16]/SD_DATA2
GPIO0[16]/SD_DATA2
O
I
P
S
S
O
E
T
U
M
_
P
M
A
GPIO0[19]/SD_WP/NMI
GPIO0[19]/SD_WP/NMI
O
I
C
2
I
O
/I
A
D
S
GPIO1[7]/I2C0_SDA
GPIO1[7]/I2C0_SDA
O
I
C
2
I
O
L
C
S
GPIO1[8]/I2C0_SCL
GPIO1[8]/I2C0_SCL
P
R
E
W
O
P
3
V
1
_
D
D
V
P
PVDD_1V3
PVDD_1V3
O
I
S
II
O
A
T
A
D
_
P
A
M
S
GPIO0[22]/I2S_IN_D0/MI2S_OUT_D0
GPIO0[22]/I2S_IN_D0/MI2S_OUT_D0
I
T
S
E
T
O
+
T
O
M
GPIO0[8]/RIGHT_GPIO0[5]
GPIO0[8]/RIGHT_GPIO0[5]
I
B
S
U
I
D
I
_
B
S
U
USB_ID
USB_VBUS
USB_ID
USB_VBUS
USB
P
USB_VBUS
P
B
S
U
3
V
1
_
B
S
U
_
A
D
D
V
VDDA_USB_1V3
VDDA_USB_1V3
O
B
S
U
O
F
E
R
_
%
1
_
K
0
1
10K_1%_REF
10K_1%_REF
P
B
S
U
3
V
3
_
B
S
U
_
A
C
C
V
VCCA_USB_3V3
VCCA_USB_3V3
O
I
B
S
U
O
/I
-
D
USB_DM
USB_DM
O
I
B
S
U
O
/I
+
D
USB_DP
USB_DP
P
R
E
W
O
P
D
N
G
A
AGND
AGND
I
C
D
A
I
K
0
0
1
_
S
E
R
_
C
D
A
ADC_RES_100K
ADC_RES_100K
I
C
D
A
I
C
N
ADC_CH_3
ADC_CH_3
I
C
D
A
I
A
E
R
A
ADC_CH_2
ADC_CH_2
I
C
D
A
I
2
_
Y
E
K
ADC_CH_1
ADC_CH_1
I
C
D
A
I
1
_
Y
E
K
ADC_CH_0
ADC_CH_0
P
R
E
W
O
P
C
D
A
_
S
S
V
A
AVSS_ADC
AVSS_ADC
P
R
E
W
O
P
C
D
A
_
D
D
V
A
AVDD_ADC
AVDD_ADC
71
ANALOG POWER
72
ANALOG GROUND
68
MODEL & DESTINATION DETECTION
69
KEY 2 DETECTION
70
KEY 1 DETECTION
65
ANALOG GROUND
66
ADC RES 100K
67
R
62
USB 3.3V SUPPLY
63
USB D-
64
USB D+
59
USB VBUS
60
USB 1.2V
61
10K CURENT REFERENCE
56
SMAP_DATA FORM Soc
57
DOOR MTR +
58
USB ID SELECT
53
TUNER/AMP/DAP/EEPROM DATA
54
TUNER/AMP/DAP/EEPROM CLOCK
55
IO POWER INPUT
50
AMP SOFT MUTE CONTROL
51
BUS SWITCH SELECT CONTROL
52
AMP MUTE CONTROL
47
48
CONTROL BT POWER
49
TIMER LED CONTROL
44
IO POWER INPUT
45
TUNER RESET CONTROL
46
BLUETOOTH LED CONTROL
41
FLASH CHIP ENABLE
42
FLASH DATA
43
FLASH DATA
38
FLASH DATA
39
FLASH CLOCK
40
FLASH DATA
37
DIGITAL GROUND
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