Sharp CD-C440H (serv.man2) Service Manual ▷ View online
– 53 –
CD-C440H/CP-C440H
IC701 RH-iX0170AWZZ:System Microcomputer (IX0170AW) (2/2)
71
VLOAD
VLOAD
—
Negative power supply for FL drive To be connected to -30V
72-76
P105/FIP15-P101/FIP11
S04-S00
Output
FL display tube segment drive
77
P100/FIP10
G10
Output
FL display tube grid drive
78-80
P97/FIP9-P95/FIP7
G09-G07
Output
FL display tube grid drive
Terminal Name
Pin No.
Input/Output
Function
Port Name
IC501 VHiLC75396E-1:Audio Processor (LC75396E)
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
LTIN
LF1C1
LF1C2
LF1C3
LF2C1
LF2C2
LF2C3
LF3C1
LF3C2
LF3C3
LF4C1
LF4C2
LF4C3
LF5
LTOUT
LFIN
RF1C1
RF1C2
RF1C3
RF2C1
RF2C2
RF2C3
RF3C1
RF3C2
RF3C3
RF4C1
RF4C2
RF4C3
RF5
RTOUT
RFIN
RFCOM
49
LSELO
50
LINVIN1
51
L5
52
L4
53
L3
54
L2
55
L1
56
VDD
57
R1
58
R2
59
R3
60
R4
61
R5
62
RINVIN1
63
RSERO
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
RTIN
LFCOM
LFOUT
LRIN
LRCOM
LROUT
LVref
VSS
CE
DI
CL
Vref
RVref
RROUT
RRCOM
RRIN
RFOUT
Figure 53 BLOCK DIAGRAM OF IC
CD-C440H/CP-C440H
– 54 –
IC501 VHiLC75396E-1:Audio Processor (LC75396E)
1-3
RF1C1-RF1C3
Terminal to connect capacitor of filter configuration for equalizer F1 band
Connect the capacitor between LF1C1(RF1C1) and LF1C2(RF1C2) between LF1C2 (RF1C2) and LF1C3(RF1C3).
Connect the capacitor between LF1C1(RF1C1) and LF1C2(RF1C2) between LF1C2 (RF1C2) and LF1C3(RF1C3).
4-6
RF2C1-RF2C3
Terminal to connect capacitor of filter configuration for equalizer F2 band
Connect the capacitor between LF2C1(RF2C1) and LF2C2(RF2C2) between LF2C2 (RF2C2) and LF2C3(RF2C3).
Connect the capacitor between LF2C1(RF2C1) and LF2C2(RF2C2) between LF2C2 (RF2C2) and LF2C3(RF2C3).
7-9
RF3C1-RF3C3
Terminal to connect capacitor of filter configuration for equalizer F3 band
Connect the capacitor between LF3C1(RF3C1) and LF3C2(RF3C2) between LF3C2 (RF3C2) and LF3C3(RF3C3).
Connect the capacitor between LF3C1(RF3C1) and LF3C2(RF3C2) between LF3C2 (RF3C2) and LF3C3(RF3C3).
10-12
RF4C1-RF4C3
Terminal to connect capacitor of filter configuration for equalizer F4 band
Connect the capacitor between LF4C1(RF4C1) and LF4C2(RF4C2) between LF4C2 (RF4C2) and LF4C3(RF4C3).
Connect the capacitor between LF4C1(RF4C1) and LF4C2(RF4C2) between LF4C2 (RF4C2) and LF4C3(RF4C3).
13
RF5
Terminal to connect capacitor of filter configuration for equalizer F5 band
Terminal to connect the externally provided capacitor
Terminal to connect the externally provided capacitor
14
RTOUT
Equalizer output terminal
15
RFIN
Input terminal of Rch front side 4dB step control
16
RFCOM
Common terminal of Rch front side 1dB step control
17
RFOUT
Output terminal of Rch front side control
18*
RRIN
Input terminal of Rch rear side 4dB step control
19
RRCOM
Common terminal of Rch rear side 1dB step control
20*
RROUT
Output terminal of Rch rear side control
21
RVREF
Internal analog ground terminal
22
VREF
Connect the capacitor of about several 10 uF between Vref and AVSS (VSS) so as to prevent power supply
ripple in the VDD/2 voltage generating section.
ripple in the VDD/2 voltage generating section.
23
CL
Terminal to input serial data and clock for control
24
DI
Terminal to input serial data and clock for control
25
CE
Chip enable terminal. Data is written in the internal latch with a timing of changing H to L, and the specific
analog switch is actuated. Data transfer is enabled on the H level.
analog switch is actuated. Data transfer is enabled on the H level.
26
VSS
GND
27
LVREF
Internal analog ground terminal
28*
LROUT
Output terminal of Lch rear side control
29
LRCOM
Common terminal of Lch rear side 1dB step control
30
LRIN
Input terminal of Lch rear side 4dB step control
31
LFOUT
Output terminal of Lch front side control
32
LFCOM
Common terminal of Lch front side 1dB step control
33
LFIN
Input terminal of Lch front side 4dB step control
34
LTOUT
Equalizer output terminal
35
LF5
Terminal to connect capacitor of filter configuration for equalizer F5 band
Terminal to connect the externally provided capacitor
Terminal to connect the externally provided capacitor
36-38
LF4C3-LF4C1
Terminal to connect capacitor of filter configuration for equalizer F4 band
Connect the capacitor between LF4C1(RF4C1) and LF4C2(RF4C2) between LF4C2 (RF4C2) and LF4C3(RF4C3).
Connect the capacitor between LF4C1(RF4C1) and LF4C2(RF4C2) between LF4C2 (RF4C2) and LF4C3(RF4C3).
39-41
LF3C3-LF3C1
Terminal to connect capacitor of filter configuration for equalizer F3 band
Connect the capacitor between LF3C1(RF3C1) and LF3C2(RF3C2) between LF3C2 (RF3C2) and LF3C3(RF3C3).
Connect the capacitor between LF3C1(RF3C1) and LF3C2(RF3C2) between LF3C2 (RF3C2) and LF3C3(RF3C3).
42-44
LF2C3-LF2C1
Terminal to connect capacitor of filter configuration for equalizer F2 band
Connect the capacitor between LF2C1(RF2C1) and LF2C2(RF2C2) between LF2C2 (RF2C2) and LF2C3(RF2C3).
Connect the capacitor between LF2C1(RF2C1) and LF2C2(RF2C2) between LF2C2 (RF2C2) and LF2C3(RF2C3).
45-47
LF1C3-LF1C1
Terminal to connect capacitor of filter configuration for equalizer F1 band
Connect the capacitor between LF1C1(RF1C1) and LF1C2(RF1C2) between LF1C2 (RF1C2) and LF1C3(RF1C3).
Connect the capacitor between LF1C1(RF1C1) and LF1C2(RF1C2) between LF1C2 (RF1C2) and LF1C3(RF1C3).
48
LTIN
Equalizer input terminal
49
LSELO
Input selector output terminal
50
LINVIN1
Operational amplifier reverse input terminal for input gain setting
51-55
L5-L1
Input signal terminal
56
VDD
Power terminal
57-61
R1-R5
Input signal terminal
62
RINVIN1
Operational amplifier reverse input terminal for input gain setting
63
RSELO
Input selector output terminal
64
RTIN
Equalizer input terminal
Pin No.
Function
Terminal Name
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
– 55 –
CD-C440H/CP-C440H
1
VREF
Output
Reference voltage output (Vdda/2)
2
MPXIN
Input
Base band (multiplex) signal input
3
Vdda
—
Analog system power supply (+5V)
4
Vssa
—
Analog system ground
5
FLOUT
Output
Sub-carrier input (comparator input)
6
CIN
Input
Sub-carrier output (filter output)
7
T1
Input
Test input (to be always connected to ground)
8
T2
Input
Test input (standby control)
0: Normal operation/1: Standby state (crystal oscillation stop)
0: Normal operation/1: Standby state (crystal oscillation stop)
9*
T3 (RDCL)
Input/Output
Test I/O (RDS clock output)
10*
T4 (RDDA)
Input/Output
Test I/O (RDS data output)
11 *
T5 (RSFT)
Input/Output
Test I/O (Soft judgment control data output)
12
XOUT
Output
Crystal oscillation output
13
XIN
Input
Crystal oscillation input (external reference signal input)
14
Vddd
—
Digital system power supply
15
Vssd
—
Digital system ground
16*
T6 (ERROR/57K/BE1)
Input/Output
Test I/O (Error existence/nonexistence output/playback carrier output/error block
number output)
number output)
17*
T7 (CORREC/ARI-ID/BE0
Input/Output
Test I/O (Error existence/nonexistence output/SK detection output/error block
number output)
number output)
18*
SYNC
Input/Output
Block sync detection output
19*
RDS-ID
Output
RDS detection output
20
DO
Output
Data output
21
CL
Input
Clock input
Serial data interface (CCB)
22
DI
Input
Data input
23
CE
Input
Chip enable
24
SYR
Input
Sync and RAM address reset (positive logic)
ICT21 VHiLC72720/-1:RDS Decorder (LC72720)
Terminal Name
Pin No.
Input/Output
Function
Figure 55 BLOCK DIAGRAM OF IC
Vdda
VREF
VREF
FLOUT CIN
Vssa
Vddd
Vssd
RDS-ID
SYNC
SYR
XOUT
XIN
MPXIN
DO
CL
DI
CE
CL
DI
CE
T1
T2
T3~T7
REFERENCE
VOLTAGE
57kHz
BPF
(SCF)
ANTIALIASING
FILTER
CCB
TEST
SMOOTHING
FILTER
RAM
(24 BLOCK DATA)
ERROR CORRECTION
(SOFT DECISION)
PLL
(57kHz)
CLOCK
RECOVERY
(1187.5Hz)
DATA
DECODER
SYNC
DETECT-1
OSC/DIVIDER
MEMORY CONTROL
CLK(4.332MHz)
SYNC
DETECT-2
SYNC/EC CONTROLLER
1
5
6
3
4
2
20
21
22
23
7
8
9,10,11
16,17
16,17
13
12
24
18
19
15
14
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
CD-C440H/CP-C440H
– 56 –
FL701 : VVKBJ549GK/-1 FL Display
Figure 56-2 FL DISPLAY
IC601 RH-iX0171AWZZ: System Microcomputer(IX0171AW)
1
REC/PB
CD MUTE
CD RES
SL-
SL+
CQ CK
COIN
SQ OUT
WRQ
RWC
P94
CD/TAPE CONTROL
µ
PD 78045A
P93
P92
P91
P90
P81
P80
Vdd
SCK 0
SO 0
Si 0
P24
P23
SCK 1
SO 1
Si 1
RESET
P74
P73
AVss
ANi 7
ANi 6
ANi 5
ANi 4
SRS
DOLBY
SPAN 9K
SRS PASS
SRS 3D
SRS A
SRS B
SRS iNH
T1 Cro2
CD U/D SW
DISC No. SW
CD O/C SW
TA MOTOR
TA SOL
F/R SPEED
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
PU-IN SW
MAIN
µ
COM
DRF
T1 RUN
T2 RUN
SPE 5
17
18
19
20
21
22
23
24
REC MUT
PB EQ
Hi SPEED
BEET CUT
BiAS
T1/T2
PB MUT
T2 BFP
T2 AFP
4SP
BALANCE
ANi 3
ANi 2
ANi 1
ANi 0
AVdd
AVref
P04
Vss
X1
X2
P37
P36
P35
P34
P33
40
39
38
37
36
35
34
33
32
31
30
39
38
37
36
35
34
33
32
31
30
29
28
28
27
26
25
26
25
65
66
67
68
69
70
71
72
73
74
75
66
67
68
69
70
71
72
73
74
75
76
77
77
78
79
80
79
80
P95
P96
P97
P100
P101
P102
P103
P104
P105
V Load
P106
P107
P110
P111
P112
P113
SPE 4
SPE 3
SPE 2
SPE 1
TACUM SW
LINE MUT
SUR MUT
CEN MUT
SYS MUT
MIC
T2CrO
RELAY
POWER
SP DET
CLK
DATA
DOLBY
PRO
EN
48
47
46
45
44
43
42
41
P114
P115
P116
P117
P120
P121
P122
P123
P124
P125
P126
P127
Vdd
P70
P71
P72
iC
INT 0
INT 1
INT 2
INT 3
P30
P31
P32
Figure 56-1 BLOCK DIAGRAM OF IC
WIRING OF PRIMARILY SUPPLY LEADS (FOR UK ONLY)
Figure 56-3
If any one of the bands shown in Fig. 55-3 is removed for some
reason, be sure replace it to the original position and same
appearance as before.
reason, be sure replace it to the original position and same
appearance as before.
Nylon Band 80mm
92LN-BAND 1318A
92LN-BAND 1318A
AC Power
Supply Cord
Supply Cord
Core
Power
Transformer
Transformer
Brown
Blue
1
2
3
X-BASS
kHz
MHz
RDS
EON
TA
PTY
TP
33 250 1k
4k 16k
SLEEP
ST 4-SP
SRS
MEMORY
PRO LOGIC
REC
TI
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