Panasonic KX-UT670RU Service Manual ▷ View online
85
KX-UT670RU
H25
VDDO_3
VDDO
P
Digital I/O supply-3.3V
J1
GPIO22
GPIO22
NC
Not in use
J2
GPIO17
GPIO17
NC
Not in use
J3
GPIO18
SDIO0D2(DAT2)
IO
SDIO0 data bit2
J4
GPIO14
UART1_TXD
O
UART1 transmit
J5
GPIO15
UART1_RXD
O
UART1 receive
J21
CLD5
CLD5
IO
PIF data bit 5
J22
CLD7
CLD7
IO
PIF data bit 7
J23
CLD17
CLD17
NC
Not in use
J24
NVI_A1
NVI_A1
O
NVI address bus
J25
NVI_A6
NVI_A6
O
NVI address bus
K1
GPIO24
GPIO24
NC
Not in use
K2
GPIO23
GPIO23
NC
Not in use
K3
GPIO21
SDIO0_WP
I
SDIO1 SD card write protect
K4
GPIO20
SDIO0_SDCD_B(DET)
I
SDIO0 SD card detect
K5
GPIO19
SDIO0D3(DAT3)
IO
SDIO0 data bit3
K10
VDDC1
VDDC
P
Digital core supply-1.2V
K11
VDDC2
VDDC
P
Digital core supply-1.2V
K12
VDDC3
VDDC
P
Digital core supply-1.2V
K13
VDDC4
VDDC
P
Digital core supply-1.2V
K14
VDDC5
VDDC
P
Digital core supply-1.2V
K15
VDDC6
VDDC
P
Digital core supply-1.2V
K16
VDDC7
VDDC
P
Digital core supply-1.2V
K21
CLD8
CLD8
IO
PIF data bit 8
K22
VDDO2_1
VDDO
P
Digital I/O supply 2
K23
CLD19
CLD19
NC
Not in use
K24
NVI_A2
NVI_A2
NC
Not in use
K25
NVI_A9
NVI_A9
O
NVI address bus
L2
GPIO25
GPIO25
NC
Not in use
L3
GPIO28
GPIO28
NC
Not in use
L4
GPIO27
GPIO27
NC
Not in use
L5
GPIO26
LCD_RESETB
O
LCD reset signal
L10
VDDC_8
VDDC
P
Digital core supply-1.2V
L11
VSS_13
VSS
GND
Ground
L12
VSS_14
VSS
GND
Ground
L13
VSS_15
VSS
GND
Ground
L14
VSS_16
VSS
GND
Ground
L15
VSS_17
VSS
GND
Ground
L16
VDDC_9
VDDC
P
Digital core supply-1.2V
L21
CLFP
CLFP
IO
PIF host ready 1
L22
VDDO2_2
VDDO
P
Digital I/O supply 2
L23
CLCP
CLCP
O
PIF read enable
L24
NVI_A8
NVI_A8
O
NVI address bus
M1
GPIO30
SDIO0_CLK
IO
SDIO0 clock
M2
GPIO36
USB0_PWRON(500mA)
O
USB0 power enable
M3
GPIO32
SDIO0D1(DAT1)
IO
SDIO0 data bit1
M4
GPIO33
GPIO33
O
Test point(PCM_CLK)
M5
GPIO29
SDIO0_CMD
IO
SDIO0 command
M10
VDDC_10
VDDC
P
Digital core supply-1.2V
M11
VSS_18
VSS
GND
Ground
M12
VSS_19
VSS
GND
Ground
M13
VSS_20
VSS
GND
Ground
M14
VSS_21
VSS
GND
Ground
M15
VSS_22
VSS
GND
Ground
M16
VDDC_11
VDDC
P
Digital core supply-1.2V
M21
CLLP
CLLP
IO
PIF write enable
M22
NVI_A4
NVI_A4
NC
Not in use
M23
NVI_A5
NVI_A5
NC
Not in use
M24
NVI_A11
NVI_A11
O
NVI address bus
M25
NVI_A12
NVI_A12
O
NVI address bus
N1
VDDO_4
VDDO
P
Digital I/O supply-3.3V
N2
GPIO34
GPIO34
O
Test point(PCM_OUT)
N3
OTP_2P5
VDD
P
OTP supply-2.5V
N4
GPIO38
LCD_CONT
O
LCD control
N5
GPIO39
RUN
O
output to Run port of PIF
N10
VDDC_12
VDDC
P
Digital core supply-1.2V
N11
VSS_23
VSS
GND
Ground
Pin No.
Terminal name
Function
I/Osetting
Contents Control
remark
86
KX-UT670RU
N12
VSS_24
VSS
GND
Ground
N13
VSS_25
VSS
GND
Ground
N14
VSS_26
VSS
GND
Ground
N15
VSS_27
VSS
GND
Ground
N16
VDDC_13
VDDC
P
Digital core supply-1.2V
N21
NVI_A7
NVI_A7
O
NVI address bus
N22
VSS_28
VSS
GND
Ground
N23
NVI_A10
NVI_A10
O
NVI address bus
N24
NVI_A13
NVI_A13
O
NVI address bus
N25
NVI_A16
NVI_A16
NC
Not in use
P1
GPIO31
SDIO0D0(DAT0)
IO
SDIO0 data bit0
P2
GPIO35
LCD_BL_PWM
O
LCD backlight PWM
P3
GPIO40
PIF_HRDY2
IO
Connect to 2.8V through a pull up resistor
P4
GPIO42
GPIO42
NC
Not in use
P5
XTALVDD_1P2
XTALVDD
P
Main crystal supply-1.2V
P10
VDDC_14
VDDC
P
Digital core supply-1.2V
P11
VSS_29
VSS
GND
Ground
P12
VSS_30
VSS
GND
Ground
P13
VSS_31
VSS
GND
Ground
P14
VSS_32
VSS
GND
Ground
P15
VSS_33
VSS
GND
Ground
P16
VDDC_15
VDDC
P
Digital core supply-1.2V
P21
NVI_A17
NVI_A17
NC
Not in use
P22
NVI_A15
NVI_A15
O
Address latch enable
P23
NVI_A14
NVI_A14
O
Command latch enable
P24
NVI_A18
NVI_A18
NC
Not in use
P25
VDDO_5
VDDO
P
Digital I/O supply-3.3V
R1
XTALP
XTALP
IO
Main 25MHz XTAL input
R2
XTALVSS
VSS
GND
XTAL Ground
R3
GPIO37
USB0_WRFLT
I
USB1 power fault
R4
GPIO41
LCD_PWR
O
LCD supply control
R5
XTALVDD_2P5
VDD
P
Main crystal supply-2.5V
R10
VDDC_16
VDDC
P
Digital core supply-1.2V
R11
VSS_34
VSS
GND
Ground
R12
VSS_35
VSS
GND
Ground
R13
VSS_36
VSS
GND
Ground
R14
VSS_37
VSS
GND
Ground
R15
VSS_38
VSS
GND
Ground
R16
VDDC_17
VDDC
P
Digital core supply-1.2V
R21
NVI_A24
NVI_A24
IO
Connect to ground through a 10k
Ω
R22
NVI_A21
NVI_A21
NC
Not in use
R23
NVI_A20
NVI_A20
NC
Not in use
R24
NVI_A22
NVI_A22
NC
Not in use
R25
NVI_A19
NVI_A19
NC
Not in use
T1
XTALN
XTALN
IO
Main 25MHz XTAL input
T2
KEY_IN0
KEY_IN0
NC
Not in use
T3
KEY_IN1
EHS_DET2
IO
EHS detect 2
T4
KEY_IN2
KEY_IN2
NC
Not in use
T5
NC4
NC
NC
Not in use
T10
VSS_39
VSS
GND
Ground
T11
VSS_40
VSS
GND
Ground
T12
VSS_41
VSS
GND
Ground
T13
SGMII_VSS_1
SGMII_VSS
GND
SGMII Ground
T14
SGMII_VDD_1P2
SGMII_VDD
P
SGMII core supply-1.2V
T15
EPHY_AVSS_1
EPHY_AVSS
GND
EPHY Analog Ground
T16
EPHY_AVSS_2
EPHY_AVSS
GND
EPHY Analog Ground
T21
NVI_D7
NVI_D7
IO
NVI data bus
T22
VSS_42
VSS
GND
Ground
T23
NVI_D0
NVI_D0
IO
NVI data bus
T24
NVI_A25
NVI_A25
IO
Connect to ground through a 10k
Ω
T25
NVI_A23
NVI_A23
IO
Connect to ground through a 10k
Ω
U1
KEY_IN3
KEY_IN3
NC
Not in use
U2
KEY_IN4
RST_SW
I
Reset switch input
U3
KEY_IN5
PoE_DET
IO
PoE detect
U4
KEY_IN6
HOOK-SW_IN
IO
Hook switch input
U5
VSS_43
VSS
GND
Ground
U21
NVI_D12
NVI_D12
NC
Not in use
Pin No.
Terminal name
Function
I/Osetting
Contents Control
remark
87
KX-UT670RU
U22
NVI_D8
NVI_D8
NC
Not in use
U23
NVI_D2
NVI_D2
IO
NVI data bus
U24
NVI_D1
NVI_D1
IO
NVI data bus
V1
VDDO_6
PoE_DET
P
Digital I/O supply-3.3V
V2
KEY_IN7
PD_DET
IO
Power detect
V3
KEY_OUT0
mode0
IO
mode0 test pin
V4
KEY_OUT1
mode1
IO
mode1 test pin
V5
VSS_44
VSS
GND
Ground
V21
NVI_D15
NVI_D15
NC
Not in use
V22
NVI_D11
NVI_D11
NC
Not in use
V23
NVI_D5
NVI_D5
IO
NVI data bus
V24
NVI_D4
NVI_D4
IO
NVI data bus
V25
NVI_D3
NVI_D3
IO
NVI data bus
W1
KEY_IN8
KEY_IN8
NC
Not in use
W2
VSS_45
VSS
GND
Ground
W3
KEY_OUT2
KEY_OUT2
O
KEY_OUT2 test pin
W4
KEY_OUT4
KEY_OUT4
NC
Not in use
W5
VREG3P0_AVSS
VREG3P0_AVSS
GND
VREG Analog Ground
W21
VSS_46
VSS
GND
Ground
W22
NVI_WE_B
NVI_WE_B
O
NVI write enable
W23
NVI_D9
NVI_D9
NC
Not in use
W24
NVI_D10
NVI_D10
NC
Not in use
W25
NVI_D6
NVI_D6
IO
NVI data bus
Y1
VREG3P0_VDD_3P3
VREG3P0_VDD
P
3.0V regulator input(Connect to 3.3V)
Y2
KEY_OUT3
KEY_OUT3
NC
Not in use
Y3
KEY_OUT6
KEY_OUT6
NC
Not in use
Y4
TDO
TDO
O
ARAM JTAG data out
Y5
VSS_47
VSS
GND
Ground
Y21
NVI_RST_B
NVI_RST
O
NVI reset signal
Y22
NVI_NAND_CS_B
NVI_NAND_CS
O
NVI NAND flash chip select
Y23
NVI_CS1
NVI_CS1
NC
Not in use
Y24
NVI_D14
NVI_D14
NC
Not in use
Y25
NVI_D13
NVI_D13
NC
Not in use
AA1
VSS_48
VSS
GND
Ground
AA2
KEY_OUT5
SP_LED
O
Speaker-phone LED
AA3
KEY_OUT7
KEY_OUT7
NC
Not in use
AA4
TMS
TMS
I
ARAM JTAG mode select
AA5
VREG3P0_VOUT
VREG3P0_VOUT
P
3.0V regulator output
AA6
MIC_AVDD_3P0_1
MIC_AVDD
P
APM mic analog supply-3.0V
AA7
MIC_AVDD_3P0_2
MIC_AVDD
P
APM mic analog supply-3.0V
AA8
LDOCOMP
LDOCOMP
IO
Connect a 0.1ÉþF between this pin and ground
AA9
SPK0_VDD_3P0
SPK0_VDD
P
APM codec0 speaker supply-3.0V
AA10
SPK0_VSS
SPK0_VSS
GND
SPK Ground
AA11
SPK_AVDD_3P0
SPK_AVDD
P
APM speaker analog supply-3.0V
AA12
SPK1_VDD_3P0
SPK1_VDD
P
APM codec1 speaker supply-3.0V
AA13
TSC_VTSCOUT
TSC_VTSCOUT
IO
Connect a 1
µF capasitor
between this pin and ground
AA14
TSC_AVDD_3P3
TSC_AVDD
P
Touchscreen analog supply-3.3V
AA15
NC5
NC
NC
Not in use
AA16
SGMII_VSS_2
SGMII_VSS
GND
SGMII Ground
AA17
SGMII_PLLVDD_1P2
SGMII_PLLVDD
P
SGMII PLL core supply-1.2V
AA18
EPHY_AVSS_3
EPHY_AVSS
GND
EPHY Analog Ground
AA19
EPHY_PLLVDD_1P2
EPHY_PLLVDD
P
Ethernet PHY PLL core supply-1.2V
AA20
EPHY_AVDD_1P2_1
EPHY_AVDD
P
Ethernet PHY analog core supply-1.2V
AA21
SGMII_SEL
SGMII_SEL
IO
Test mode pin(Connect to Ground)
AA22
NVI_NAND_RDY_B
NVI_NAND_RDY
I
NVI NAND flash ready signal
AA23
NVI_OE_B
NVI_OE
O
NVI output enable
AA24
NVI_CS2
NVI_CS2
NC
Not in use
AA25
NVI_CS0
NVI_CS0
NC
Not in use
AB1
KEY_OUT8
SPK_shutdown
O
Speaker amp switch
AB2
VSS_49
VSS
GND
Ground
AB3
TCK
TCK
I
ARAM JTAG clock
AB4
TRST_B
TRST
I
ARAM JTAG reset
AB6
MIC0_BN
MIC0_BN
I
CODEC0 muxB differential mic input
AB7
MIC0_B_BIAS
MIC0_B_BIAS
O
CODEC0 muxB mic bias voltage output
AB8
MIC1_AN
MIC1_AN
NC
Not in use
AB9
MIC2_BP
MIC2_BP
I
CODEC2 muxB differential mic input
Pin No.
Terminal name
Function
I/Osetting
Contents Control
remark
88
KX-UT670RU
AB10
SPK0_BP
SPK0_BP
O
CODEC0 muxB differential speaker output
AB11
SPK_DVSS
SPK_DVSS
GND
SPK Dgital Ground
AB12
SPK1_AN
SPK1_AN
NC
Not in use
AB13
TSC_NEGIN
TSC_NEGIN
I
Auxiliary ADC negative input(Connect to Ground)
AB14
TSC_AVSS
TSC_AVSS
GND
TSC Analog Ground
AB15
SGMII0_TXDN
SGMII0_TXDN
O
SGMII port0 differential serial data output(NC)
AB16
SGMII_PLLAVDD_3P3
SGMII_PLLAVDD
P
SGMII PLL supply-3.3V
AB17
SGMII1_TXDN
SGMII1_TXDN
O
SGMII port1 differential serial data output(NC)
AB18
EPHY_AVSS_4
EPHY_AVSS
GND
EPHY Analog Ground
AB19
EPHY_AVSS_5
EPHY_AVSS
GND
EPHY Analog Ground
AB20
EPHY_TVCOI
EPHY_TVCOI
NC
Not in use
AB21
EPHY_AVDD_1P2_2
EPHY_AVDD
P
Ethernet PHY analog core supply-1.2V
AB22
EPHY_AVDD_3P3_1
EPHY_AVDD
P
Ethernet PHY analog core supply-3.3V
AB23
NVI_NAND_OE_B
NVI_NAND_OE
O
NVI NAND flash output enable
AB24
NVI_NAND_WE_B
NVI_NAND_WE
O
NVI NAND flash write enable
AB25
VDDO_7
VDDO
P
Digital I/O supply-3.3V
AC1
VDDO_8
VDDO
P
Digital I/O supply-3.3V
AC2
POR_RST_B
POR_RST
O
Power on reset monitor output
AC3
TDI
TDI
I
ARAM JTAG data in
AC4
UART0_RXD
UART0_RXD
I
UART0 receive
AC6
MIC0_BP
MIC0_BP
I
CODEC0 muxB differential mic input
AC7
MIC0_A_BIAS
MIC0_A_BIAS
I
CODEC0 muxA mic bias voltage output
AC8
MIC1_AP
MIC1_AP
NC
Not in use
AC9
MIC2_BN
MIC2_BN
I
CODEC2 muxB differential mic input
AC10
SPK0_BN
SPK0_BN
O
CODEC0 muxB differential speaker output
AC11
SPK_AVSS
SPK_AVSS
GND
SPK Analog Ground
AC12
SPK1_AP
SPK1_AP
NC
Not in use
AC13
TSC_AUXIN
TSC_AUXIN
I
Auxiliary ADC positive input
AC14
TSC_XMINUS_LR
TSC_XMINUS_LR
I
X-position input lower right panel driver
AC15
SGMII0_TXDP
SGMII0_TXDP
NC
Not in use
AC16
SGMII_VSS_3
SGMII_VSS
GND
SGMII Ground
AC17
SGMII1_TXDP
SGMII1_TXDP
O
SGMII port1 differential serial data output(NC)
AC18
EPHY_AVSS_6
EPHY_AVSS
GND
EPHY Analog Ground
AC19
EPHY_RDAC
EPHY_RDAC
IO
DAC bias registor
AC20
EPHY_EXTVREF
EPHY_EXTVREF
NC
Not in use
AC21
EPHY_AVDD_1P2_3
EPHY_AVDD
P
Ethernet PHY analog core supply-1.2V
AC22
EPHY_BVDD_3P3
EPHY_BVDD
P
Ethernet PHY bias VDD-3.3V
AC23
EPHY_AVDD_3P3_2
EPHY_AVDD
P
Ethernet PHY analog core supply-3.3V
AC24
EPHY_AVSS_7
EPHY_AVSS
GND
EPHY Analog Ground
AC25
EPHY1_TD3P
EPHY1_TD3P
IO
Ethernet PHY port1 transmit/receive pair 3
AD1
VSS_50
VSS
GND
Ground
AD2
VSS_51
VSS
GND
Ground
AD3
UART0_TXD
UART0_TXD
O
UART0 Transmit
AD4
JTAG_SEL
JTAG_SEL
I
JTAG interface select
AD6
MIC0_AP
MIC0_AP
I
CODEC0 muxA differential mic input
AD7
MIC1_A_BIAS
MIC1_A_BIAS
O
CODEC1 muxA mic bias voltage output
AD8
MIC1_BP
MIC1_BP
I
CODEC1 muxB differential mic input
AD9
MIC2_AN
MIC2_AN
I
CODEC2 muxA differential mic input
AD10
SPK0_AP
SPK0_AP
O
CODEC0 muxA differential speaker output
AD11
SPK1_VSS
SPK1_VSS
GND
SPK Ground
AD12
SPK1_BN
SPK1_BN
O
CODEC1 muxB differential speaker output
AD13
TSC_YMINUS_LL
TSC_YMINUS_LL
I
Y-position input lower left panel driver
AD14
TSC_XPLUS_UL
TSC_XPLUS_UL
I
X-position input upperer left panel driver
AD15
SGMII0_RXDP
SGMII0_RXDP
NC
Not in use
AD16
SGMII_CLKP
SGMII_CLKP
I
SGMII serial clock input
AD17
SGMII1_RXDN
SGMII1_RXDN
NC
Not in use
AD18
EPHY0_TD3P
EPHY0_TD3P
IO
Ethernet PHY port0 transmit/receive pair 3
AD19
EPHY0_TD2P
EPHY0_TD2P
IO
Ethernet PHY port0 transmit/receive pair 2
AD20
EPHY0_TD1P
EPHY0_TD1P
IO
Ethernet PHY port0 transmit/receive pair 1
AD21
EPHY0_TD0P
EPHY0_TD0P
IO
Ethernet PHY port0 transmit/receive pair 0
AD22
EPHY1_TD0P
EPHY1_TD0P
IO
Ethernet PHY port1 transmit/receive pair 0
AD23
EPHY1_TD1P
EPHY1_TD1P
IO
Ethernet PHY port1 transmit/receive pair 1
AD24
EPHY1_TD2P
EPHY1_TD2P
IO
Ethernet PHY port1 transmit/receive pair 2
AD25
EPHY1_TD3N
EPHY1_TD3N
IO
Ethernet PHY port1 transmit/receive pair 3
AE1
VSS_52
VSS
GND
Ground
AE2
VDDO_9
VDDO
P
Digital I/O supply-3.3V
AE3
RST_B
RST_B
I
Chip hardware reset input
Pin No.
Terminal name
Function
I/Osetting
Contents Control
remark
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