Panasonic KX-UT670RU Service Manual ▷ View online
13
KX-UT670RU
4.4.
LCD Backlight
The circuit of the LCD backlight is composed of the step-up convertor circuit of the fixed current type.
The connector for backlight of LCD module is connected with CN303.
Output current flows in order of L332,LCD module,L340 and R324/R325.
Output current is fixed by pin 3(200mV) of IC302.
If LCD backlight connector is not connected,IC302 operates so that may step up the voltage at pin3(FB) of IC302 to 200mV.
But, the output voltage is limited with the terminal of pin5 of IC302 as for the output voltage.
The brightness of the LCD backlight is controlled in the ratio of ON/OFF of the voltage supplied from IC1(CPU) to pin4 of IC302
The connector for backlight of LCD module is connected with CN303.
Output current flows in order of L332,LCD module,L340 and R324/R325.
Output current is fixed by pin 3(200mV) of IC302.
If LCD backlight connector is not connected,IC302 operates so that may step up the voltage at pin3(FB) of IC302 to 200mV.
But, the output voltage is limited with the terminal of pin5 of IC302 as for the output voltage.
The brightness of the LCD backlight is controlled in the ratio of ON/OFF of the voltage supplied from IC1(CPU) to pin4 of IC302
4.5.
Touch Panel
To recognize coordinates of the pushed point
When X coordinates are detected
After the voltage is impressed between the plus and the minus of X coordinates, the voltage value of the pushed part is read with
the terminal on Y coordinates side.
When X coordinates are detected
After the voltage is impressed between the plus and the minus of X coordinates, the voltage value of the pushed part is read with
the terminal on Y coordinates side.
When Y coordinates are detected
After the voltage is impressed between the plus and the minus of Y coordinates, the voltage value of the pushed part is read with
the terminal on X coordinates side.
After the voltage is impressed between the plus and the minus of Y coordinates, the voltage value of the pushed part is read with
the terminal on X coordinates side.
This operation is repeated, and detection and the movement of coordinates are recognized.
XPLUS
XMINUS
YPLUS
YMINUS
IC1
AD14 TSC_XPLUS_UL
AE13 TSC_YPLUS_UR
AC14 TSC_XMINUS_LR
AD13 TSC_YMINUS_LL
AE14 TSC_WIPER
AC13 TSC_AUXIN
AB13 TSC_NEGIN
AA13 TSC_VTSCOUT
E22 CLD0
C23 CLD1
AC7
MIC0_A_BIAS
F22 CLD2
B24 CLD3
G22 CLD4
J21 CLD5
H22 CLD6
J22 CLD7
K21 CLD8
D23 CLD9
C24
AD6
MIC0_AP
AE6
MIC0_AN
AD10
SPK0_AP
AE10
SPK0_AN
AB7
MIC0_B_BIAS
AC6
MIC0_BP
AB6
MIC0_BN
AB10
SPK0_BP
AC10
SPK0_BN
AD7
MIC1_A_BIAS
AC8
MIC1_AP
AB8
MIC1_AN
AC12
SPK1_AP
AB12
SPK1_AN
XPLUS
YMINUS
XMINUS
XMINUS
YPLUS
CN302
1
2
3
4
D308
2
1
3
D309
2
1
3
D310
2
1
3
D311
2
1
3
3.3V
DG
C385 22p 1 2 3 45
6
7
8
DG
L339
1
2
3
4
2
3
4
5
6
7
8
YPLUS
XMINUS
YMINUS
XPLUS
To CN302
Resistive Type of Transparent Touch-panel
14
KX-UT670RU
4.6.
Reset Circuit
The RESET signal is output from the port of POR_RST_B according to the voltage value(3.3V) supplied to IC1 and the voltage
value that IC generates.
This RESET signal flows in order of pin2 of IC402,pin4 of IC402, and R408.
Low level period of RESET signal needs more than 100ms.
value that IC generates.
This RESET signal flows in order of pin2 of IC402,pin4 of IC402, and R408.
Low level period of RESET signal needs more than 100ms.
The reason to have taken out this RESET signal outside is for use of development.
4.7.
Ethernet Circuit
IC1(CPU) has PHY function for the interface of ETHERNET and has ETHERNET function 10Base-T,
100Base-TX and 1000Base-T.
It is composed of a simple circuit as shown in the above figure.
100Base-TX and 1000Base-T.
It is composed of a simple circuit as shown in the above figure.
LAN port, PC port, and IC1 are insulated mutually electrically.
The power supply for PoE is obtained from JK1 on LAN port side.
As for the voltage generated from PoE, 12V is output by the operation explained by 4-2.
The power supply for PoE is obtained from JK1 on LAN port side.
As for the voltage generated from PoE, 12V is output by the operation explained by 4-2.
IC402
1
*G
2
A
4
Y
5
VCC
3
GND
R418 10k
R419
1k
DG
3.3V
R408
0
R417
2.2k
R482
NC
C417
1u
C459
1u 6.3
E17
BBL_VDD
BBL_VDD
E18
BBL_AVSS
BBL_AVSS
AE3
RST_B
RST_B
AC2
POR_RST_B
POR_RST_B
R1
XTALP
XTALP
T1
XTALN
XTALN
D21
NC3
NC3
T5
NC4
NC4
AA15
NC5
NC5
AE4
NC6
NC6
EPHY0_TX0_P
EPHY0_TD0_N
EPHY0_TD1_P
EPHY0_TD1_N
EPHY0_TD2_P
EPHY0_TD2_N
EPHY0_TX3_P
EPHY0_TX3_N
EPHY1_TX3_P
EPHY1_TX3_N
EPHY1_TX2_P
EPHY1_TX2_N
EPHY1_TX1_P
EPHY1_TX1_N
EPHY1_TX0_P
EPHY1_TX0_N
PoE_Pluse
JK2
1
2
3
4
5
6
7
8
9
R1
75
R2
75
R3
75
R4
75
G
C2
0.1u 25
C5
0.1u 25
C6
0.1u
25
C7
0.1u
25
C8
0.1u
25
C9
0.1u
25
R5
75
R6
75
R7
75
R8 75
C10 0.1u 250
C11
0.1u 250
C12 0.1u 250
C13 0.1u 250
G
D1
4
1
3
2
D2
4
1
3
2
JK1
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
DG
DG
DG
C3
0.1u 25
C4
0.1u 25
R43
1.24k
C144
0.1u
250
C145
0.1u
250
C146
0.1u
250
C147
0.1u
250
L25
L24
L23
L22
E_EXTVREF
TVCOI
DG
DG
DG
DG
DG
DG
DG
DG
D22
D21
D24
D23
D26
D25
D28
D27
D29
D30
D31
D32
D33
D34
D35
D36
SGMII_SEL
SGMII0_RXDN
SGMII0_RXDP
SGMII0_TXDP
SGMII0_TXDN
SGMII0_TXDN
SGMII1_RXDP
SGMII1_RXDN
SGMII1_RXDN
SGMII1_TXDP
SGMII1_TXDN
SGMII1_TXDN
SGMII_CLKP
AD21
EPHY0_TD0P
SGMII_CLKN
NC7
NC8
NC8
AE21
EPHY0_TD0N
AD20
EPHY0_TD1P
AE20
EPHY0_TD1N
AD19
EPHY0_TD2P
AE19
EPHY0_TD2N
AD18
EPHY0_TD3P
AE18
EPHY0_TD3N
AD22
EPHY1_TD0P
AE22
EPHY1_TD0N
AD23
EPHY1_TD1P
AE23
EPHY1_TD1N
AD24
EPHY1_TD2P
AE24
EPHY1_TD2N
AC25
EPHY1_TD3P
AD25
EPHY1_TD3N
AC19
EPHY_RDAC
AC20
EPHY_EXTVREF
AB20
EPHY_TVCOI
T1
4
20
5
24
21
19
22
3
2
1
6
23
17
16
18
13
15
14
12
11
10
9
8
7
T2
4
20
5
24
21
19
22
3
2
1
6
23
17
16
18
13
15
14
12
11
10
9
8
7
1
C14
33p
2000
C1
33p
2000
C240
NC
C241
NC
LAN
PC
15
KX-UT670RU
4.8.
Analog Circuit
DG
DG
DG
DG
DG
DG_SP
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
3.3V
C303
10u 6.3
C328
10u 6.3
C337
10u 6.3
LED5.0
L303
L304
DG
DG
SG
R331 0
R332 0
C331 10u
C332 10u
C335 0.1u
SG
C316 0.22u
C317 0.22u
C317 0.22u
C309
1u
10
C304
0.47u
C305
0.47u
0.47u
C305
0.47u
C326
0.47u
C327
0.47u
C318
0.47u
C319
0.47u
0.47u
C319
0.47u
R308 1k
R312
1k
R311
1k
R313
0
R323
0
R303 1k
R301
1k
R302
2.2k
R329
0
R304
NC
C307 100p
C306
100p
C315
NC
C314
NC
C320
1000p
C321 1000p
C323
1000p
C322
1000p
C329
1000p
C333
1000p
C302 1000p
C301
1000p
C312
1000p
L306
L307
L307
L311
L314
L315
L322
L323
L324
L301
L302
EHS_GND
EHS_TX/RX
SPK_shutdown
EHS_DET
R326 NC
CN304
1
2
3
4
5
6
7
8
9
10
DL301
1
2
3
C308
10u
16
SPH_MICP
SPH_MICN
HS_MICN
HS_SPP
HD_MIC
SPH_SPN
HD_SP
HS_SPN
HD_GND
HS_MICP
SPH_SPP
C330
1u 6.3
C292
1u 6.3
DG
C334
100p
50
C344
100p
50
C346
NC
C290
1u 6.3
C291
1u 6.3
3.3V
D312
2
1
3
D314
D313
SG
D320
D319
SG
D317
D316
D318
D315
D321
D322
D323
2
1
3
3.3V
D324
2
1
3
3.3V
D325
2
1
3
3.3V
IC301
1 STBY
2 NC
3 IN+
4 IN-
5
OUT+
6
VDD
7
GND
8
OUT-
9
FIN
IC1
AC7
MIC0_A_BIAS
AD6
MIC0_AP
AE6
MIC0_AN
AD10
SPK0_AP
AE10
SPK0_AN
AB7
MIC0_B_BIAS
AC6
MIC0_BP
AB6
MIC0_BN
AB10
SPK0_BP
AC10
SPK0_BN
AD7
MIC1_A_BIAS
AC8
MIC1_AP
AB8
MIC1_AN
AC12
SPK1_AP
AB12
SPK1_AN
AE7
MIC1_B_BIAS
AD8
MIC1_BP
AE8
MIC1_BN
AE12
SPK1_BP
AD12
SPK1_BN
AE9
MIC2_AP
AD9
MIC2_AN
AB9
MIC2_BP
AC9
MIC2_BN
AA8
LDOCOMP
D326
2
1
3
MIC+
MIC-
SP-
SP+
C311
0.01u
C310
0.01u
C357
0.01u
16
C358 0.01u
16
C360 0.01u
16
C361 0.01u
16
C250
NC
C251
NC
C252
NC
R386 100
R387
100
100
R388
100
R389
100
R390 0
R391 0
R393
0
R392 0
C253
NC
C254
NC
C255
NC
C256
NC
R306
10k
R307
10k
R395
0
R396
0
C277
470p
R309
1.5k
R310
1.5k
MIC
SP
MIC
MIC
SP
Handset
Heaadset
SP-Phone
16
KX-UT670RU
The acoustic signal that entered MIC of handset is converted into the electrical signal in MIC,and the signal flows as follows.
→ Analog Amplifier(IC1) → A/D convertor → Digital Gain Amp → Output(IP Line)
MC bias voltage is supplied from IC1 to MIC through R308 and R309.
→ Analog Amplifier(IC1) → A/D convertor → Digital Gain Amp → Output(IP Line)
MC bias voltage is supplied from IC1 to MIC through R308 and R309.
Receiving singnal that enters from IP line flows as follows.
→ Digital Gain Amp → D/A convertor → Analog Amplifier → Output
After that ,electrical signal is convered to acoustic signal in speaker of handset.
→ Digital Gain Amp → D/A convertor → Analog Amplifier → Output
After that ,electrical signal is convered to acoustic signal in speaker of handset.
The acoustic signal that entered MIC of headset is converted into the electrical signal in MIC,and
the signal flows as follows.
→ Analog Amplifier(IC1) → A/D convertor → Digital Gain Amp → Output(IP Line)
MC bias voltage is supplied from IC1 to MIC through R311 and R312.
the signal flows as follows.
→ Analog Amplifier(IC1) → A/D convertor → Digital Gain Amp → Output(IP Line)
MC bias voltage is supplied from IC1 to MIC through R311 and R312.
Receiving singnal that enters from IP line flows as follows.
→ Digital Gain Amp → D/A convertor → Analog Amplifier → Output
After that ,electrical signal is convered to acoustic signal in speaker of headset.
→ Digital Gain Amp → D/A convertor → Analog Amplifier → Output
After that ,electrical signal is convered to acoustic signal in speaker of headset.
DG
DG
DG
DG
DG
C328
10u 6.3
C337
10u 6.3
DG
R331 0
R332 0
C326
0.47u
C318
0.47u
C319
0.47u
0.47u
C319
0.47u
R308 1k
R312
1k
R311
1k
C320
1000p
C321 1000p
C323
1000p
C322
1000p
L306
L307
L307
L311
6
7
8
9
10
HS_MICN
HS_SPP
HD_MIC
HD_SP
HS_SPN
HS_MICP
SG
D317
D316
D318
D315
D323
2
1
3
3.3V
D324
2
1
3
3.3V
IC1
AC7
MIC0_A_BIAS
AD6
MIC0_AP
AE6
MIC0_AN
AD10
SPK0_AP
AE10
SPK0_AN
AB7
MIC0_B_BIAS
AC6
MIC0_BP
AB6
MIC0_BN
AB10
SPK0_BP
AC10
SPK0_BN
AD7
MIC1_A_BIAS
AC8
MIC1 AP
C357
0.01u
16
C358 0.01u
16
C250
NC
C251
NC
R386 100
R387
100
100
R388
100
R393
0
R392 0
C253
NC
C254
NC
C255
NC
C256
NC
R395
0
R396
0
C277
470p
R309
1.5k
R310
1.5k
MIC
MIC
SP
CN601
1
2
3
4
JK601
1
2
3
4
5
6
Handset
CN304
DG
DG
DG
DG
DG
DG
C328
10u 6.3
DG
C331 10u
C332 10u
C326
0.47u
C327
0.47u
R312
1k
R311
1k
R313
0
R323
0
C329
1000p
C333
1000p
L311
L314
L315
4
5
6
HD_MIC
HD_SP
HD_GND
SG
D320
D319
D325
2
1
3
3.3V
AB7
MIC0_B_BIAS
AC6
MIC0_BP
AB6
MIC0_BN
AB10
SPK0_BP
AC10
SPK0_BN
C360 0.01u
16
C361 0.01u
16
C251
NC
R388
100
R389
100
MIC
R602
0
1
4
2
3
5
L606
L605
L607
R601 NC
5
6
7
MIC+
Handset
CN304
IC1
CN601
JK601
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