Panasonic KX-UT248RU / KX-UT248RU-B (serv.man3) Service Manual ▷ View online
5
KX-UT248RU/KX-UT248RU-B
3 Specifications
6
KX-UT248RU/KX-UT248RU-B
4 Technical Descriptions
4.1.
Block Diagram
+5V
AFE
MII
ARM9 and Teak Lite DSP
DSPG DWE76
GPIO
SYSRSTB
SDRAM
32Mbyte
FLASH
16Mbyte
RJ45 CON
To LAN
10/100/1000BASE-T
Ethernet I/F
13.824
MHz
TXD[3:0]
CRS
TX_CLK
RX_DV
RX_ER
RX_ER
RXD[3:0]
RX_CLK
COL
PHY_nRST
MDC
MDIO
TX_EN
Data Bus
Address Bus
HEADSET_DET
Analog I/F
LCD
Ope PCB
LED matrix
LCD_RD
LCD_RST
Backlight
LCD
4.4inch
HOOK SW
HOOK_DET
Key matrix
Dinamic
EHS_DET
NAND/
LCD
LCD I/F
+1.3V
MPMC
+9V
DC IN
802.3af
PoE IC
+48V
PDN
DC/DC
+3.3V
DC/DC
Power supply
Reset
IC
+3.3V
DG
CAP
DG
REG
+1.3V
+5V
EHS
ASIC_RST
EHS_RX
ASIC_CLK
INT0
I2C
I2C_SCL
I2C_SDA
HEADSET_MIN
HEADSET_SPOUT
Bluetooth
Module
FLASH_nRST
PCM
EHS_TX
Headset
UART(2)
UART_TX/RX
BT_nRST
BT antenna
GPIO
BKLT
LCD_RS/CS
LCD_D[7..0]
LCD_WR
Detect
Voltage
+
CN
CN
PDN
+12V
25MHz
Xtal
GPIO
Gigabit
3port
Switch
with PHY
RJ45 CON
To PC
10/100/1000BASE-T
P_0
P_5
P_1
PULSE
Trans
PULSE
Trans
DC/DC
+1.2V
VDD3.3V
DC/DC
PHY_INT
INT
Handset
HSSPOUT
HSMICIN
CN
+24V
+24V
3.3V_SDM
+3.3V
+5V
+3.3V
CN
PWM
SYMCLK
INT
MIC
Speaker
MIP/MIN
SPP/SPN
SPAMPEN
GPIO
D-AMP
GPIO
REG
+3.3VA
3.3V_FLM
voice
processor
UART(1)
UART2_TX/RX
GPIO
CD_nRST
AFE
+3.3V
+3.3V
+3.3VA
+3.3VA
ASIC
IC204
IC503
JK402
JK401
T403
T402
X401
IC402
JK301
IC506
IC103
JK101
JK201
JK202
CN501
IC501
IC502
X501
IC401
+3.3V
IC505
IC304
IC302
IC305
IC306
IC301
IC504
LED&KEY
Main PCB
7
KX-UT248RU/KX-UT248RU-B
4.2.
Circuit Operations
4.2.1.
LCD / BACKLIGHT Circuit
LCD module is connected to main PCB with CN501.
LCD data are output from IC503 to LCD module.
LCD contrast is set by electronic volume in LCD module.
LCD data are output from IC503 to LCD module.
LCD contrast is set by electronic volume in LCD module.
LCD DRIVER voltage (LCD internal voltage : 20V) is supplied by external voltage (24V) observed between Pin 17 and Pin 18 of
CN501, and LCD LOGIC voltage (3.3V) is observed between Pin 11 and Pin 10 of CN501.
CN501, and LCD LOGIC voltage (3.3V) is observed between Pin 11 and Pin 10 of CN501.
The lighting of the backlight is controlled by Q501.
The PWM (Pulse Width Modulation) signal is output from pin F17 of IC503 pin and the brightness is changed according to its duty
ratio.
The PWM (Pulse Width Modulation) signal is output from pin F17 of IC503 pin and the brightness is changed according to its duty
ratio.
4.2.2.
Reset Circuit
Reset Signal is output from IC505 and input into IC503-Pin A14.
8
KX-UT248RU/KX-UT248RU-B
4.2.3.
Ethernet Circuit
IC401 has PHY function for the interface of ETHERNET and has ETHERNET function 10Base-T, 100Base-TX and
1000Base-T.
It is composed of a simple circuit as shown in the above figure.
1000Base-T.
It is composed of a simple circuit as shown in the above figure.
LAN port, PC port, and IC401 are insulated mutually electrically.
The power supply for PoE is obtained from JK402 on LAN port side.
As for the voltage generated from PoE, 12V is output by IC402 (PoE Power Circuit).
The power supply for PoE is obtained from JK402 on LAN port side.
As for the voltage generated from PoE, 12V is output by IC402 (PoE Power Circuit).
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