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KX-TDA0155CE is the Cell Station (CS) for TDA and TDE and NCP series. CS converts voice data from PBX to radio signal and
transmits to Portable Station (PS). Conversely CS converts radio signal from PS to voice data and transmits to PBX.

The IC100(SC14429) is CPU with BBIC and DSP and is manufactured by Sitel. This CPU has 16 bits data bus and  processes
control command from PBX and PS.
Application software is stored in 32Mbit Flash Memory (IC101). This Flash Memory is so called Dual Operation type Flash. It is
possible to write data onto this Flash Memory in active status so that this Flash Memory is used as EEPROM. The FLASH mem-
ory of this Dual Operation type is effective in preventing fatal destruction when remote uploading is failed. If the power failure
occurs during program uploading, the FLASH memory data is lost. However, this type of memory is recoverable.
Furthermore calibration data for RSSI measurement and clock is stored in the Flash Memory, too.
2Mbit SRAM(IC102) is used as the work area. CN101 is the communication port for service purpose. CN101 is connected to the
serial port of the CPU.
SW100 is 6bits DIP switch to set the operating modes of CS, site survey mode, program upload mode and so on.

This circuit handles data communication to extension port. CS is connected to extension port by 2 wires.
The power voltage of CS is DC 40V supplied from extension port by 2 wires. The signal for data transmission is transferred via
outside wires. Voice data, control data and superframe synchronisation signal for CS synchronisation is carried on this signal.
The signal from extension port is provided to CN100, and provided to DPITS I/F GA (IC104) via filter and pulse transformer
(T101).
The data received from PBX is inputted to the comparator (pin 36) build in IC104 through Transformer T101.
The threshold voltage of the comparator is determined by R238, R239 and R240, then inputted to pin 35 and 37.
The data to PBX is outputted from pin 38 and 39 of IC104, drives T101 by Transistor Q200 and transmitted.
The signal between DPITS I/F GA (IC104) and FPGA (IC103) is ST-BUS Format digital data which contains data channel, con-
trol and voice channel.
Voice channel contains 2 PCM data. And superframe synchronisation signal is carried by HK bit of control channel.
2 PCM data and superframe synchronisation signal is transferred to FPGA (IC103).

The GND of CS(KX-TDA0155CE) is not common to the GND of the PBX itself, so care must be taken when using a measuring

device such as an oscilloscope.(Make sure to use the measuring device with its frame ground open.)

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FPGA (IC103) has the following features.

Extracts voice data from ST-BUS digital data and changes format to BBIC PCM format, then provides it to BBIC(IC100).

Detects super frame synchronisation signal from HK bit in the ST-BUS digital data and compensates time difference of delay
caused by the different cable length from CSIF card, then provides it to PSYNC pin of BBIC(IC100).

Address decoder to generate chip select signal for other ICs and internal registers to set FPGA operation.

Data signals for RF control and RX/TX data is connected between BBIC and RF block.
The modulated signal is provided to 2 antennas via CN901 and CN900.

SC14429 manufactured by Sitel.

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PAV3.3V, RF2.5V, 3.2V, 1.8V, RF1.8V, 1.5V and 5.25V are generated in CS. 
5.5V is output of DC/DC Convertor. Other power supplies are made from 5.25V. 
PAV3.3V and RF2.5V are the power supply for RF block. 3.2V is the power supply for logic circuit.
1.5V is used as the power supply of FPGA internal core. 1.8V, RF1.8V is the power supply for BBIC.

Input filter for noise rejection and diode bridge for misconnection protection.

This circuit controls the DC/DC converter for prompt return from the power interruption start-up.
And when the power supply is low voltage, This circuit controls ON/OFF of the DC/DC converter by DIPSW(SW100)

Generate 5.25V from DC40V power supply.

All power supply is backed up by the electric double layer capacitor.

Two kinds of clock are used in CS.

10.368MHz crystal oscillator is used.

16.384MHz crystal oscillator is used. It is used for Reference Clock of DPITS I/F GA.

It is reset by the signal from Power on Reset or CPU. The reset from Reset IC(IC105) is reset by CPU, and DPITS I/F GA and
FPGA are reset by the port output from CPU.