DOWNLOAD Panasonic KX-NTV150NE Service Manual ↓ Size: 2.93 MB | Pages: 38 in PDF or view online for FREE

Model
KX-NTV150NE
Pages
38
Size
2.93 MB
Type
PDF
Document
Service Manual
Brand
Device
PBX / COMMUNICATION IP CAMERA
File
kx-ntv150ne.pdf
Date

Panasonic KX-NTV150NE Service Manual ▷ View online

21
KX-NTV150 Series  
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
1.
Voltage level of I2C0 (K18, K19) and  GPIO1_D[15:16] (D3, D4) are 3.3V
2.
EFUSE_EN can be tied to GND if unused
3.
SYS_CLK0_BPSS_i(N15): tie HIGH when using oscillator or tie LOW when
using crystal for system clock 0(32.768KHz).
4.
SYS_I_SYS_CFG(M15): clock source ooption, tie LOW for 32.768KHz, and
tie HIGH for 12MHz
ARM9 ICE
Default boot device setting
 tie High for 12 MHz
*
System
GPIO1_D16 forIRDAC usage
*
SYS_CFG
 tie LOW for 32.768KHz
System Reset & HW_reset(SW) & WPS
UART
SPI NAND 4 address cycle, if fail -> NF4 (nand flash 4 address cycle)
SPI NAND 5 address cycle, if fail -> NF5 (nand flash 5 address cycle)
BOOT_MODE_SEL[1:0]
2'b00
2'b01
2'b10
2'b11
Default Boot Device
Serial FLASH
Default boot device setting table:
threshold voltage 2.9V
EVM GPIO1_D15 for SDXC 1.8V 
power control or  Efuse 1.5V power 
cntrol  
HW RST
Reset and WPS function use same GPIO. S3 
and S2 co;lay
GND
NTV150 does not mount this circuit.
SYS_CFG
WDTC_nRST
PERI_nRST
SYS_nRST
BOOT_MODE_SEL1
BOOT_MODE_SEL0
SYS_CLK0
SYS_FBCLK0
BOOT_MODE_SEL0
BOOT_MODE_SEL1
SYS_nRST 
WDTC_nRST
SYS_CLK1
SYS_FBCLK1
BOOT_MODE_SEL0
BOOT_MODE_SEL1
EFUSE_POWER
SYS_FBCLK1
SYS_CLK1
IO15_HW_RSTn
SYS_FBCLK0
SYS_CLK0
SYS_SCL
SYS_SDA
SYS_SCL
SYS_SDA
IO15_HW_RSTn
IO15_HW_RSTn
GND
3V3
3V3
3V3
GND
GND
GND
GND
GND
3V3
3V3
GND
GND
GND
GND
3V3
GND
3V3
GND
3V3
PERI_nRST
SYS_SCL
SYS_SDA
SYS_TEST
U1D
Rossini_SiP_BGA
SYS_CFG
T17
R42
4.7K
R0402
Y5
32.768 KHz
CRYSTAL-S3215C-32X15
1
2
R10
xx_4.7K, 1%
R0201
S3
TS-A02SK-2-S085
switch_TS-A02SI-S085
1
4
2
3
R53
4.7K
R0402
R555
00
R0201
R154
4.7K
R0402
R44
4.7K
R0402
JTAG
U1Q
Rossini_SiP_BGA
ARM9_nTRST_i
M16
ARM9_TDI_i
M17
ARM9_TMS_i
L16
ARM9_TCK_i
M18
ARM9_TDO_o
L17
R81
XX_0
R0402
R142
4.7K
R0402
R43
4.7K, 1%
R0201
C85
0.1uF,16V
C0402
R52
0
R0402
TP_RTC
R45
xx_4.7K, 1%
R0201
C233
0.1uF,6.3V
C0201
C74
27pF,50V
C0402
C75
27pF,50V
C0402
S2
xx_Switch-1102VAC
Switch-1102VN
1
4
2
3
12M
C81
10pF,50V
C0402
Y2
12MHz
CRYSTAL_25X20
1
2
3
4
R152
4.7K
R0402
C86
xx_0.1uF,16V
C0402
C149
10pF,50V
C0402
U8
PT7M7811
SOT143
GND
1
RESET
2
VCC
4
MR
3
System
U1CU1C
Rossini_SiP_BGA
SYS_CLK0_i
M19
SYS_FBCLK0_o
N19
SYS_CLK1_i
R19
SYS_FBCLK1_o
T19
BOOT_MODE_SEL1_i
E4
BOOT_MODE_SEL0_i
F4
SYS_nRST_i
D2
VSS(SYS_TEST_EN_i)
F6
SYS_CLK0_BPSS_i
V18
WDTC_nRST_o
D1
IRDAC_SDA_i/GPIO1_DATA[16]
D4
SYS_MON_CLK_o/GPIO1_DATA[15]/UART0_nRTS_o/AGPO_DATA[7]
D3
I2C0_SCL/GPIO2_DATA[30]
U19
I2C0_SDA/GPIO2_DATA[31]
V19
EFUSE_I_FSOURCE_i
F5
R161
0
R0402
R6
4.7K, 1%
R0201
KX-NTV150 Main Board No.4
22
KX-NTV150 Series  
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
SMC_CSn0 and SMC_CSn1 are internal pull-up
SOC supports standard SPI flash with 1V8/3V3 voltage level by providing 
proper voltage supply to VDDIO_SSIC.
SPI
RTC
ADC
NEW
SMC_CSn0
SPI_CSn0
VDDIO_SSIC
SPI_CLK
SPI_DO
SPI_DI
SPI_CLK_c
SPI_DI_c
SPI_DO_c
SPI_WP
SPI_DI_c
SPI_DO_c
SPI_CLK_c
SPI_CSn0
SPI_HOLD
SPI_CLK
SMC_CSn0
SMC_CSn1
SPI_DI
SPI_DO
GND
GND
VDDIO_SSIC
3V3
GND
VDDIO_3V3
GND
GND
3V3_RTC
3V3
GND
ADC_3V3
3V3
3V3
D19
BAT54C2
SOD-523
1
2
R71
0
R0201
R100
10k 
R0201
R70
R0201
C159
0.1uF,6.3V
C0201
C165
0.1uF,6.3V
C0201
R124
0
R0402
R69
R0201
++
BT2
0.2F,3.3V,Gold-Cap
BT_DSK-3R3K204
SPI
U1E
Rossini_SiP_BGA
A18
C18
C19
A17
SSIC_BCLK/GPIO0_DATA[17]
SSIC_nSEL[0]/GPIO0_DATA[19]/I2C2_SCL 
SSIC_nSEL[1]/GPIO0_DATA[20]/I2C2_SDA 
SSIC_RXD/GPIO0_DATA[16]
SSIC_TXD/GPIO0_DATA[18]
B18
VDDIO_SSIC
D15
R68
R0201
C175
0.1uF,6.3V
C0201
U12
F50L512M41A
WSON8_Rossini-Flash-
ColayX3
SO/SIO1
2
GND
4
SI/SIO0
5
VCC
8
CS
1
WP/SIO2
3
NC/SIO3
7
SCLK
6
EXPOSE_PAD
9
R94
10k
R0201
R82
1K
R0603
C164
0.1uF,6.3V
C0201
R72
0
R0402
RTC Power
U1V
Rossini_SiP_BGA
VDDA_LDO12C_33
N17
VDDA_LDO12C_VREG
N18
ADC
U1S
Rossini_SiP_BGA
ADC_CH0
U1
ADC_CH1
U2
VDDA_ADC_33
T3
VSSA_ADC_REF
R3
ADC_CH2
W2
ADC_CH3
V2
TP99
C102
xx_10pF,10V
C0603
KX-NTV150 Main Board No.5
23
KX-NTV150 Series  
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
DDR3
Single Power Plane
GND
1V5
GND
VDDIO_1V5
GND
DDR_VREF
DDR_VREF
GND
1V5
GND
VDDIO_1V5
GND
DDR_VREF
C282
22uF,4V
C0603
C125
0.22uF,16V
C0402
R74
240,1%
R0402
C99
0.1uF,16V
C0402
R73
240,1%
R0402
C126
0.22uF,16V
C0402
C283
22uF,4V
C0603
C181
0.1uF,6.3V
C0201
C179
0.1uF,6.3V
C0201
L7L7
CP160808T-601Y,600R,1A
L0603
R75
1K,1%
R0402
C103
0.1uF,16V
C0402
C176
0.1uF,6.3V
C0201
C100
0.1uF,16V
C0402
C177
0.1uF,6.3V
C0201
R76
1K,1%
R0402
C178
0.1uF,6.3
C0201
C182
0.1uF,6.3V
C0201
C279
22uF,4V
C0603
VREF_DDR32 
DDR3 Power
U1F
Rossini_SiP_BGA
VDDIO_DDR32_0
R9
VDDIO_DDR32_0
R10
VDDIO_DDR32_0
T10
VDDIO_DDR32_0
T11
R14
VSSIO_DDR32_0
P9
VSSIO_DDR32_0
P13
VDDIO_DDR32_0
R7
VDDIO_DDR32_0
R8
VSSIO_DDR32_0
P8
VSSIO_DDR32_0
P10
VSSIO_DDR32_0
P11
VSSIO_DDR32_0
P12
VDDIO_DDR32_1
E9
VDDIO_DDR32_1
E8
VDDIO_DDR32_1
E6
VDDIO_DDR32_1
E7
VDDIO_DDR32_1
E10
VSSIO_DDR32_1
F8 
VSSIO_DDR32_1
F7
VSSIO_DDR32_1
F10 
VSSIO_DDR32_1
F9
VSSIO_DDR32_1
F11
VREF_DDR32
R13
VDDIO_DDR32_0
T12
VDDIO_DDR32_0
T13
VDDIO_DDR32_0
T14
VDDIO_DDR32_0
T15
VSSIO_DDR32_0
P7
VSSIO_DDR32_0
P15 
VSSIO_DDR32_0
P14
VSSIO_DDR32_0
R11
VSSIO_DDR32_0
R12
VDDIO_DDR32_1
E15
VDDIO_DDR32_1
E14
VDDIO_DDR32_1
E13
VSSIO_DDR32_1
F12
VSSIO_DDR32_1
F13
VSSIO_DDR32_1
F14
C183
0.1uF,6.3V
C0201
C281
22uF,4V
C0603
DDR CALI
U1W
Rossini_SiP_BGA
DDR32_CALI
R15
DDR3_CALI
U10
KX-NTV150 Main Board No.6
24
KX-NTV150 Series  
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Max Current[mA]
50
1.8V
1.8V
100
1.8V
SDXC
SDSC
SDHC
__
25
__
50
200
Bus Speed
Mode
100
400
Max CLK
FRequency
[MHz]
Max Bus 
Speed[MB/s]
25
SDR25
__
200
200
Signal
Voltage
  [V]
50
25
12.5
3.3V
SDR50
Input tri;state
200
200
High Speed
400
 SDXC_MODE
(GPIO1_D15)
100
Output low
SDR12
Output low
Output low
Support up to SDXC
MSHC
Rossini_SiP_BGA
NFC_nRB, NFC_nWP have internal pull-up circuits, the external 
pull-up circuits are removed.
NFC
Net can be swapped for better layout routing
I2C2_SDA
I2C1_SCL**
I2C Control
I2C1_SDA**
I2C Control**
I2C2_SCL
VIC0_DATA[14](G19) 
VIC0_DATA[15](F18)
**If the two sensors on VIC0 and VIC1 have same I2C voltage level, they can share the I2C on VIC0.
VIC0_D15_CTRL2
VIC0_D14_CTRL1
CS
CLK
TXD
VIC1 4-
wire control table:
RXD
Net Name
4-w
ire Control
SD1_DATA1(A7) 
SD1_DATA2(B7) 
SD1_DATA3(C7)
VIC1_CTRL4
Pin
SD1_DATA0(C8)
VIC1_CTRL2
VIC1_CTRL3
VIC1_CTRL1
I2C2  is  multiplexed  with  MSHC1_DATA[0:1].  Hence,  if  the  MSHC1 interface  is  not  used,  these  
two  pins  can provide  one  I2C  port,  and
 its  voltage  level  is  determined  by  VDDIO_SD_1  (ball  E8).
For SD card
MSHC0_WP from GPIO0_DATA[15](D10) - SD0_WP
SD0_DATA1
SD0_DATA2
SD0_DATA3
SD0_DATA0
SD0_CMD
VIC1_CTRL1
VIC1_CTRL2
VIC1_CTRL4
VIC1_CTRL3
SD0_nCD
SD0_TX_CLK
CMOS_RST
VIC1_CTRL2
VIC1_CTRL1
VDDIO_SD_1
SD0_DATA0
SD0_DATA1
SD0_DATA2
SD0_DATA3
SD_WP
SD0_CMD
SD0_nCD
SD0_TX_CLK
SD_WP
CMOS_RST
GPIO_LED_B
GPIO_LED_B
GND
VDDIO_SD_1
GND
IS_1V8
3V3
GND
3V3
GND
GND
3V3
3V3
GND
IS_1V8
CMOS_RST
VIC1_CTRL1
VIC1_CTRL2
MSHC0_WP
GPIO_LED_B
R97
xx_0
R0201
C138
10uF,6.3V
C0402
R95
xx_0
R0201
MSHC0 and MSHC1
U1I
Rossini_SiP_BGA
A9
C10
B9
MSHC0_DATA[0]/GPIO0_DATA[28] 
MSHC0_DATA[1]/GPIO0_DATA[29] 
MSHC0_DATA[2]/GPIO0_DATA[30] 
MSHC0_DATA[3]/GPIO0_DATA[31]
C9
B10
MSHC0_CMD/GPIO1_DATA[0]/AGPO_DATA[0] 
MSHC0_nDET/GPIO0_DATA[27]
C11
MSHC0_TXCLK/GPIO1_DATA[1]/AGPO_DATA[1]
A10
C8
A7
B7
MSHC1_DATA[0]/GPIO1_DATA[2]/AGPO_DATA[2] 
MSHC1_DATA[1]/GPIO1_DATA[3]/AGPO_DATA[3] 
MSHC1_DATA[2]/GPIO1_DATA[4]/AGPO_DATA[4] 
MSHC1_DATA[3]/GPIO1_DATA[5]/AGPO_DATA[5]
C7
MSHC1_CMD/GPIO1_DATA[6]/AGPO_DATA[6]
A8
MSHC1_TXCLK/GPIO1_DATA[7]/AGPO_DATA[7]
B8
VDDIO_SD_1
D8
VDDIO_SD_0
D9
R128
4.7K
R0402
R86
R0201
0
NFC
U1K
U14
U13
U15
W13
V13
V15
V14
NFC_DATA[0]/GPIO2_DATA[15]/AGPO_DATA[0] 
NFC_DATA[1]/GPIO2_DATA[16]/AGPO_DATA[1] 
NFC_DATA[2]/GPIO2_DATA[17]/AGPO_DATA[2] 
NFC_DATA[3]/GPIO2_DATA[18]/AGPO_DATA[3] 
NFC_DATA[4]/GPIO2_DATA[19]/AGPO_DATA[4] 
NFC_DATA[5]/GPIO2_DATA[20]/AGPO_DATA[5] 
NFC_DATA[6]/GPIO2_DATA[21]/AGPO_DATA[6] 
NFC_DATA[7]/GPIO2_DATA[22]/AGPO_DATA[7]
W14
NFC_nCE/GPIO2_DATA[24]
W16
NFC_nWP/GPIO2_DATA[23]
W15
U17
V17
V16
W17
NFC_ALE/GPIO2_DATA[27]
NFC_CLE/GPIO2_DATA[28]
NFC_nRE/GPIO2_DATA[25]/UART3_TXD_o 
NFC_nWE/GPIO2_DATA[26]
NFC_nRB/GPIO2_DATA[29]/UART3_RXD_i
U16
C135
xx_10pF,50V
C0402
C198
0.1uF,6.3V
C0201
R130
4.7K
R0402
R93
R0201
0
C199
0.1uF,6.3V
C0201
R98
0
R0201
C19
0.1uF,16V
C0402
R105
0
R0402
J10J10
1-204610MG-021041C
CONSMD2X5_1MM_F-H89
1
2
3
4
5
6
7
8
9
10
KX-NTV150 Main Board No.7
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