Panasonic KX-NT630RU-B Service Manual ▷ View online
9
KX-NT630 Series
4 Technical Descriptions
4.1.
Block Diagram
DDR2
1Gbit
RGMII
DSPG DVF9919
Flash
1Gbit
RJ45 CON
To LAN
10/100/1000BASE-T
Ethernet I/F
TXD[3:0]
TCLK
RCTL
RXD[3:0]
RCLK
PHY_nRST
MDC
MDIO
TCTL
Audio
DDR IF
+ 12 V
DC IN
DC IN
802.3af
PoE IC
+48V
PDN
DC/DC
Power supply
LDO
+1. 8V
I2C(1)
HEADSET_MIN
HEADSET_SPOUT
Headset
Detect
Voltage
CN
RSTN
+ 10.6 V
GPIO
Gigabit Switch
with PHY
(INTEL)
RJ45 CON
To PC
10/100/1000BASE-T
G1
RGMII1
G0
PULSE
Trans
PULSE
Trans
DC/DC
+1. 1V
+3.3V
Handset
HSSPOUT
HSMICIN
CN
+5V
+1. 8V
MIC
Speaker
MIP/MIN
SPP/SPN
DC/DC
+3.3V
+3.3V
+5V
Xtal
NAND IF
25MHz
+3.3V
USB( 1)
High/OTG
Internal +1.8V
Internal +1. 3V
NT630
Block Diagram
PM0
+1. 8V
+ 12 V
MICBIAS
MICBIAS
MICBIAS
+5V
25 MHz
+3.3V
GPIO
USB( 2)
(Full)
SPI(2)
+ 5V
LCD
LCD_CS
LCD_RST
LCD_A0
LCD_SCL
LCD_DO
+3.3V
CN
GPIO
Backlight
BKLT1
PWM0
UTX
URX
PC
CLK_OUT
UART(2)
LCD
AFE
GPIO
KEY
HOOK SW
HOOK_DET
HEAD DET
HEAD_DET
LED
Key matrix
Dinamic 6x8
+ 3V
LED (Static)
Static
GPIO
DCIN0
GPIO
PCM
UART(1)
SDIO
SPI(1)
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
10
KX-NT630 Series
4.2.
Circuit Operations
4.2.1.
LCD Circuit
LCD data are output from pin C19 of IC1001 to LCD module.
LCD contrast is set by electronic control in LCD module.
+3.3V of the power supply voltage is pressurized about four/three times in the LCD module and used as LCD driving voltage
(approx. 16V).
The driving voltage is observed at between C1061 terminals.
The lighting of the backlight is controlled by Q4001.
The PWM (Pulse Width Modulation) signal is output from IC1001 (pin U13) pin and the brightness is changed according to its duty
ratio.
LCD contrast is set by electronic control in LCD module.
+3.3V of the power supply voltage is pressurized about four/three times in the LCD module and used as LCD driving voltage
(approx. 16V).
The driving voltage is observed at between C1061 terminals.
The lighting of the backlight is controlled by Q4001.
The PWM (Pulse Width Modulation) signal is output from IC1001 (pin U13) pin and the brightness is changed according to its duty
ratio.
4.2.2.
Reset Circuit
Reset Signal is output from IC4001 and input into IC1001-pin V12.
PDN is DC power down detect.
Detect the AC and PoE power down signal.
PDN is DC power down detect.
Detect the AC and PoE power down signal.
lcda0
lcdd0
lcdd0
lcdclk
R1101
R1102
R1102
LCD_CLK
LCD_D0
LCD_A0
LCD_CS
LCD_CS
LCD_RST
R1074
LCD_RST
ST_UCFG0
ST_CKMN1
ST_CKMN0
ST_BOOTNFL
ST_UCFG4
ST_UCFG2
ST_UCFG3
DG
DG
CN1002
1
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
11
12
13
14
15
16
17
18
LCD_PWM
5V
C1058
DG
C1060
DG
VDD3R3V
C1059
C1062
DG
C1061
D1026
C1063
R1111
W7
P11
U1CTS/DIGMIC_DATA
R12
U1RTS/DIGMIC_CLK
F14
SPI1CS0
G14
SPI1DI
E15
SPI1CK
E17
SPI1DO
D18
SPI2CK
D17
SPI2DI
C19
SPI2DO
F17
T1SCLK
E18
F1SYNC
D19
D1RX
F15
D1TX
V11
SD_D0
W11
SD_CMD
W10
SD_CLK
R1118
R1100
R1100
R1077
R1078
R1081
R1072
R1076
R1083
R1116
R1098
R1099
R1099
C1067
DG
DG
C1068
R1112
R1117
R1117
KEY_COL7/SPI2CS
R1026
LCD_RST
J3
MEMDQMBLS1/EXTINT5
IC1001
LCD
C4069
DCDC_GND
SINK_GND
AG
C4086
C4087
R4033
AVCC3R3V
VDD3R3V
AG
AG
CL_VDD18V
EXT_REG_CTL
C4078
C4070
R4037
C4091
Q4001
R4038
LCD_PWM
DG
R4040
V15
VDD18_DCDC
W16
VCC33_DCDC
N13
VDD_ANA
V17
VCC_ANA0
W12
VCC_ANA1
N16
VCCA
T13
EXT_REG_CTL
U13
PWM0
IC1001
AG
VDD1R3V
PWR_RST
C4056
C4066
PDN
003:6C
003:6C
R4025
3R3V
C4041
IC4001
4
OUT
3
CD
1
VSS
2
VDD
L4009
C4063
C4040
DG
DG
DG
DG
TPX1
P13
TPX2
R18
TPY1
T18
TPY2
P18
TPS
V12
RSTN
T12
TEST_ANA
L16
IF_CLK_IF
P14
VREF
D12
VDD0
E5
VDD1
E6
VDD2
E8
VDD3
H5
T17
DC_J
PDN
004:5D
R3018
D3005
C3070
C3069
PoE_DC
+12V
JK3001
2
3
1
F3001
32V
3A
R3019
D3002
D3003
LF3001
2
3
4
1
DG
DG
C3035
C3034
R3025
DG
C3032
R3024
C3036
DG
C3066
DG
C3033
C3028
from PoE
from AC Adaptor
11
KX-NT630 Series
4.2.3.
Ethernet Circuit
The IC2001 is used for the Gigabit Ethernet interface.
It is connected from (IC2001) to the Ethernet port(JK2001 and JK2002) through a transformer and so is isolated.
Also, LAN port (JK2001) gets power from the Ethernet line For PoE (Power over Ethernet) as shown below.
It is connected between (IC2001) and the BBIC(IC1001) by high-speed bus called RGMII(Reduced Gigabit Media Independent
Interface) bus operating with 25MHz.
It is connected from (IC2001) to the Ethernet port(JK2001 and JK2002) through a transformer and so is isolated.
Also, LAN port (JK2001) gets power from the Ethernet line For PoE (Power over Ethernet) as shown below.
It is connected between (IC2001) and the BBIC(IC1001) by high-speed bus called RGMII(Reduced Gigabit Media Independent
Interface) bus operating with 25MHz.
45
PC port
LAN port
ether_lan[7]
ether_lan[8]
ether_lan[5]
ether_lan[4]
ether_lan[3]
ether_lan[4]
ether_lan[3]
ether_lan[6]
ether_lan[1]
ether_lan[2]
ether_pc[1]
ether_pc[2]
ether_pc[6]
ether_pc[4]
ether_pc[5]
ether_pc[7]
ether_pc[8]
ether_pc[3]
MDI_PB_N
MDI_PA_N
MDI_PB_P
MDI_PA_P
MDI_PC_P
MDI_PC_N
MDI_PD_P
MDI_PD_N
MDI_LD_N
MDI_LD_P
MDI_LC_N
MDI_LC_P
MDI_LB_N
MDI_LB_P
MDI_LA_N
MDI_LA_P
C2045
L2012
PoE_AN
C2044
PoE_AP
L2010
L2011
L2009
PoE_BP
PoE_BN
JK2002
8
7
6
5
4
3
1
2
JK2001
8
7
6
5
4
3
1
2
T2001
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
9
9
16
16
10
10
15
15
11
11
12
12
13
13
14
14
T2002
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
9
9
16
16
10
10
15
15
11
11
12
12
13
13
14
14
R2047
R2048
LF2001
1
2
3
4
LF2002
1
2
3
4
LF2003
1
2
3
4
LF2004
1
2
3
4
DG
DG
DG
DG
D2001
R2035
R2038
R2036
R2041
R2037
R2042
R2039
R2044
C2061
C2062
C2055
C2057
C2059
C2056
D2004
LF2005
1
2
3
4
LF2006
1
2
3
4
LF2007
1
2
3
4
LF2008
1
2
3
4
IC2001
PoE Circuit
MDI_LD_P
MDI_LD_N
MDI_LC_N
MDI_LB_P
MDI_LC_P
MDI_LB_N
MDI_LA_N
MDI_LA_P
MDI_PD_N
MDI_PD_P
MDI_PC_N
MDI_PC_P
MDI_PB_N
MDI_PB_P
MDI_PA_N
MDI_PA_P
C2017
L2003
RGMII_RCTL
001:6A
C2005
C2025
CL2001
R2025
L2002
RGMII_TCLK
001:6B
C2023
RGMII_TCTL
001:6B
C2014
L2_VDDR
CL2002
L2001
R2017
C2008
L2_VDDL
CL2003
RGMII_TD3
001:6B
C2001
C2006
C2004
L2_VDD
CL2004
RGMII_TD2
001:6B
PHY_RST
001:4C
E_MDIO
001:6A
RGMII_TD0
001:6B
L2_VDDS
CL2005
RGMII_RCLK
001:6B
RGMII_RD1
001:6B
L2SW_3R3V
E_MDCLK
001:6A
C2019
L2007
CL2006
RA2001
18
27
36
C2013
C2027
C2015
C2011
L2_VDDA
CL2007
R2023
C2022
L2SW_1R1V
C2034
R2022
C2007
RGMII_RD2
001:6B
L2SW_1R1V
C2020
R2024
C2036
RGMII_RD3
001:6B
L2SW_1R1V
C2012
R2018
C2002
C2029
L2_VDDH
L2SW_3R3V
RGMII_RD0
001:6B
C2010
C2028
C2037
L2_VDDP
L2SW_3R3V
C2003
C2021
C2030
L2006
C2018
C2024
C2016
L2005
L2SW_3R3V
25MOUT
001:5C
L2SW_3R3V
C2031
L2004
C2009
RGMII_TD1
001:6B
C2026
C2038
C2032
C2033
C2035
R2019
IC2001
A40
G0_TPIBN
B37
G0_TPICP
A41
G0_TPICN
B38
G0_TPIDP
B39
G0_TPIDN
A43
G1_TPIAP
B40
G1_TPIAN
B41
G1_TPIBP
A45
G1_TPIBN
B43
G1_TPICP
A47
G1_TPICN
B44
G1_TPIDP
B45
G1_TPIDN
A49
G2_TPIAP
B46
G2_TPIAN
B47
G2_TPIBP
A51
G2_TPIBN
B48
G2_TPICP
A52
G2_TPICN
C4
VDD3
C2
VDD4
A23
VDDQ
B19
VDDS1
C15
VDDS2
C17
VDDA
C37
VDDL1
C33
VDDL2
C12
VDDL3
B42
VDDL4
C28
VDDR1
C26
VDDR2
C21
VDDP1
C19
VDDP2
C8
VDDP3
C6
VDDP4
C39
VDDH1
C36
VDDH2
C34
VDDH3
B30
RGMII5_TXD2
B31
RGMII5_TXD3
B28
RGMII5_TX_CTL
B32
RGMII5_RXC
B33
RGMII5_RXD0
A36
RGMII5_RXD1
B34
RGMII5_RXD2
B35
RGMII5_RXD3
A38
RGMII5_RX_CTL
B20
RX0_P
B21
RX0_M
B18
TX0_P
A19
TX0_M
B17
RESREF
B25
GPIO0/GPC0/EXINT0/MMDIO
A27
GPIO1/GPC1/EXINT1/MMDC
A30
GPIO2/SSDI/URXD
B27
GPIO3/SSDO/UTXD
A28
GPIO4/SSCK/SMDC/LIGHT
A10
GPIO19/LED30/TMS
A12
GPIO20/LED40/TCK
B4
GPIO21/LED01
B6
GPIO22/LED11
B8
GPIO23/LED21
B10
GPIO24/LED31
B12
GPIO25/LED41
B5
GPIO26/LED02/LIGHT
B7
GPIO27/LED12
B9
GPIO28/LED22
B11
GPIO29/LED32
A13
GPIO30/LED42
A2
TRSTN
B22
XTAL1/CLK
B23
XTAL2
B3
HRSTN
A21
NC1
B2
NC2
B36
G0_TPIAP
A39
G0_TPIAN
D4
G0_TPIBP
D1
G2_TPIDP
A1
G2_TPIDN
D2
G3_TPIAP
PAD1
GND
C25
VDD1
C23
VDD2
C31
VDDH4
C14
VDDH5
C10
VDDH6
A34
RGMII5_TXC
B29
RGMII5_TXD0
A32
RGMII5_TXD1
B26
GPIO5/SSCS/SMDIO/PWLED
B24
GPIO6/MSDI/LIGHT
A26
GPIO7/MSDO/PWLED
A4
GPIO16/LED00
A6
GPIO17/LED10/TDO
A8
GPIO18/LED20/TDI
A14
G3_TPIAN
B13
G3_TPIBP
A15
G3_TPIBN
B14
G3_TPICP
B15
G3_TPICN
A17
G3_TPIDP
D3
GPIO8/MSCK
A25
GPIO9/MSCS
B16
G3_TPIDN
B1
RCAL
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
DG
L2013
R2014
R2013
R2010
R2021
R2009
R2007
R2008
R2003
R2004
R2001
R2002
L2SW_3R3V
R2020
R2015
R2016
R2006
R2012
R2011
R2005
DG
DG
DG
DG
DG
DG
DG
DG
DG
L2SW_3R3V
C2065
DG
L2SW
RGMII I/F
IC1001
12
KX-NT630 Series
4.2.4.
PoE Circuit
The IC2002 integrates a PD(Powered Device) controller and a DC-DC CONVERTER.
PD CONTROLLER
• a resistance(R2046:26.7Kohm) for signature detection.
• classification currents (R2045:90.9Kohm 1%) for power classification(NT630 supports Class 3)
• classification currents (R2045:90.9Kohm 1%) for power classification(NT630 supports Class 3)
DC-DC CONVERTER
• Current limit/ Current Sense(R2030)
• Output voltage feedback(R2027,Q2001,R2028,R2029)
• Output voltage feedback(R2027,Q2001,R2028,R2029)
4.2.5.
Analog Circuit
1. Speaker phone call
Transmitting signal is input from microphone MIC4001 (differential amplifier circuit)
input to IC1001-pin L19, M19 A/D
conversion, Gain adjustment and echo cancel by built-in DSP of IC1001.
Receiving signal input from IP Line
Receiving signal input from IP Line
Gain adjustment and D/A conversion by DSP of IC1001 output from IC1001-pin V18,
V19
output to Speaker.
DC Power
C2043
C2042
R2032
C2047
PoE_DC
C2063
C2039
R2026
C2060
PoE_G_Q
PoE_G_Q
C2058
PoE_G_N
R2043
D2002
L2008
R2030
Q2002
IC2002
1
VAUX
2
CT1
6
VDD48I
3
CT2
4
SP1
5
SP2
7
GND1
8
VDD5
9
RCURR
10
RCLASS
11
LVMODE
12
FB
13
COMP
14
CSS
15
CS
21
GND2
20
VDD48O
19
PDRV
18
VBP
17
VBN
16
NDRV
C2048
Q2001
R2029
R2027
R2040
R2028
R2034
R2033
R2045
C2041
C2040
C2064
D2003
R2046
C2051
C2052
C2050
C2049
PoE_G_N
PoE_G_Q
PoE_G_Q
PoE_G_Q
PoE_G_N
C2054
R2031
C2053
C2046
DG
LAN port (JK2001)
Signature
Detection
Detection
Classification
Current Sense
Output
Voltage
Feedback
Voltage
Feedback
R4029
R4030
IC1001
C4039
R4022
C4037
C4038
C4028
NC
NC
R4023
C4024
C4025
C4013
NC
DG
DG
DG
DG
R4020
C4034
C4033
R4021
R4019
MICBIAS
D4010
D4011
CL_MICP
CL_MICM
C4030
C4031
C4029
R4018
R4017
DG
DG
DG
DG
DG
DG
MIC4001
C4010
D4004
D4005
C4007
C4003
C4004
DG
DG
DG
DG
SPP
SPM
CL_SPP
CL_SPM
L4001
L4002
L4005
L4006
C4011
C4012
DG
DG
L4007
L4008
V19
PAOUTP
V18
PAOUTN
L19
DIFFIN1P
M19
DIFFIN1N
1
2
SP
MIC
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