Panasonic KX-NT400RU Service Manual ▷ View online
5
KX-NT400RU
3 Specifications
3.1.
General Descriptions
Rated Specification of the Equipment
List of Hardware Configuration
6
KX-NT400RU
4 Technical Descriptions
4.1.
Block Diagram
M
AIN
P
C
B
RJ45
Vo
IP
L
S
I
RJ45
FL
A
S
H
4MByt
e
Sub
CP
U
SDRA
M
8MByt
e
JT
A
G
+12V
5.0V
RE
G
3.3V
RE
G
8.192MHz
25
M
H
z
BT mo
du
le
(op
ti
on)
AFE
L2SW
me
mo
ry
co
nt
ro
lle
r
PC
M
SD
co
nt
ro
lle
r
UA
RT
PC
M
SP
I
anal
o
g
anal
o
g
+5V
+5.5V
VD
D
_
C
O
R
E
V
D
D
_
D
33,
_A
33
BT
co
n
Jack
co
n
MIC
co
n
SP
co
n
Jac
k P
C
B
SP
MI
C
1.5V
REG
3.3V
D
C
/D
C
5.5V
D
C
/D
C
Po
E
MII2
MII1
USA
RT
2
USA
RT
1
A/
D
, D
/A
KE
Y
/LE
D
JT
A
G
MII2
MII1
SP
I
SIO
SIO
UA
RT
PI
O
GPI
O
SPI
LAN port
PC port
IF
P
C
B
PXA
270
MA
C/PHY
FL
AS
H
64MByt
e
AC
’9
7
Cod
e
c
SDRA
M
32MByt
e
JT
A
G
VBU
S
40pi
n
co
n
1.3V
REG
1.1V
REG
32
kH
z
13
M
H
z
25
M
H
z
4pi
n
co
n
L
E
Dd
rv
USB
ho
st
Mem
o
ry
C
o
n
tr
o
lle
r
I2
C
A
C
97
SD
co
nt
ro
lle
r
SSP1
FFU
AR
T
JT
A
G
A
C
97
LCD
USB
SD
VD
D
_
S
R
AM
VD
D
_
PLL
LCD
C
o
n
tr
o
lle
r
20pi
n
co
n
20pi
n
co
n
BT
UAR
T
SSP2
1.5V
D
C
/D
C
D3.3V
, A
3
.3V
VC
O
R
E
PW
M
PWM
LC
D /w
T.P.
mo
du
le
9.8
M
H
z
SD
R
A
M
32MByt
e
IC
101
IC
102
I
C
103
I
C
104
IC
107
X503
X501
X502
IC
118
IC
111
IC
120
IC1
IC3
X201
IC2
X1
IC5
IC4
X401
IC7
IC9
IC10
IC14
IC
123
IC
122
IC
112
IC
113
IC
114
CN6
CN1
JK2
JK1
CN4
CN5
CN16
CN15
CN14
CN2
CN3
CN4
USB
co
n
SD
co
n
KX-NT400R
U Bloc
k Diag
ra
m
7
KX-NT400RU
4.2.
Circuit Operations
4.2.1.
Main-CPU (IC1)
The DSP , MAC, CODEC and the CPU are built into the VoIP (IC1).
The FLASH (IC2) and the SDRAM (IC3) are connected to the CPU. The contents of the FLASH are expanded to the SDRAM at
start-up. It also stores each setting.
The FLASH (IC2) and the SDRAM (IC3) are connected to the CPU. The contents of the FLASH are expanded to the SDRAM at
start-up. It also stores each setting.
4.2.2.
Application-CPU (IC101)
The SD card controller , USB host, LCD controller, PWM generator and the CPU are built into the PXA270 (IC101).
The FLASH (IC102) and the SDRAMs (IC103, IC104) are connected to the CPU. The contents of the FLASH are expanded to
the SDRAM at start-up.
It also stores each setting. Also, The MAC/PHY and CODEC/TouchPanel controller are connected the CPU.
The FLASH (IC102) and the SDRAMs (IC103, IC104) are connected to the CPU. The contents of the FLASH are expanded to
the SDRAM at start-up.
It also stores each setting. Also, The MAC/PHY and CODEC/TouchPanel controller are connected the CPU.
4.2.3.
LED Circuit
LCD data and timing signals are outputted from IC101 to LCD module.
CK, VSYNC, HSYNC, and ENAB are timing signals.
R5~0, G5~0 and B5~0 are data signals IC121 is FlipFlop for synchronizing of HSYNC and ENAB with CK rising edge.
CK, VSYNC, HSYNC, and ENAB are timing signals.
R5~0, G5~0 and B5~0 are data signals IC121 is FlipFlop for synchronizing of HSYNC and ENAB with CK rising edge.
8
KX-NT400RU
4.2.4.
Backlight Circuit
IC120 is LED driver for LCD backlight and generate V_BK(approx. 22V) from +12V.
IC101 controlls IC120 with BL_PWMPOW, BL_RSTB, BL_PWMOUT.
BL_PWMPOW and BL_RSTB must be "high" when Backlight turns on.
BL_PWMOUT is 200Hz PWM signal and it's duty controlls Backlight brightness.
IC101 controlls IC120 with BL_PWMPOW, BL_RSTB, BL_PWMOUT.
BL_PWMPOW and BL_RSTB must be "high" when Backlight turns on.
BL_PWMOUT is 200Hz PWM signal and it's duty controlls Backlight brightness.
4.2.5.
TouchPanel I/F Circuit
TouchPanel and IC111 are connected with 4-wire analog signals.
IC101 and IC111 are connected by synchronous serial bus.
When pendown detected, IC111 informes IC101 by raising TP_PENIRQ signal to "high".
Then, IC101 takes coordinate information of pen position by controlling IC111.
IC101 and IC111 are connected by synchronous serial bus.
When pendown detected, IC111 informes IC101 by raising TP_PENIRQ signal to "high".
Then, IC101 takes coordinate information of pen position by controlling IC111.
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