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Model
KX-NS5170XSX KX-NS5170X-SX
Pages
53
Size
3 MB
Type
PDF
Document
Service Manual
Brand
Device
PBX / 4-PORT DIGITAL HYBRID EXTENSION CARD
File
kx-ns5170xsx-kx-ns5170x-sx.pdf
Date
PREV: Panasonic KX-NS5170X / KX-NS5170SX Service Manual / Supplement

Panasonic KX-NS5170XSX / KX-NS5170X-SX Service Manual ▷ View online

41
KX-NS5170X/KX-NS5170SX
13 Exploded View and Replacement Parts List
13.1. IC Data
13.1.1.
IC404 (Controller)
Pin No.
Pin Name
I/O
Function
  A1
  VCCIO
-
VCC
  A2
nRD_L
O
local bus read
  A3
D2_L
I/O
local bus data
  A4
D7_L
I/O
local bus data
  A5
D9_L
I/O
local bus data
  A6
D12_L
I/O
local bus data
  A7
A0_L
O
local bus address
  A8
A3_L
O
local bus address
  A9
A7_L
O
local bus address
  A10
A11_L
O
local bus address
  A11
A14_L
O
local bus address
  A12
A18_L
O
local bus address
  A13
C_DCLK
O
SLIC SPI bus clock
  A14
C_DIN
I
SLIC SPI bus input data
  A15
nC_CS0
O
SLIC SPI bus chip select
  A16
  VCCIO
-
VCC
  B1
nWR_L
O
local bus write
  B2
  GND
-
GND
  B3
D3_L
I/O
local bus data
  B4
D8_L
I/O
local bus data
  B5
D10_L
I/O
local bus data
  B6
D13_L
I/O
local bus data
  B7
A1_L
O
local bus address
  B8
A4_L
O
local bus address
  B9
A8_L
O
local bus address
  B10
A12_L
O
local bus address
  B11
A15_L
O
local bus address
  B12
A19_L
O
local bus address
  B13
C_DOUT
O
SLIC SPI bus output data
  B14
nC_CS1
O
SLIC SPI bus chip select
  B15
  GND
-
GND
IC404
F5 IO3
D4 IO1
C2 IO5
B1 IO4
E5 IO2
C1 IO6
F3 IO7
D2 IO8
D1 IO9
G5 IO10
F2 IO11
F1 IO12
G2 IO13
N3
IO33
G1 IO14
H2 IO15
E1 CLK1
M2 CLK2
M1 CLK3
J2 IO16
J1 IO17
J6 IO18
K6 IO19
L6 IO20
K2 IO21
K1 IO22
L2 IO23
L1 IO24
L3 IO25
N2 IO26
N1 IO27
K5 IO28
L4 IO29
R1 IO30
P2 IO31
P1 IO32
P3
IO34
R3
IO35
T3
IO36
T2
IO37
R4
IO38
T4
IO39
N5
IO40
N6
IO41
M6
IO42
P6
IO43
M7
IO44
K8
IO45
R5
IO46
T5
IO47
R6
IO48
T6
IO49
L7
IO50
R7
IO51
T7
IO52
L8
IO53
M8
IO54
N8
IO55
P8
IO56
R8
IO57
T8
IO58
R9
IO59
T9
IO60
K9
IO61
L9
IO62
M9
IO63
N9
IO64
R10
IO65
T10
IO66
R11
IO67
T11
IO68
R12
IO69
T12
IO70
K10
IO71
L10
IO72
P9
IO73
P11
IO74
R13
IO75
T13
IO76
M10
IO77
N11
IO78
T14
IO79
T15
IO80
R14
IO81
P14
IO82
L11
IO83
M11
IO84
N12
IO85
IC404
L12 IO88
N13 IO86
N14 IO90
K12 IO89
M12 IO87
P15 IO91
P16 IO92
R16 IO93
K11 IO94
N16 IO95
N15 IO96
L14 IO97
L13 IO98
C14
IO121
L16 IO99
L15 IO100
J11 IO101
K16 IO102
K15 IO103
J16 IO104
J15 IO105
J14 IO106
J12 IO107
J13 IO108
M16 CLK7
M15 CLK6
E16 CLK5
E15 CLK4
G16 IO109
G15 IO110
F13 IO111
F16 IO112
F15 IO113
B16 IO114
F14 IO115
D16 IO116
D15 IO117
G11 IO118
C16 IO119
C15 IO120
D14
IO122
D11
IO123
D12
IO124
A13
IO125
B13
IO126
A14
IO127
B14
IO128
E11
IO129
E10
IO130
A12
IO131
B12
IO132
A11
IO133
B11
IO134
C11
IO135
F10
IO136
F9
IO137
F11
IO138
A15
IO139
A10
IO140
B10
IO141
C9
IO142
D9
IO143
E9
IO144
A9
IO145
B9
IO146
A8
IO147
B8
IO148
C8
IO149
D8
IO150
E8
IO151
F8
IO152
A7
IO153
B7
IO154
F6
IO155
F7
IO156
C6
IO157
A6
IO158
B6
IO159
E7
IO160
E6
IO161
A5
IO162
A2
IO163
B5
IO164
A4
IO165
B4
IO166
D5
IO167
D6
IO168
A3
IO169
B3
IO170
C3
IO171
D3
IO172
IC404
H5 *CONFIG
F4 *STATUS
H3 TCK
H4 TDI
H1 DCLK
J5 TMS
J4 TDO
J3 *CE
H14 CONF_DONE
H13 MSEL0
H12 MSEL1
G12 MSEL2
G6
VCCINT1
G7
VCCINT2
G8
VCCINT3
G9
VCCINT4
G10
VCCINT5
H6
VCCINT6
H11
VCCINT7
K7
VCCINT8
E3
VCCIO1_1
G3
VCCIO1_2
K3
VCCIO2_1
M3
VCCIO2_2
P4
VCCIO3_1
P7
VCCIO3_2
T1
VCCIO3_3
P10
VCCIO4_1
P13
VCCIO4_2
T16
VCCIO4_3
K14
VCCIO5_1
M14
VCCIO5_2
E14
VCCIO6_1
G14
VCCIO6_2
A16
VCCIO7_1
C10
VCCIO7_2
C13
VCCIO7_3
A1
VCCIO8_1
C4
VCCIO8_2
C7
VCCIO8_3
L5
VCCA1_1
F12
VCCA2_2
N4
VCCD_PLL1
D13
VCCD_PLL2
H7
GND1
H8
GND2
H9
GND3
H10
GND4
J7
GND5
J8
GND6
J9
GND7
J10
GND8
B2
GND9
B15
GND10
C5
GND11
C12
GND12
D7
GND13
D10
GND14
E4
GND15
E13
GND16
G4
GND17
G13
GND18
K4
GND19
K13
GND20
M4
GND21
M13
GND22
N7
GND23
N10
GND24
P5
GND25
P12
GND26
R2
GND27
R15
GND28
E2
GND29
H16
GND30
H15
GND31
M5
GNDA1
E12
GNDA2
42
KX-NS5170X/KX-NS5170SX
  B16
nALE
I
address latch enable at DMA
  C1
  DATA1,ASDO
O
configuration data
  C2
D0_L
I/O
local bus data
  C3
D4_L
I/O
local bus data
  C4
  VCCIO
-
VCC
  C5
  GND
-
GND
  C6
D14_L
I/O
local bus data
  C7
  VCCIO
-
VCC
  C8
A5_L
O
local bus address
  C9
A9_L
O
local bus address
  C10
  VCCIO
-
VCC
  C11
A16_L
O
local bus address
  C12
  GND
-
GND
  C13
  VCCIO
-
VCC
  C14
D0_T
I/O
TACKER bus data
  C15
nRD_T
I/O
TACKER RD
  C16
nWR_T
I/O
TACKER WR
  D1
nSBREQ
I
local bus request for sub bus arbiter
  D2
  FLASH_nCEnCSO
O
SPI flash ROM chip select
  D3
D5_L
I/O
lacal bus data
  D4
HWFH
O
frame sync output
  D5
D11_L
I/O
local bus data
  D6
D15_L
I/O
local bus data
  D7
  GND
-
GND
  D8
A6_L
O
local bus address
  D9
A10_L
O
local bus address
  D10
  GND
-
GND
  D11
A17_L
O
local bus address
  D12
nSLCRST
O
SLIC reset
  D13
  VCCD_PLL
-
VCC
  D14
D3_T
I/O
TACKER bus data
  D15
D2_T
I/O
TACKER bus data
  D16
D1_T
I/O
TACKER bus data
  E1
NC
-
no connect
  E2
  GND
-
GND
  E3
  VCCIO
-
VCC
  E4
  GND
-
GND
  E5
TEST6
-
test pad
  E6
NC
-
no connect
  E7
A2_L
O
local bus address
  E8
NC
-
no connect
  E9
NC
-
no connect
  E10
A13_L
O
local bus address
  E11
TEST7
test pad
  E12
  GNDA
-
GND
  E13
  GND
-
GND
  E14
  VCCIO
-
VCC
  E15
NC
-
no connect
  E16
NC
-
no connect
  F1
nSBACK_M
I
local bus acknowledge from sub bus arbiter
  F2
D1_L
I/O
local bus data
  F3
D6_L
I/O
local bus data
  F4
  nSTATUS
I
multimode configuration status
  F5
NC
-
no connect
  F6
NC
-
no connect
  F7
NC
-
no connect
  F8
NC
-
no connect
  F9
NC
-
no connect
  F10
NC
-
no connect
  F11
NC
-
no connect
  F12
  VCCA
-
VCC
  F13
D7_T
I/O
TACKER bus data
  F14
D6_T
I/O
TACKER bus data
  F15
D5_T
I/O
TACKER bus data
  F16
D4_T
I/O
TACKER bus data
  G1
nSBACK_S
O
local bus acknowledge to slave controller
  G2
HWCLK
O
High Way clock(4M)
Pin No.
Pin Name
I/O
Function
43
KX-NS5170X/KX-NS5170SX
  G3
  VCCIO
-
VCC
  G4
  GND
-
GND
  G5
NC
-
no connect
  G6
  VCCINT
-
VCC
  G7
  VCCINT
-
VCC
  G8
  VCCINT
-
VCC
  G9
  VCCINT
-
VCC
  G10
  VCCINT
-
VCC
  G11
NC
-
no connect
  G12
  MSEL2
I
configuration mode select
  G13
  GND
-
GND
  G14
  VCCIO
-
VCC
  G15
A1_T
I/O
TACKER bus address
  G16
A0_T
I/O
TACKER bus address
  H1
  DCLK
O
SPI flash ROM clock
  H2
  DATA0
I
SPI flash ROM data
  H3
  TCK
I
JTAG TCK
  H4
  TDI
I
JTAG TDI
  H5
  nCONFIG
I
configuration indicator
  H6
  VCCINT
-
VCC
  H7
  GND
-
GND
  H8
  GND
-
GND
  H9
  GND
-
GND
  H10
  GND
-
GND
  H11
  VCCINT
-
VCC
  H12
  MSEL1
I
configuration mode select
  H13
  MSEL0
I
configuration mode select
  H14
  CONF_DONE
I
multiconfiguration DONE signal
  H15
  GND
-
GND
  H16
  GND
-
GND
  J1
IRQ0
I
local IRQ 
  J2
IRQ1
I
local IRQ 
  J3
  nCE
I
multimode configuration chip select
  J4
  TDO
O
JTAG TDO
  J5
  TMS
I
JTAG TMS
  J6
NC
-
no connect
  J7
  GND
-
GND
  J8
  GND
-
GND
  J9
  GND
-
GND
  J10
  GND
-
GND
  J11
NC
-
no connect
  J12
NC
-
no connect
  J13
A5_T
I/O
TACKER bus address
  J14
A4_T
I/O
TACKER bus address
  J15
A3_T
I/O
TACKER bus address
  J16
A2_T
I/O
TACKER bus address
  K1
IRQ2
I
local IRQ 
  K2
IRQ3
I
local IRQ 
  K3
  VCCIO
-
VCC
  K4
  GND
-
GND
  K5
TEST5
-
test pad
  K6
NC
-
no connect
  K7
  VCCINT
-
VCC
  K8
NC
-
no connect
  K9
NC
-
no connect
  K10
NC
-
no connect
  K11
NC
-
no connect
  K12
TEST0
test pad
  K13
  GND
-
GND
  K14
  VCCIO
-
VCC
  K15
A7_T
I/O
TACKER bus address
  K16
A6_T
I/O
TACKER bus address
  L1
IRQ6
I
local IRQ 
  L2
IRQ7
I
local IRQ 
  L3
CID3
I
CARD ID
  L4
CP0
I
High Way select
  L5
  VCCA
-
VCC
Pin No.
Pin Name
I/O
Function
44
KX-NS5170X/KX-NS5170SX
  L6
NC
-
no connect
  L7
NC
-
no connect
  L8
NC
-
no connect
  L9
NC
-
no connect
  L10
NC
-
no connect
  L11
NC
-
no connect
  L12
NC
-
no connect
  L13
A11_T
I/O
TACKER bus address
  L14
A10_T
I/O
TACKER bus address
  L15
A9_T
I/O
TACKER bus address
  L16
A8_T
I/O
TACKER bus address
  M1
HWCLK_M
I
High Way clock input(4M)
  M2
NC
-
no connect
  M3
  VCCIO
-
VCC
  M4
  GND
-
GND
  M5
  GNDA
-
GND
  M6
TEST4
-
test pad
  M7
TEST3
-
test pad
  M8
NC
-
no connect
  M9
NC
-
no connect
  M10
TEST2
test pad
  M11
NC
-
no connect
  M12
TEST1
test pad
  M13
  GND
-
GND
  M14
  VCCIO
-
VCC
  M15
NC
-
no connect
  M16
CLK
I
system clock(25MHz)
  N1
CID0
I
CARD ID
  N2
CID1
I
CARD ID
  N3
CID2
I
CARD ID
  N4
  VCCD_PLL
-
VCC
  N5
CP2
I
High Way select
  N6
CP4
I
High Way select
  N7
  GND
-
GND
  N8
DELAY1
I
attainment signal from connected terminal 
  N9
CP7
I
High Way select
  N10
  GND
-
GND
  N11
nCS20
O
local bus SRAM chip select
  N12
nCS0
O
local bus FROM chip select
  N13
nCS3
O
local bus ASIC chip select
  N14
nCS1
O
local bus ASIC chip select
  N15
nCS_DMA
I
SRAM chip select at DMA
  N16
A12_T
I/O
TACKER bus address
  P1
HWFH_M
I
frame sync from TSW
  P2
LUHW_M
O
UP High Way to TSW
  P3
CP1
I
High Way select
  P4
  VCCIO
-
VCC
  P5
  GND
-
GND
  P6
CP3
I
High Way select
  P7
  VCCIO
-
VCC
  P8
DELAY0
I
attainment signal from connected terminal 
  P9
CP6
I
High Way select
  P10
  VCCIO
-
VCC
  P11
nCS21
O
local bus SRAM chip select
  P12
  GND
-
GND
  P13
  VCCIO
-
VCC
  P14
nBREQ
I
local bus request
  P15
nBACK
O
local bus acknowledge
  P16
nWAIT
I
local bus wait
  R1
LDHW_M
I
DOWN High Way from TSW
  R2
  GND
-
GND
  R3
nWR_M
I
CPU bus write
  R4
nWAIT_M
O
CPU bus wait
  R5
D6_M
I/O
CPU bus data
  R6
D4_M
I/O
CPU bus data
  R7
D2_M
I/O
CPU bus data
  R8
CP5
I
High Way select
Pin No.
Pin Name
I/O
Function
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