Panasonic KX-NS1000UC (serv.man6) Service Manual ▷ View online
77
KX-NS1000UC
(1)
(2)
(4)
(6)
(8)
(10)
(12)
(14)
(4)
(6)
(8)
(10)
(12)
(14)
(15)
(16)
(17)
(18)
(16)
(17)
(18)
(19)
(20)
(20)
(21)
(22)
(23)
(24)
(22)
(23)
(24)
(3)
(5)
(7)
(9)
(11)
(13)
(5)
(7)
(9)
(11)
(13)
6
8
7
11
10
9
C
E
B
A
D
F
G
DDR_D[8]
DDR_D[9]
DDR_D[10]
DDR_D[11]
DDR_D[12]
DDR_D[13]
DDR_D[14]
DDR_D[15]
DDR_DM[1]
DDR_BA[2]
DDR_BA[1]
DDR_BA[0]
DDR_D[22]
DDR_D[21]
DDR_D[20]
DDR_D[19]
DDR_D[18]
DDR_D[17]
DDR_D[16]
DDR_D[23]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]
DDR_A[13]
DDR_DM[2]
DDR_BA[0]
DDR_BA[1]
DDR_BA[2]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]
DDR_A[13]
DDR_DQS1_n
DDR_DQS1
DDR_DQS2
DDR_DQS2_n
DDR_DQS2_n
DDR_A[13]
DDR_D[31]
DDR_A[11]
DDR_A[2]
DDR_A[10]
DDR_A[7]
DDR_DM[3]
DDR_A[3]
DDR_A[12]
DDR_BA[0]
DDR_D[27]
DDR_D[28]
DDR_D[29]
DDR_D[30]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_BA[2]
DDR_A[8]
DDR_A[9]
DDR_D[24]
DDR_D[25]
DDR_D[26]
DDR_A[0]
DDR_BA[1]
DDR_A[1]
DDR_CS0_n
DDR_CS0_n
DDR_CS0_n
DDR_CLK_n
DDR_CLK_n
DDR_CLK_n
DDR_CLK
DDR_CLK
DDR_CLK
DDR_DQS3_n
DDR_DQS3
DDR_BA[0-2]
DDR_ODT
DDR_ODT
DDR_ODT
DDR_ODT
DDR_CAS_n
DDR_CAS_n
DDR_CAS_n
DDR_WE_n
DDR_WE_n
DDR_WE_n
DDR_RAS_n
DDR_RAS_n
DDR_RAS_n
DDR_CLKE
DDR_CLKE
DDR_CLKE
DG
C160
0.1u
16
+1.8VD_CPU
C159
0.1u
16
DG
+1.8VD_CPU
C156
0.1u 16
DG
+1.8VD_CPU
C149
0.1u 16
C152
0.1u 16
C153
0.1u 16
DG
C151
0.1u 16
C155
0.1u 16
C154
0.1u 16
C148
0.1u 16
C150
0.1u 16
DG
CL102
DG
DDR_VREF
C145
0.1u
16
+1.8VD_CPU
C103
0.1u
16
DG
DDR_VREF
DG
C122
0.1u 16
C118
0.1u 16
C108
0.1u 16
C112
0.1u 16
CL103
DG
C105
0.1u 16
C113
0.1u 16
C119
0.1u 16
C109
0.1u 16
C117
0.1u 16
DG
C165
0.1u 16
C164
0.1u 16
DG
+1.8VD_CPU
DG
C167
0.1u 16
DDR_VREF
DG
DG
C162
0.1u 16
C166
0.1u 16
C128
0.1u 16
C168
0.1u 16
CL104
C123
0.1u
16
C163
0.1u16
C129
0.1u 16
C127
10u 10
C161
10u
10
C104
10u 10
C147
10u 10
R119
1k
R101
1k
R102
1k
+1.8VD_CPU
DG
C169
0.1u
16
NC
C171
0.1u
16
NC
C170
0.1u
16
NC
IC104
VDDL E1
VSSDL E7
A9
VDDQ1
A7
VSSQ1
L1
VDD4
K9
VSS4
H9
VDD3
J1
VSS3
E9
VDD2
E3
VSS2
B8
VSSQ3
B2
VSSQ2
A0
H8
A1
H3
C9
VDDQ5
A1
VDD1
A3
VSS1
C1
VDDQ2
C3
VDDQ3
C7
VDDQ4
E2
VREF
A2
H7
A3
J2
DQ1 C2
DQ0 C8
A4
J8
A5
J3
DQ3 D3
DQ2 D7
A6
J7
A7
K2
DQ5 D9
DQ4 D1
A8
K8
A9
K3
DQ7 B9
DQ6 B1
A10
H2
A11
K7
A12
L2
BA0
G2
BA1
G3
NC2
L7
*RAS
F7
*DQS A8
DQS B7
*CAS
G7
*WE
F3
NC1
L3
BA2
G1
ODT
F9
*CS
G8
CKE
F2
CK
E8
D2
VSSQ4
D8
VSSQ5
*CK
F8
A13
L8
NU/*RDQS
A2
DM/RDQS
B3
IC102
VDDL E1
VSSDL E7
A9
VDDQ1
A7
VSSQ1
L1
VDD4
K9
VSS4
H9
VDD3
J1
VSS3
E9
VDD2
E3
VSS2
B8
VSSQ3
B2
VSSQ2
A0
H8
A1
H3
C9
VDDQ5
A1
VDD1
A3
VSS1
C1
VDDQ2
C3
VDDQ3
C7
VDDQ4
E2
VREF
A2
H7
A3
J2
DQ1 C2
DQ0 C8
A4
J8
A5
J3
DQ3 D3
DQ2 D7
A6
J7
A7
K2
DQ5 D9
DQ4 D1
A8
K8
A9
K3
DQ7 B9
DQ6 B1
A10
H2
A11
K7
A12
L2
BA0
G2
BA1
G3
NC2
L7
*RAS
F7
*DQS A8
DQS B7
*CAS
G7
*WE
F3
NC1
L3
BA2
G1
ODT
F9
*CS
G8
CKE
F2
CK
E8
D2
VSSQ4
D8
VSSQ5
*CK
F8
A13
L8
NU/*RDQS
A2
DM/RDQS
B3
IC105
VDDL E1
VSSDL E7
A9
VDDQ1
A7
VSSQ1
L1
VDD4
K9
VSS4
H9
VDD3
J1
VSS3
E9
VDD2
E3
VSS2
B8
VSSQ3
B2
VSSQ2
A0
H8
A1
H3
C9
VDDQ5
A1
VDD1
A3
VSS1
C1
VDDQ2
C3
VDDQ3
C7
VDDQ4
E2
VREF
A2
H7
A3
J2
DQ1 C2
DQ0 C8
A4
J8
A5
J3
DQ3 D3
DQ2 D7
A6
J7
A7
K2
DQ5 D9
DQ4 D1
A8
K8
A9
K3
DQ7 B9
DQ6 B1
A10
H2
A11
K7
A12
L2
BA0
G2
BA1
G3
NC2
L7
*RAS
F7
*DQS A8
DQS B7
*CAS
G7
*WE
F3
NC1
L3
BA2
G1
ODT
F9
*CS
G8
CKE
F2
CK
E8
D2
VSSQ4
D8
VSSQ5
*CK
F8
A13
L8
NU/*RDQS
A2
DM/RDQS
B3
KX-NS1000
8& Main BOARD No.1 2/2
78
KX-NS1000UC
12.1.2.
No.2
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(13)
(12)
(15)
(14)
(17)
(19)
(20)
(20)
(21)
(22)
(22)
(16)
(18)
(23)
(25)
(26)
(25)
(26)
(27)
(28)
(29)
(30)
(29)
(30)
(31)
(32)
(33)
(34)
(33)
(34)
(1)
(2)
(24)
C
E
B
D
F
3
4
2
1
6
5
G
H
EXP_RAW_A[0]
EXP_RAW_A[1]
EXP_RAW_A[2]
EXP_RAW_A[3]
EXP_RAW_A[4]
EXP_RAW_A[5]
EXP_RAW_A[1]
EXP_RAW_A[2]
EXP_RAW_A[3]
EXP_RAW_A[4]
EXP_RAW_A[5]
EXP_RAW_A[8]
EXP_RAW_A[9]
EXP_RAW_A[9]
EXP_RAW_A[10]
EXP_RAW_A[11]
EXP_RAW_A[12]
EXP_RAW_A[11]
EXP_RAW_A[12]
EXP_A[0]
EXP_A[1]
EXP_A[2]
EXP_A[3]
EXP_A[4]
EXP_A[5]
EXP_A[6]
EXP_A[7]
EXP_A[8]
EXP_A[9]
EXP_A[10]
EXP_A[11]
EXP_A[12]
EXP_A[13]
EXP_A[14]
EXP_A[15]
EXP_A[16]
EXP_A[17]
EXP_A[18]
EXP_A[19]
EXP_A[20]
EXP_A[21]
EXP_A[22]
EXP_A[23]
EXP_A[1]
EXP_A[2]
EXP_A[3]
EXP_A[4]
EXP_A[5]
EXP_A[6]
EXP_A[7]
EXP_A[8]
EXP_A[9]
EXP_A[10]
EXP_A[11]
EXP_A[12]
EXP_A[13]
EXP_A[14]
EXP_A[15]
EXP_A[16]
EXP_A[17]
EXP_A[18]
EXP_A[19]
EXP_A[20]
EXP_A[21]
EXP_A[22]
EXP_A[23]
EXP_A[0]
EXP_A[1]
EXP_A[2]
EXP_A[3]
EXP_A[4]
EXP_A[5]
EXP_A[6]
EXP_A[7]
EXP_A[8]
EXP_A[9]
EXP_A[10]
EXP_A[11]
EXP_A[12]
EXP_A[13]
EXP_A[14]
EXP_A[15]
EXP_RAW_A[6]
EXP_RAW_A[7]
EXP_RAW_A[7]
POW_RST_n
STATUS_LED_R_CPU
EXP_CS0_n
EXP_CS2_n
BUF_A[0]
BUF_A[1]
BUF_A[2]
BUF_A[3]
BUF_A[1]
BUF_A[2]
BUF_A[3]
BUF_A[4]
BUF_A[5]
BUF_A[6]
BUF_A[7]
BUF_A[5]
BUF_A[6]
BUF_A[7]
BUF_A[8]
BUF_A[9]
BUF_A[10]
BUF_A[11]
BUF_A[9]
BUF_A[10]
BUF_A[11]
BUF_A[12]
BUF_A[13]
BUF_A[14]
BUF_A[13]
BUF_A[14]
EXP_RAW_A[13]
EXP_RAW_A[17]
EXP_RAW_A[14]
EXP_RAW_A[15]
EXP_RAW_A[16]
EXP_RAW_A[14]
EXP_RAW_A[15]
EXP_RAW_A[16]
EXP_CS3_n
EXP_RDY/nBSY
BUF_A[0-14]
INITIALIZE_SW
R258
33
R259
33
R260
33
R261
33
R262
33
R263
33
R264
33
R265
33
R266
33
R267
33
R268
33
R269
33
R270
33
R271
33
R272
33
R273
33
R246
33
R243
33
R238
33
R247
33
R251
33
R228
33
R239
33
R237
33
R231
33
R233
33
R234
33
R232
33
R245
33
R240
33
R236
33
R241
33
R244
33
R249
33
R230
33
R248
33
R229
33
R250
33
R235
33
R242
33
R224
NC
R252
33
R253
33
R254
33
R255
33
DG
POW_RST_n
009:11F;005:1E;008:9D
R279
33
R274
33
R275
33
R276
33
R277
33
+3.3VD
IC100
F20
EXP_A0/TM_PCIE0_MODE
C8
EXP_A1/TM_PCIE1_MODE
A9
EXP_A2/TM_ETH0_MODE0
B9
EXP_A3/TM_ETH0_MODE1
C9
EXP_A4/TM_ETH1_MODE0
A10
EXP_A5/TM_ETH1_MODE1
B10
EXP_A6/TM_BOOT_OP1
C10
EXP_A7/TM_BOOT_OP0
A13
EXP_A8/TM_TDM_CLKSRC_EN
B13
EXP_A9/TM_EXP_NAND_SEL
C13
EXP_A10/TM_GPBT_OP0
A14
EXP_A11/TM_GPBT_OP1
B14
EXP_A12/TM_PCIE_EXT_REFCLK
C14
EXP_A13/GPIO11
A15
EXP_A14/GPIO14
B15
EXP_A15/GPIO8
B16
EXP_A16/GPIO9
A11
EXP_A17/GPIO10
B11
EXP_NAND_CS/EXP_A18/GPIO29
C12
EXP_NAND_ALE/EXP_A19/GPIO30
B12
EXP_NAND_CLE/EXP_A20/GPIO31
C11
EXP_NAND_RDY/EXP_A21/GPIO6
A16
*EXP_NAND_RE/EXP_A22
C15
*EXP_NAND_WE/EXP_A23
E22
*EXP_CS0
E21
*EXP_CS1
E20
*EXP_CS2
C5
GPIO_5/*EXP_CS3
B20
EXP_DQ10
C18
EXP_DQ11
A19
EXP_DQ12
A18
EXP_DQ13
B17
EXP_DQ14
C16
EXP_DQ15
D20
*EXP_RE
A12
*EXP_WE
C21
EXP_DM0
C20
EXP_DM1
D21
EXP_RDY/*BSY/GPIO21
D22
EXP_ALE/GPIO20
B5
EXP_IRQ/GPIO7
C22
EXP_CLK
B22
EXP_DQ0
B21
EXP_DQ1
C19
EXP_DQ2
A20
EXP_DQ3
B19
EXP_DQ4
B18
EXP_DQ5
C17
EXP_DQ6
A17
EXP_DQ7
A22
EXP_DQ8
A21
EXP_DQ9
DG
+3.3VD
C200
0.1u 16
C201
0.1u 16
DG
+3.3VD
DG
DG
R222
NC
R218
NC
R216
NC
R214
NC
R208
NC
R206
NC
R204
NC
R202
NC
R200
4.7k
R212
4.7k
R210
4.7k
R220
NC
R278
33
STATUS_LED_R_CPU
003:12E
EXP_RDY/nBSY
003:2E
SW200
1 2
3
4
5
6
7
DG
R226
33
FG
+3.3VD
R150
33
1
2
3
4
2
3
4
5
6
7
8
R151
33
1
2
3
4
2
3
4
5
6
7
8
R152
33
1
2
3
4
2
3
4
5
6
7
8
R153
33
1
2
3
4
2
3
4
5
6
7
8
R201
NC
R203
1k
R205
1k
R207
1k
R209
1k
R211
NC
R213
NC
R215
1k
R217
1k
R219
1k
R221
1k
R223
1k
R225
1k
R290
1k
1
2
3
4
2
3
4
5
6
7
8
R289 1k
BUF_OE_FPGA_n
003:11B
IC200
1 DIR
2 A1
2 A1
18
B1
19
*OE
3 A2
20
VCC
4 A3
17
B2
5 A4
16
B3
6 A5
15
B4
7 A6
14
B5
8 A7
13
B6
9 A8
12
B7
10 GND
11
B8
IC201
1 DIR
2 A1
2 A1
18
B1
19
*OE
3 A2
20
VCC
4 A3
17
B2
5 A4
16
B3
6 A5
15
B4
7 A6
14
B5
8 A7
13
B6
9 A8
12
B7
10 GND
11
B8
R227
1k
C203
0.1u
50
NC
C202
0.1u
16
NC
TM_PCIe0_MODE
TM_PCIe1_MODE
TM_GEM0_MODE_1
TM_GEM0_MODE_0
TM_GEM1_MODE_1
TM_GEM1_MODE_0
TM_PCIe1_MODE
TM_GEM0_MODE_1
TM_GEM0_MODE_0
TM_GEM1_MODE_1
TM_GEM1_MODE_0
TM_TDM_CLKSRC_EN
TM_EXP_NAND_SEL
TM_GPBT_OP0
TM_GPBT_OP1
TM_PCIe_EXT_REFCLK
TM_EXP_NAND_SEL
TM_GPBT_OP0
TM_GPBT_OP1
TM_PCIe_EXT_REFCLK
TM_BOOT_OP1
TM_BOOT_OP0
TM_BOOT_OP0
initial
normal
Initialize SW
KX-NS1000
8& Main BOARD No.2 1/2
79
KX-NS1000UC
(3)
(1)
(2)
(5)
(7)
(9)
(11)
(7)
(9)
(11)
(13)
(15)
(17)
(17)
(19)
(20)
(20)
(21)
(22)
(23)
(25)
(26)
(22)
(23)
(25)
(26)
(27)
(28)
(29)
(30)
(29)
(30)
(31)
(32)
(33)
(34)
(33)
(34)
(4)
(6)
(8)
(10)
(12)
(6)
(8)
(10)
(12)
(14)
(16)
(16)
(18)
(24)
8
7
11
10
9
C
E
B
D
F
G
H
EXP_D[0-15]
EXP_D[0]
EXP_D[1]
EXP_D[2]
EXP_D[3]
EXP_D[4]
EXP_D[5]
EXP_D[1]
EXP_D[2]
EXP_D[3]
EXP_D[4]
EXP_D[5]
EXP_D[7]
EXP_D[8]
EXP_D[9]
EXP_D[8]
EXP_D[9]
EXP_D[10]
EXP_D[11]
EXP_D[12]
EXP_D[13]
EXP_D[14]
EXP_D[15]
EXP_D[11]
EXP_D[12]
EXP_D[13]
EXP_D[14]
EXP_D[15]
EXP_D[6]
EXP_A[0-23]
EXP_A[0]
EXP_A[1]
EXP_A[2]
EXP_A[3]
EXP_A[4]
EXP_A[5]
EXP_A[6]
EXP_A[7]
EXP_A[8]
EXP_A[9]
EXP_A[10]
EXP_A[11]
EXP_A[12]
EXP_A[13]
EXP_A[14]
EXP_A[15]
EXP_A[16]
EXP_A[17]
EXP_A[18]
EXP_A[19]
EXP_D[0]
EXP_D[1]
EXP_D[2]
EXP_D[3]
EXP_D[4]
EXP_D[5]
EXP_D[6]
EXP_D[7]
EXP_D[8]
EXP_D[9]
EXP_D[10]
EXP_D[11]
EXP_D[12]
EXP_D[13]
EXP_D[14]
EXP_D[15]
EXP_D[0]
EXP_D[1]
EXP_D[2]
EXP_D[3]
EXP_D[4]
EXP_D[5]
EXP_D[6]
EXP_D[7]
EXP_D[8]
EXP_D[9]
EXP_D[10]
EXP_D[11]
EXP_D[12]
EXP_D[13]
EXP_D[14]
EXP_D[15]
EXP_A[0]
EXP_A[1]
EXP_A[2]
EXP_A[3]
EXP_A[4]
EXP_A[5]
EXP_A[6]
EXP_A[7]
EXP_A[8]
EXP_A[9]
EXP_A[10]
EXP_A[11]
EXP_A[12]
EXP_A[13]
EXP_A[14]
EXP_A[15]
EXP_A[16]
EXP_A[17]
EXP_A[18]
EXP_A[19]
EXP_A[20]
EXP_A[20]
EXP_A[21]
EXP_A[22]
EXP_A[23]
EXP_CS1_n
EXP_A[0]
EXP_A[8]
EXP_A[9]
EXP_A[10]
EXP_A[11]
EXP_A[12]
EXP_A[13]
EXP_A[14]
EXP_A[15]
EXP_A[16]
EXP_A[19]
EXP_D[0]
EXP_D[1]
EXP_D[2]
EXP_D[3]
EXP_D[4]
EXP_D[5]
EXP_D[6]
EXP_D[7]
EXP_D[8]
EXP_D[9]
EXP_D[10]
EXP_D[11]
EXP_D[12]
EXP_D[13]
EXP_D[14]
POW_RST_n
POW_RST_n
POW_RST_n
EXP_CS0_n
CS2_SRAM0_n
EXP_DM1_n
EXP_DM0_n
EXP_A[5]
EXP_A[1]
EXP_A[4]
EXP_A[18]
EXP_A[17]
EXP_A[17]
EXP_A[6]
EXP_A[2]
EXP_A[3]
EXP_A[7]
EXP_D[15]
CS2_SRAM1_NC_n
EXP_A[20]
EXP_CLK
EXP_WE_n
BUF_DM1_n
BUF_RE_n
BUF_WE_n
BUF_WE_n
BUF_WE_n
BUF_DM0_n
IC208
1 NC(A23)
2 NC(A22)
3 A15
4 A14
5 A13
6 A12
7 A11
8 A10
9 A9
10 A8
11 A19
12 A20
13 *WE
14 *RESET
15 A21
16 *WP/ACC
17 RY/*BY
18 A18
19 A17
20 A7
21 A6
22 A5
23 A4
24 A3
25 A2
26 A1
27 NC1
28 NC2
29
VIO
30
NC3
31
A0
32
*CE
33
VSS1
34
*OE
35
DQ0
36
DQ8
37
DQ1
38
DQ9
39
DQ2
40
DQ10
41
DQ3
42
DQ11
43
VCC
44
DQ4
45
DQ12
46
DQ5
47
DQ13
48
DQ6
49
DQ14
50
DQ7
51
DQ15/A-1
52
VSS2
53
*BYTE
54
A16
55
NC(A25)
56
NC(A24)
IC209
1 A15
2 A14
50
*UB
51
*BYTE
3 A13
52
A16
4 A12
49
VSS2
5 A11
48
*LB
6 A10
47
DQ15/A-1
7 A9
46
DQ7
8 A8
45
DQ14
9 A19
44
DQ6
10 *CS1
43
DQ13
11 *WE
42
DQ5
12 NC1
41
DQ12
13 NC2
40
DQ4
14 VCC
39
NC6
15 CS2
38
DQ11
16 NC3
37
DQ3
17 NC4
36
DQ10
18 A18
35
DQ2
19 A17
34
DQ9
20 A7
33
DQ1
21 A6
32
DQ8
22 A5
31
DQ0
23 A4
30
*OE
24 A3
29
VSS1
25 A2
28
NC5
26 A1
27
A0
DG
DG
+3.3VD
EXP_D[0-15]
003:2A;008:2B;007:2B
EXP_A[0-23]
003:2B;008:2B;007:2B
EXP_CS1_n
003:2E
+3.3VD_B
DG
C210
0.1u
16
DG
C208
0.1u 16
DG
DG
+3.3VD_B
C209
NC
EXP_RE_n
003:2E;008:9C
EXP_WE_n
003:2E;008:9C
EXP_CS2_n
003:12E
CS2_SRAM0_n
003:12E
CS2_SRAM1_n
003:12E
R293
NC
DG
R285
33
C207
0.1u 16
R281 0
R286
33
+3.3VD
DG
R288
33
DG
R287
33
R282 0
DG
DG
DG
R166
0
R167
10k
+3.3VD
R164
10k
R165
10k
+3.3VD
R294
1k
R295
1k
DG
IC210
NC
1 A15
2 A14
46
VSS2
47
*BYTE
3 A13
48
A16
4 A12
45
IO15/A-1
5 A11
44
IO7
6 A10
43
IO14
7 A9
42
IO6
8 A8
41
IO13
9 A19
40
IO5
10 NC
39
IO12
11 *WE
38
IO4
12 CS2
37
VCC
13 NU
36
IO11
14 *UB
35
IO3
15 *LB
34
IO10
16 A18
33
IO2
17 A17
32
IO9
18 A7
31
IO1
19 A6
30
IO8
20 A5
29
IO0
21 A4
28
*OE
22 A3
27
VSS1
23 A2
26
*CS1
24 A1
25
A0
EXP_CLK_DSP0
007:5E
EXP_CLK_DSP1
007:7E
EXP_CS3_n
003:2E
R156
1k
BUF_A[0-14]
008:2B
BUF_RE_n
007:5E;007:8E
BUF_WE_n
007:5E;007:8E
BUF_DM0_n
007:5E;007:8E
BUF_DM1_n
007:5E;007:8E
CL200
CL201
CL202
IC207
1
DIR
2
A1
18
B1
19
*OE
3
A2
20
VCC
4
A3
17
B2
5
A4
16
B3
6
A5
15
B4
7
A6
14
B5
8
A7
13
B6
9
A8
12
B7
10
GND
11
B8
R283
33
R284
33
BUF_DM0_debug_n
008:11G
BUF_WE_debug_n
008:11G
R256
0
R257
0
NOR FLASH
SRAM
SRAM
KX-NS1000
8& Main BOARD No.2 2/2
80
KX-NS1000UC
12.1.3.
No.3
(a)
(b)
(c)
(d)
(e)
(f)
(g)
(h)
(i)
(j)
(k)
(m)
(p)
(q)
(r)
(s)
(t)
(1)
(n)
KX-NS1000
8&
Main BOARD No.3 1/4
1/4
C
B
A
D
34
2
1
6
5
EXP_A[0-23]
EXP_A[0]
EXP_A[1]
EXP_A[2]
EXP_A[3]
EXP_A[4]
EXP_A[5]
EXP_A[6]
EXP_A[7]
EXP_A[8]
EXP_A[9]
EXP_A[10]
EXP_A[11]
EXP_A[12]
EXP_A[13]
EXP_A[20]
EXP_A[21]
EXP_A[22]
EXP_D[1]
EXP_D[2]
EXP_D[10]
EXP_D[11]
EXP_D[12]
EXP_D[13]
EXP_D[14]
EXP_D[15]
DPH_GPIO_FPGA[0]
DPH_GPIO_FPGA[2]
DPH_GPIO_FPGA[5]
DPH_GPIO_FPGA[6]
SHUTDOWN_CPU
FPGA_SYSCLK
DSP0_DHW1_FPGA
DSP0_DHW0_FPGA
DSP1_DHW3_FPGA
DSP1_DHW2_FPGA
MOH_HWSYNC_FPGA
HWCLK2M_FPGA
DSP0_HWCLK_FPGA
HWCLK4M_FPGA
DSP_GPIO_FPGA[0]
EXP_D[0]
EXP_D[0]
DONE_FPGA
INITB_FPGA
PROG_B_FPGA
DSP1_HWCLK_FPGA
DHW_4M_FPGA
EXP_RE_n
EXP_RE_n
L2SW_INT_FPGA_n
DSP0_INT0_n
DSP1_INT1_n
DSP0_INT1_n
DSP1_INT0_n
UHW_4M_FPGA
EXP_CS1_n
DSP1_UHW3_FPGA
DSP1_UHW2_FPGA
DSP0_UHW0_FPGA
DSP0_UHW1_FPGA
FPGA_INT_n
IC300
IO_L1P_A25_1
C19
IO_L1N_A24_VREF_1
B20
IO_L9P_1
G16
IO_L9N_1
G17
IO_L10P_1
F16
IO_L10N_1
F17
B21
GPIO[11]
B22
HWDS1_O
A20
GPIO[9]
A21
RESET[5]
IO_L21P_1
K16
IO_L21N_1
J16
IO_L28P_1
H16
IO_L28N_VREF_1
H17
IO_L29P_A23_M1A13_1
D19
IO_L29N_A22_M1A14_1
D20
IO_L30P_A21_M1RESET_1
F18
IO_L30N_A20_M1A11_1
F19
IO_L31P_A19_M1CKE_1
D21
IO_L31N_A18_M1A12_1
D22
IO_L32P_A17_M1A8_1
C20
IO_L32N_A16_M1A9_1
C22
IO_L33P_A15_M1A10_1
G19
IO_L33N_A14_M1A4_1
F20
IO_L34P_A13_M1WE_1
H19
IO_L34N_A12_M1BA2_1
H18
IO_L35P_A11_M1A7_1
E20
IO_L35N_A10_M1A2_1
E22
IO_L36P_A9_M1BA0_1
J17
IO_L36N_A8_M1BA1_1
K17
IO_L37P_A7_M1A0_1
F21
IO_L37N_A6_M1A1_1
F22
IO_L38P_A5_M1CLK_1
H20
IO_L38N_A4_M1CLKN_1
J19
G20
GPIO[15]
G22
GPIO[14]
K20
GPIO[16]
IO_L40N_GCLK10_M1A6_1
K19
IO_L45P_A1_M1LDQS_1
L20
IO_L45N_A0_M1LDQSN_1
L22
IO_L46P_FCS_B_M1DQ2_1
M21
IO_L46N_FOE_B_M1DQ3_1
M22
IO_L47P_FWE_B_M1DQ0_1
N20
IO_L47N_LDC_M1DQ1_1
N22
IO_L48P_HDC_M1DQ8_1
P21
P22
SYNC[4]
R20
DSPINT01
R22
L2SW_INT
T21
SYNC[0]
T22
WAIT_OUT
U20
CSI_RES
U22
RESET[9]
V21
RESET[7]
V22
CPU_INT
IO_L53P_1
M19
N19
GPIO[36]
IO_L58P_1
M16
IO_L58N_1
L15
P19
GPIO[35]
P20
DSPINT00
W20
READ
W22
RESET[8]
IO_L61P_1
L17
IO_L61N_1
K18
IO_L70P_1
U19
IO_L70N_1
V20
IO_L71P_1
M17
IO_L71N_1
M18
IO_L72P_1
P17
IO_L72N_1
N16
IO_L73P_1
P18
IO_L73N_1
R19
IO_L74P_AWAKE_1
T19
IO_L74N_DOUT_BUSY_1
T20
VCCO_1_1
C21
VCCO_1_2
E19
VCCO_1_3
G21
VCCO_1_4
J18
H21
HWDS0_I
H22
HWDS0_O
M20
COE[2]
L19
SHUTD
J20
HWDS1_I
J22
SYSCLK
IO_L44P_A3_M1DQ6_1
K21
IO_L44N_A2_M1DQ7_1
K22
VCCO_1_8
R21
VCCO_1_7
N18
VCCO_1_6
L21
VCCO_1_5
L16
VCCO_1_9
U18
VCCO_1_10
W21
CMPCS_B_2
Y20
DONE_2
Y22
PROGRAM_B_2
AA1
IO_L1P_CCLK_2
Y21
IO_L1N_M0_CMPMISO_2
AA22
AA21
WR_RES
AB21
HWCLK4
IO_L3P_D0_DIN_MISO_MISO1_2
AA20
IO_L3N_MOSI_CSI_B_MISO0_2
AB20
IO_L4P_2
T18
IO_L4N_VREF_2
T17
Y19
HW4M_O
AB19
D0_RES
W18
SYNC[10]
Y18
HW4M_I
IO_L7P_2
T16
IO_L7N_2
T15
IO_L8P_2
U17
IO_L8N_2
U16
IO_L9P_2
V19
IO_L9N_2
V18
IO_L10P_2
R16
IO_L10N_2
R15
IO_L11P_2
V17
IO_L11N_2
W17
IO_L12P_D1_MISO2_2
U14
IO_L12N_D2_MISO3_2
U13
IO_L13P_M1_2
U15
IO_L13N_D10_2
V15
IO_L14P_D11_2
AA18
IO_L14N_D12_2
AB18
Y17
GPIO[34]
AB17
SYNC[3]
AA14
HWDS3_O
AB14
HWDS3_I
IO_L17P_2
Y16
IO_L17N_2
W15
V13
GPIO[31]
VCCO_2_11
W5
VCCO_2_10
V8
VCCO_2_9
V16
VCCO_2_8
V12
VCCO_2_7
T9
VCCO_2_6
T13
VCCO_2_5
AA7
VCCO_2_4
AA3
VCCO_2_3
AA19
VCCO_2_2
AA15
VCCO_2_1
AA11
IO_L65N_CSO_B_2
T5
IO_L65P_INIT_B_2
T6
IO_L64N_D9_2
AB2
IO_L64P_D8_2
AA2
V5
CS2_SRAM3
U6
CS2_DSP0
IO_L62N_D6_2
Y4
IO_L62P_D5_2
W4
IO_L60N_2
R7
IO_L60P_2
T7
IO_L59N_2
R8
IO_L59P_2
R9
AB3
CS2_SRAM2
Y3
CS2_SRAM1
AB4
SYNC[1]
AA4
EXP_CS2
IO_L54N_2
AB5
IO_L54P_2
Y5
IO_L53N_2
Y6
IO_L53P_2
W6
IO_L52N_2
U10
IO_L52P_2
T10
IO_L51N_2
U8
IO_L51P_2
T8
V9
CS2_DSP3
U9
CS2_DSP2
IO_L49N_D4_2
AB6
IO_L49P_D3_2
AA6
IO_L48N_RDWR_B_VREF_2
AB7
W13
GPIO[32]
AA16
COE[4]
AB16
RESET[6]
W14
HWDS2_I
Y14
HWDS2_O
Y15
GPIO[33]
AB15
HWCLK2
IO_L22P_2
T12
V7
CS2_DSP1
W9
GPIO[29]
Y8
COE[3]
IO_L48P_D7_2
Y7
W8
GPIO[17]
AB8
HW2M_O
IO_L22N_2
U12
IO_L23P_2
T14
IO_L23N_2
R13
W12
RTCINT
Y12
DSPINT11
IO_L30P_GCLK1_D13_2
Y13
AB13
SYNC[2]
IO_L31P_GCLK31_D14_2
AA12
IO_L31N_GCLK30_D15_2
AB12
Y11
HWCLK5
IO_L40N_2
T11
AA10
BUF_OE
AB10
HWCLK3
V11
GPIO[20]
W11
GPIO[19]
Y9
CS3_n
AB9
RESET[10]
W10
GPIO[18]
Y10
DSPINT10
AA8
HW2M_I
IO_L40P_2
R11
AB11
RST_IN
EXP_A[0-23]
002:11B;008:2B;007:2B
EXP_D[0-15]
002:11B;008:2B;007:2B
R343
33
R344
33
R345
33
R320
33
RTC_INT_FPGA_n
005:1C
DSP1_INT0_n
007:5F
DSP0_CARDID_OE_FPGA_n
007:2D
SHUTDOWN_CPU
005:1B
EXT_RST_n
009:11B;005:1E
+3.3VD
+3.3VD
L2SW_INT_FPGA_n
004:2B
DSP0_INT0_n
007:2F
DG
C300
0.1u
16
C302
1000p
50
+3.3VD
C301
0.1u
16
R306
10k
+3.3VD
R314
1k
DG
R348
0
+3.3VD
DG
R374
10k
NC
+3.3VD
R357
10k
DG
R319
33
DSP0_DHW1_FPGA
007:5F
R315
10k
+3.3VD
DSP0_UHW0_FPGA
007:5D
R318
33
DSP0_DHW0_FPGA
007:5D
DSP0_UHW1_FPGA
007:5F
DSP1_DHW3_FPGA
007:7F
DSP1_UHW3_FPGA
007:7F
DSP1_DHW2_FPGA
007:8D
DSP1_UHW2_FPGA
007:8D
R341
3
3
R366
33
R367
33
R368
33
R342
33
R365
33
R370
33
HWCLK2M_FPGA
008:2C
R360
33
DSP0_HWCLK_FPGA
007:5C
R369
33
HWCLK4M_FPGA
005:1B;006:2B;007:9D
R355
10k
+3.3VD
R371
33
DSP1_HWCLK_FPGA
007:8C
R364
33
R361
0
R363
0
NC
PROG_B_FPGA
005:1D
DONE_FPGA
005:1D
INITB_FPGA
005:1D
R350
1k
DG
R362
33
DHW_4M_FPGA
005:1B;006:2C;007:9D
UHW_4M_FPGA
005:1B;006:2B;007:11D
EXP_CS1_n
002:11H
FPGA_INT_n
005:1D
EXP_RE_n
002:11D;008:9C
EXP_RDY/nBSY
002:2F
EXP_WE_n
002:11D;008:9C
R349
0
R347
0
NC
+3.3VD
R346
NC
R312
10k
DSP0_INT1_n
007:2F
DSP1_INT1_n
007:5F
+3.3VD
R309
10k
R316
10k
+3.3VD
R359
10k
R373
0
NC
R313 10k
1
2
3
4
2
3
4
5
6
7
8
C1_LED
004:9F
P4_LED
004:9F
P3_LED
004:9F
P2_LED
004:9F
C2_LED
004:9F
004:9F
P4_YELLOW
004:9G
P3_GREEN
004:9G
P2_GREEN
004:9F
P4_GREEN
004:9G
P2_YELLOW
004:9G
P3_YELLOW
R376
0
R317
0
NC
EXP_CS3_n
002:11H
CL300
CL304
CL305
DL300
1
2
3
16M
X300
16.384M
1
GND1
2
GND2
3
OUT
4
VCC
+3.3VD
+
3.3VD
+3.3VD
+3.3VD
R375
1k
R358
1k
R356
1k
R372
1k
R378
33
C304
100p
50
DG
R379
33
C308
100p
50
DG
IC301
1
1A
2
3Y
3
2A
4
GND
5
2Y
6
3A
7
1Y
8
VCC
R311
47
SYSCLK
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