Panasonic KX-NCP1173XJ (serv.man2) Service Manual ▷ View online
9
KX-NCP1173XJ
• Bell signal issuing circuit
When feeding and speech paths are connected, BELL relay will be in 'break' state. When the bell signal is issued, BELL relay will
be in “Make” state.
be in “Make” state.
• HOOK detecting circuit
When BELL signal is not output or when dial pulse is received, this circuit distinguishes whether SLT is off hook or on hook.
When SLT is off hook, DC loop is formed and current flows into U52. At this time, the collector of U52 (3, 4, and 5 pin), namely,
HOOK signal changes from H to L and is detected by CPU by way of CODEC R ASIC. When SLT is on hook, DC loop is
interrupted and the current flow into U52 (3, 4, and 5 pin) ceases; the collector of U52, namely, HOOK signal changes from L to
H and is detected by CPU in like manner.
When SLT is off hook, DC loop is formed and current flows into U52. At this time, the collector of U52 (3, 4, and 5 pin), namely,
HOOK signal changes from H to L and is detected by CPU by way of CODEC R ASIC. When SLT is on hook, DC loop is
interrupted and the current flow into U52 (3, 4, and 5 pin) ceases; the collector of U52, namely, HOOK signal changes from L to
H and is detected by CPU in like manner.
• Ring trip circuit
While BELL signal is output, this circuit detects SLT off-hook by the hardware, and makes BELL relay in 'break' state.
While BELL signal is issued, when SLT is on hook, U52 (1, 2, and 6 pin) is off. When SLT is taken off the hook, DC loop is
formed because 40V is superimposed on BELL signal; then, current flows into R52
While BELL signal is issued, when SLT is on hook, U52 (1, 2, and 6 pin) is off. When SLT is taken off the hook, DC loop is
formed because 40V is superimposed on BELL signal; then, current flows into R52
→ R58 → D51 → U52, and U52 (1, 2, and 6
pin) becomes on.
When U52 (1, 2, and 6 pin) has become on, because the base of Q57 that is the driver of BELL relay becomes L, BELL relay will
be in 'break' state and SLT current-supply circuit feeds current to SLT.
When U52 (1, 2, and 6 pin) has become on, because the base of Q57 that is the driver of BELL relay becomes L, BELL relay will
be in 'break' state and SLT current-supply circuit feeds current to SLT.
• DTMF signal detecting circuit
Each port has its DTMF receiver.
Ports A to D carry out detection at IC400.
That DTMF data has become valid at EST terminal = H is detected by CPU by way of CODEC
Ports A to D carry out detection at IC400.
That DTMF data has become valid at EST terminal = H is detected by CPU by way of CODEC
→ ASIC, and then CPU reads and
detects the data of DTMF receiver.
• 2W-4W converting circuit
This circuit converts between the 2-line audio signal of APT or SLT and the 4-line audio signal on CODEC.
The audio signal from SLT is input to the differential amplifying circuit of IC302 (1, 2, and 3 pin) by way of C55 and C56, and its
output is input to CODEC.
CODEC output is issued to SLT in the form of the synthesis of the signal that is output through by way of R63 and the one that is
reversely output by IC302 (5, 6, and 7 pin). Programmable frequency characteristic adjusting filter, sidetone removing filter, and
return loss compensating filter are included in CODEC.
The audio signal from SLT is input to the differential amplifying circuit of IC302 (1, 2, and 3 pin) by way of C55 and C56, and its
output is input to CODEC.
CODEC output is issued to SLT in the form of the synthesis of the signal that is output through by way of R63 and the one that is
reversely output by IC302 (5, 6, and 7 pin). Programmable frequency characteristic adjusting filter, sidetone removing filter, and
return loss compensating filter are included in CODEC.
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KX-NCP1173XJ
5.2.2.2.
EXT-CID Transmission
This ASIC (IC600) generates the extension Caller ID signals (FSK signal) with the CPU control.
The data flow is shown below.
The data flow is shown below.
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KX-NCP1173XJ
5.2.3.
Power Supply Circuit
5.2.3.1.
Power Supply Voltage Generator
The input from the main power supply is in 3 voltage levels: +15V,+15VPT,+40V.
Since the voltage levels: +15V,+5V,+3.3V,+40V,+160V,-100V and AC75Vrms are required onboard, voltage levels are generated
onboard as written below.
Since the voltage levels: +15V,+5V,+3.3V,+40V,+160V,-100V and AC75Vrms are required onboard, voltage levels are generated
onboard as written below.
5.2.3.2.
DC/DC Circuit (+3.3V, +5V)
The protection circuit consists of an output short protection and an overvoltage protection.
When an output of power supply is short, IC800 or IC801 works to stop the output as the output short protection.
When +5V and/or +3V output become overvoltage caused by Q802 and/or Q803 short, it is detected by D806 and D807.
Q800 is cut by Q801 to shut down the input power supply as overvoltage protection.
When an output of power supply is short, IC800 or IC801 works to stop the output as the output short protection.
When +5V and/or +3V output become overvoltage caused by Q802 and/or Q803 short, it is detected by D806 and D807.
Q800 is cut by Q801 to shut down the input power supply as overvoltage protection.
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KX-NCP1173XJ
5.2.3.3.
Ringer Generating Circuit
The bell signal forms a sine wave out of the rectangular wave of 20/25Hz transmitted from ASIC of MPR, amplifies it up to
AC75Vrms, and generates it.
+40V is stepped up to +180V and -100V by SW power circuit that oscillates at 200KHz, and the voltage between these is ampli-
fied with a focus on +30V to generate the bell signal of AC75Vrms.
AC75Vrms, and generates it.
+40V is stepped up to +180V and -100V by SW power circuit that oscillates at 200KHz, and the voltage between these is ampli-
fied with a focus on +30V to generate the bell signal of AC75Vrms.
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